samsung-sm8650/android_kernel_samsung_sm8650-modules
1
0
フォーク 0
コード イシュー プルリクエスト Actions パッケージ プロジェクト リリース Wiki アクティビティ

Merge db55976826 on remote branch

ソースを参照 
Change-Id: Ia6edb05c3629206b98fd363391ab276337762f8f
このコミットが含まれているのは:
Linux Build Service Account
2023-04-19 08:47:54 -07:00
親 245ccf4818 db55976826
コミット 6046a888ba
47個のファイルの変更、1524行の追加、2408行の削除
Patchファイルをダウンロード Diffファイルをダウンロード すべてのファイルを展開 すべてのファイルを折り畳む

19
Android.bp
ファイルの表示

@@ -3,26 +3,7 @@ headers_src = [
]
audio_headers_out = [
"linux/avtimer.h",
"linux/msm_audio.h",
"linux/msm_audio_aac.h",
"linux/msm_audio_ac3.h",
"linux/msm_audio_alac.h",
"linux/msm_audio_amrnb.h",
"linux/msm_audio_amrwb.h",
"linux/msm_audio_amrwbplus.h",
"linux/msm_audio_ape.h",
"linux/msm_audio_calibration.h",
"linux/msm_audio_g711.h",
"linux/msm_audio_g711_dec.h",
"linux/msm_audio_mvs.h",
"linux/msm_audio_qcp.h",
"linux/msm_audio_sbc.h",
"linux/msm_audio_voicememo.h",
"linux/msm_audio_wma.h",
"linux/msm_audio_wmapro.h",
"linux/wcd-spi-ac-params.h",
"sound/audio_compressed_formats.h",
"sound/audio_effects.h",
"sound/audio_slimslave.h",
"sound/devdep_params.h",

52
BUILD.bazel ノーマルファイル
ファイルの表示

@@ -0,0 +1,52 @@
package(
default_visibility = [
"//visibility:public",
],
)
load("//build/kernel/kleaf:kernel.bzl", "ddk_headers")
ddk_headers(
name = "audio_common_headers",
hdrs = glob([
"include/asoc/*.h",
"include/bindings/*.h",
"include/dsp/*.h",
"include/ipc/*.h",
"include/soc/*.h"
]),
includes = ["include"]
)
ddk_headers(
name = "audio_uapi_headers",
hdrs = glob([
"include/uapi/audio/**/*.h"
]),
includes = ["include/uapi/audio"]
)
ddk_headers(
name = "audio_src_headers",
hdrs = glob([
"asoc/**/*.h",
"dsp/**/*.h",
"ipc/**/*.h",
"soc/**/*.h"
])
)
ddk_headers(
name = "audio_configs",
hdrs = glob([
"config/*.h"
]),
includes = ["config"]
)
ddk_headers(
name = "audio_headers",
hdrs = [":audio_common_headers", ":audio_uapi_headers", ":audio_src_headers", ":audio_configs"]
)
load(":build/pineapple.bzl", "define_pineapple")
load(":build/kalama.bzl", "define_kalama")
define_kalama()
define_pineapple()

87
asoc/codecs/audio-ext-clk-up.c
ファイルの表示

@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/kernel.h>
@@ -10,10 +11,8 @@
#include <linux/of.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include "../../../drivers/clk/qcom/common.h"
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <dsp/apr_audio-v2.h>
#include <bindings/qcom,audio-ext-clk.h>
#include <linux/ratelimit.h>
#ifdef CONFIG_AUDIO_PRM
@@ -59,7 +58,7 @@ struct audio_ext_clk {
struct audio_ext_clk_priv {
struct device *dev;
int clk_src;
struct afe_clk_set clk_cfg;
uint32_t enable;
#ifdef CONFIG_AUDIO_PRM
struct clk_cfg prm_clk_cfg;
#endif
@@ -82,21 +81,22 @@ static int audio_ext_clk_prepare(struct clk_hw *hw)
static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);
if ((clk_priv->clk_src >= AUDIO_EXT_CLK_LPASS) &&
(clk_priv->clk_src < AUDIO_EXT_CLK_LPASS_MAX) && !clk_priv->clk_cfg.enable) {
(clk_priv->clk_src < AUDIO_EXT_CLK_LPASS_MAX) && !clk_priv->enable) {
#ifdef CONFIG_AUDIO_PRM
pr_debug("%s: clk_id %x ",__func__, clk_priv->prm_clk_cfg.clk_id);
pr_debug("%s: clk_id %x ", __func__, clk_priv->prm_clk_cfg.clk_id);
trace_printk("%s: clk_id %x \n", __func__, clk_priv->prm_clk_cfg.clk_id);
ret = audio_prm_set_lpass_clk_cfg(&clk_priv->prm_clk_cfg,1);
#else
ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk_priv->clk_cfg);
pr_debug("%s: audio prm not enabled", __func__);
ret = -EPERM;
#endif
if (ret < 0) {
if (__ratelimit(&rtl))
pr_err_ratelimited("%s afe_set_digital_codec_core_clock failed\n",
pr_err_ratelimited("%s prm set lpass clk failed\n",
__func__);
return ret;
}
clk_priv->clk_cfg.enable = 1;
clk_priv->enable = 1;
}
if (pnctrl_info->pinctrl) {
@@ -133,18 +133,19 @@ static void audio_ext_clk_unprepare(struct clk_hw *hw)
if ((clk_priv->clk_src >= AUDIO_EXT_CLK_LPASS) &&
(clk_priv->clk_src < AUDIO_EXT_CLK_LPASS_MAX)) {
clk_priv->clk_cfg.enable = 0;
clk_priv->enable = 0;
#ifdef CONFIG_AUDIO_PRM
pr_debug("%s: clk_id %x",__func__,
pr_debug("%s: clk_id %x", __func__,
clk_priv->prm_clk_cfg.clk_id);
ret = audio_prm_set_lpass_clk_cfg(&clk_priv->prm_clk_cfg,0);
ret = audio_prm_set_lpass_clk_cfg(&clk_priv->prm_clk_cfg, 0);
trace_printk("%s: clk_id %x \n", __func__, clk_priv->prm_clk_cfg.clk_id);
#else
ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk_priv->clk_cfg);
pr_debug("%s: audio prm not enabled", __func__);
ret = -EPERM;
#endif
if (ret < 0) {
if (__ratelimit(&rtl))
pr_err_ratelimited("%s: afe_set_lpass_clk_cfg failed, ret = %d\n",
pr_err_ratelimited("%s: unset lpass clk cfg failed, ret = %d\n",
__func__, ret);
}
}
@@ -179,32 +180,31 @@ static int lpass_hw_vote_prepare(struct clk_hw *hw)
if (clk_priv->clk_src == AUDIO_EXT_CLK_LPASS_CORE_HW_VOTE) {
#ifdef CONFIG_AUDIO_PRM
pr_debug("%s: core vote clk_id %x \n",__func__, clk_priv->prm_clk_cfg.clk_id);
pr_debug("%s: core vote clk_id %x \n", __func__, clk_priv->prm_clk_cfg.clk_id);
ret = audio_prm_set_lpass_hw_core_req(&clk_priv->prm_clk_cfg,
HW_CORE_ID_LPASS, 1);
trace_printk("%s: core vote clk_id %x \n", __func__, clk_priv->prm_clk_cfg.clk_id);
#else
ret = afe_vote_lpass_core_hw(AFE_LPASS_CORE_HW_MACRO_BLOCK,
"LPASS_HW_MACRO",
&clk_priv->lpass_core_hwvote_client_handle);
pr_debug("%s: audio prm not enabled", __func__);
ret = -EPERM;
#endif
if (ret < 0) {
pr_err("%s lpass core hw vote failed %d\n",
__func__, ret);
if (__ratelimit(&rtl))
pr_err("%s lpass core hw vote failed %d\n",
__func__, ret);
return ret;
}
}
if (clk_priv->clk_src == AUDIO_EXT_CLK_LPASS_AUDIO_HW_VOTE) {
#ifdef CONFIG_AUDIO_PRM
pr_debug("%s: audio vote clk_id %x \n",__func__, clk_priv->prm_clk_cfg.clk_id);
pr_debug("%s: audio vote clk_id %x \n", __func__, clk_priv->prm_clk_cfg.clk_id);
ret = audio_prm_set_lpass_hw_core_req(&clk_priv->prm_clk_cfg,
HW_CORE_ID_DCODEC, 1);
trace_printk("%s: audio vote clk_id %x \n", __func__, clk_priv->prm_clk_cfg.clk_id);
#else
ret = afe_vote_lpass_core_hw(AFE_LPASS_CORE_HW_DCODEC_BLOCK,
"LPASS_HW_DCODEC",
&clk_priv->lpass_audio_hwvote_client_handle);
pr_debug("%s: audio prm not enabled", __func__);
ret = -EPERM;
#endif
if (ret < 0) {
if (__ratelimit(&rtl))
@@ -224,14 +224,13 @@ static void lpass_hw_vote_unprepare(struct clk_hw *hw)
if (clk_priv->clk_src == AUDIO_EXT_CLK_LPASS_CORE_HW_VOTE) {
#ifdef CONFIG_AUDIO_PRM
pr_debug("%s: core vote clk_id %x \n",__func__, clk_priv->prm_clk_cfg.clk_id);
ret = audio_prm_set_lpass_hw_core_req(&clk_priv->prm_clk_cfg,
HW_CORE_ID_LPASS, 0);
pr_debug("%s: core vote clk_id %x \n", __func__, clk_priv->prm_clk_cfg.clk_id);
ret = audio_prm_set_lpass_hw_core_req(&clk_priv->prm_clk_cfg,
HW_CORE_ID_LPASS, 0);
trace_printk("%s: core vote clk_id %x \n", __func__, clk_priv->prm_clk_cfg.clk_id);
#else
ret = afe_unvote_lpass_core_hw(
AFE_LPASS_CORE_HW_MACRO_BLOCK,
clk_priv->lpass_core_hwvote_client_handle);
pr_debug("%s: audio prm not enabled", __func__);
ret = -EPERM;
#endif
if (ret < 0) {
pr_err("%s lpass core hw vote failed %d\n",
@@ -242,14 +241,13 @@ static void lpass_hw_vote_unprepare(struct clk_hw *hw)
if (clk_priv->clk_src == AUDIO_EXT_CLK_LPASS_AUDIO_HW_VOTE) {
#ifdef CONFIG_AUDIO_PRM
pr_debug("%s: audio vote clk_id %x \n",__func__, clk_priv->prm_clk_cfg.clk_id);
ret = audio_prm_set_lpass_hw_core_req(&clk_priv->prm_clk_cfg,
HW_CORE_ID_DCODEC, 0);
pr_debug("%s: audio vote clk_id %x \n", __func__, clk_priv->prm_clk_cfg.clk_id);
ret = audio_prm_set_lpass_hw_core_req(&clk_priv->prm_clk_cfg,
HW_CORE_ID_DCODEC, 0);
trace_printk("%s: audio vote clk_id %x \n", __func__, clk_priv->prm_clk_cfg.clk_id);
#else
ret = afe_unvote_lpass_core_hw(
AFE_LPASS_CORE_HW_DCODEC_BLOCK,
clk_priv->lpass_audio_hwvote_client_handle);
pr_debug("%s: audio prm not enabled", __func__);
ret = -EPERM;
#endif
if (ret < 0) {
pr_err("%s lpass audio hw unvote failed %d\n",
@@ -639,18 +637,11 @@ static int audio_ref_clk_probe(struct platform_device *pdev)
memcpy(&clk_priv->audio_clk, &audio_clk_array[clk_src],
sizeof(struct audio_ext_clk));
/* Init lpass clk default values */
clk_priv->clk_cfg.clk_set_minor_version =
Q6AFE_LPASS_CLK_CONFIG_API_VERSION;
clk_priv->clk_cfg.clk_id = Q6AFE_LPASS_CLK_ID_SPEAKER_I2S_OSR;
clk_priv->clk_cfg.clk_freq_in_hz = Q6AFE_LPASS_OSR_CLK_9_P600_MHZ;
clk_priv->clk_cfg.clk_attri = Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO;
#ifdef CONFIG_AUDIO_PRM
/* Init prm clk cfg default values */
clk_priv->prm_clk_cfg.clk_id = Q6AFE_LPASS_CLK_ID_SPEAKER_I2S_OSR;
clk_priv->prm_clk_cfg.clk_freq_in_hz = Q6AFE_LPASS_OSR_CLK_9_P600_MHZ;
clk_priv->prm_clk_cfg.clk_attri = Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO;
clk_priv->prm_clk_cfg.clk_id = CLOCK_ID_QUI_MI2S_OSR;
clk_priv->prm_clk_cfg.clk_freq_in_hz = OSR_CLOCK_9_P600_MHZ;
clk_priv->prm_clk_cfg.clk_attri = CLOCK_ATTRIBUTE_COUPLE_NO;
clk_priv->prm_clk_cfg.clk_root = 0;
#endif
@@ -658,7 +649,6 @@ static int audio_ref_clk_probe(struct platform_device *pdev)
"qcom,codec-lpass-ext-clk-freq",
&clk_freq);
if (!ret) {
clk_priv->clk_cfg.clk_freq_in_hz = clk_freq;
#ifdef CONFIG_AUDIO_PRM
clk_priv->prm_clk_cfg.clk_freq_in_hz = clk_freq;
#endif
@@ -668,7 +658,6 @@ static int audio_ref_clk_probe(struct platform_device *pdev)
"qcom,codec-lpass-clk-id",
&clk_id);
if (!ret) {
clk_priv->clk_cfg.clk_id = clk_id;
#ifdef CONFIG_AUDIO_PRM
clk_priv->prm_clk_cfg.clk_id = clk_id;
dev_dbg(&pdev->dev, "%s: PRM ext-clk freq: %d, lpass clk_id: %d, clk_src: %d\n",
@@ -677,10 +666,6 @@ static int audio_ref_clk_probe(struct platform_device *pdev)
#endif
}
dev_dbg(&pdev->dev, "%s: ext-clk freq: %d, lpass clk_id: %d, clk_src: %d\n",
__func__, clk_priv->clk_cfg.clk_freq_in_hz,
clk_priv->clk_cfg.clk_id, clk_priv->clk_src);
dev_dbg(&pdev->dev, "%s: PRM2 ext-clk freq: %d, lpass clk_id: %d, clk_src: %d\n",
__func__, clk_priv->prm_clk_cfg.clk_freq_in_hz,
clk_priv->prm_clk_cfg.clk_id, clk_priv->clk_src);

9
asoc/codecs/lpass-cdc/lpass-cdc-rx-macro.c
ファイルの表示

@@ -2020,6 +2020,9 @@ static int lpass_cdc_rx_macro_config_classh(struct snd_soc_component *component,
struct lpass_cdc_rx_macro_priv *rx_priv,
int interp_n, int event)
{
if (interp_n == INTERP_AUX)
return 0; /* AUX does not have Class-H */
if (SND_SOC_DAPM_EVENT_OFF(event)) {
lpass_cdc_rx_macro_enable_clsh_block(rx_priv, false);
return 0;
@@ -2794,7 +2797,8 @@ static int lpass_cdc_rx_macro_enable_interp_clk(struct snd_soc_component *compon
lpass_cdc_rx_macro_config_classh(component, rx_priv,
interp_idx, event);
/*select PCM path and swr clk is 9.6MHz*/
if (rx_priv->is_pcm_enabled && !rx_priv->is_native_on) {
if (rx_priv->is_pcm_enabled && !rx_priv->is_native_on &&
interp_idx != INTERP_AUX) {
if (rx_priv->pcm_select_users == 0)
snd_soc_component_update_bits(component,
LPASS_CDC_RX_TOP_SWR_CTRL, 0x02, 0x02);
@@ -2813,7 +2817,8 @@ static int lpass_cdc_rx_macro_enable_interp_clk(struct snd_soc_component *compon
snd_soc_component_update_bits(component, main_reg,
0x10, 0x10);
/*Unselect PCM path*/
if (rx_priv->is_pcm_enabled && !rx_priv->is_native_on) {
if (rx_priv->is_pcm_enabled && !rx_priv->is_native_on &&
interp_idx != INTERP_AUX) {
if (rx_priv->pcm_select_users == 1)
snd_soc_component_update_bits(component,
LPASS_CDC_RX_TOP_SWR_CTRL, 0x02, 0x00);

73
asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c
ファイルの表示

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/module.h>
@@ -899,9 +899,6 @@ static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, in
struct snd_soc_component *component = dai->component;
struct device *wsa_dev = NULL;
struct lpass_cdc_wsa_macro_priv *wsa_priv = NULL;
uint16_t j = 0, reg = 0, mix_reg = 0, dsm_reg = 0;
u16 int_mux_cfg0 = 0, int_mux_cfg1 = 0;
u8 int_mux_cfg0_val = 0, int_mux_cfg1_val = 0;
bool adie_lb = false;
if (mute)
@@ -909,45 +906,19 @@ static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, in
if (!lpass_cdc_wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__))
return -EINVAL;
switch (dai->id) {
case LPASS_CDC_WSA_MACRO_AIF1_PB:
case LPASS_CDC_WSA_MACRO_AIF_MIX1_PB:
for (j = 0; j < NUM_INTERPOLATORS; j++) {
reg = LPASS_CDC_WSA_RX0_RX_PATH_CTL +
(j * LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET);
mix_reg = LPASS_CDC_WSA_RX0_RX_PATH_MIX_CTL +
(j * LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET);
dsm_reg = LPASS_CDC_WSA_RX0_RX_PATH_CTL +
(j * LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET) +
LPASS_CDC_WSA_MACRO_RX_PATH_DSMDEM_OFFSET;
int_mux_cfg0 = LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG0 + j * 8;
int_mux_cfg1 = int_mux_cfg0 + 4;
int_mux_cfg0_val = snd_soc_component_read(component,
int_mux_cfg0);
int_mux_cfg1_val = snd_soc_component_read(component,
int_mux_cfg1);
if (snd_soc_component_read(component, dsm_reg) & 0x01) {
if (int_mux_cfg0_val || (int_mux_cfg1_val & 0x38))
snd_soc_component_update_bits(component, reg,
0x20, 0x20);
if (int_mux_cfg1_val & 0x07) {
snd_soc_component_update_bits(component, reg,
0x20, 0x20);
snd_soc_component_update_bits(component,
mix_reg, 0x20, 0x20);
}
}
}
lpass_cdc_wsa_pa_on(wsa_dev, adie_lb);
lpass_cdc_wsa_unmute_interpolator(dai);
lpass_cdc_wsa_macro_enable_vi_decimator(component);
break;
lpass_cdc_wsa_pa_on(wsa_dev, adie_lb);
lpass_cdc_wsa_unmute_interpolator(dai);
lpass_cdc_wsa_macro_enable_vi_decimator(component);
break;
default:
break;
break;
}
return 0;
}
static int lpass_cdc_wsa_macro_mclk_enable(
struct lpass_cdc_wsa_macro_priv *wsa_priv,
bool mclk_enable, bool dapm)
@@ -1221,6 +1192,12 @@ static int lpass_cdc_wsa_macro_disable_vi_feedback(struct snd_soc_dapm_widget *w
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
0x10, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
0x20, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
0x20, 0x00);
}
if (test_bit(LPASS_CDC_WSA_MACRO_TX1,
&wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) {
@@ -1238,6 +1215,12 @@ static int lpass_cdc_wsa_macro_disable_vi_feedback(struct snd_soc_dapm_widget *w
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
0x10, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
0x20, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
0x20, 0x00);
}
break;
}
@@ -1332,6 +1315,7 @@ static int lpass_cdc_wsa_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
u16 gain_reg;
int offset_val = 0;
int val = 0;
uint16_t mix_reg = 0;
dev_dbg(component->dev, "%s %d %s\n", __func__, event, w->name);
@@ -1345,8 +1329,16 @@ static int lpass_cdc_wsa_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
return 0;
}
mix_reg = LPASS_CDC_WSA_RX0_RX_PATH_MIX_CTL +
LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET * w->shift;
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
snd_soc_component_update_bits(component, mix_reg, 0x40, 0x40);
usleep_range(500, 510);
snd_soc_component_update_bits(component, mix_reg, 0x40, 0x00);
snd_soc_component_update_bits(component,
mix_reg, 0x20, 0x20);
lpass_cdc_wsa_macro_enable_swr(w, kcontrol, event);
val = snd_soc_component_read(component, gain_reg);
val += offset_val;
@@ -1651,6 +1643,8 @@ static int lpass_cdc_wsa_macro_enable_main_path(struct snd_soc_dapm_widget *w,
struct lpass_cdc_wsa_macro_priv *wsa_priv = NULL;
bool adie_lb = false;
dev_dbg(component->dev, "%s %d %s\n", __func__, event, w->name);
if (!lpass_cdc_wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__))
return -EINVAL;
@@ -1659,10 +1653,13 @@ static int lpass_cdc_wsa_macro_enable_main_path(struct snd_soc_dapm_widget *w,
LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET * w->shift;
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
snd_soc_component_update_bits(component, reg, 0x40, 0x40);
usleep_range(500, 510);
snd_soc_component_update_bits(component, reg, 0x40, 0x00);
snd_soc_component_update_bits(component,
reg, 0x20, 0x20);
if (lpass_cdc_wsa_macro_adie_lb(component, w->shift)) {
adie_lb = true;
snd_soc_component_update_bits(component,
reg, 0x20, 0x20);
lpass_cdc_wsa_pa_on(wsa_dev, adie_lb);
snd_soc_component_update_bits(component,
reg, 0x10, 0x00);

69
asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c
ファイルの表示

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/module.h>
@@ -904,9 +904,6 @@ static int lpass_cdc_wsa2_macro_mute_stream(struct snd_soc_dai *dai, int mute, i
struct snd_soc_component *component = dai->component;
struct device *wsa2_dev = NULL;
struct lpass_cdc_wsa2_macro_priv *wsa2_priv = NULL;
uint16_t j = 0, reg = 0, mix_reg = 0, dsm_reg = 0;
u16 int_mux_cfg0 = 0, int_mux_cfg1 = 0;
u8 int_mux_cfg0_val = 0, int_mux_cfg1_val = 0;
bool adie_lb = false;
if (mute)
@@ -914,45 +911,19 @@ static int lpass_cdc_wsa2_macro_mute_stream(struct snd_soc_dai *dai, int mute, i
if (!lpass_cdc_wsa2_macro_get_data(component, &wsa2_dev, &wsa2_priv, __func__))
return -EINVAL;
switch (dai->id) {
case LPASS_CDC_WSA2_MACRO_AIF1_PB:
case LPASS_CDC_WSA2_MACRO_AIF_MIX1_PB:
for (j = 0; j < NUM_INTERPOLATORS; j++) {
reg = LPASS_CDC_WSA2_RX0_RX_PATH_CTL +
(j * LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET);
mix_reg = LPASS_CDC_WSA2_RX0_RX_PATH_MIX_CTL +
(j * LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET);
dsm_reg = LPASS_CDC_WSA2_RX0_RX_PATH_CTL +
(j * LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET) +
LPASS_CDC_WSA2_MACRO_RX_PATH_DSMDEM_OFFSET;
int_mux_cfg0 = LPASS_CDC_WSA2_RX_INP_MUX_RX_INT0_CFG0 + j * 8;
int_mux_cfg1 = int_mux_cfg0 + 4;
int_mux_cfg0_val = snd_soc_component_read(component,
int_mux_cfg0);
int_mux_cfg1_val = snd_soc_component_read(component,
int_mux_cfg1);
if (snd_soc_component_read(component, dsm_reg) & 0x01) {
if (int_mux_cfg0_val || (int_mux_cfg1_val & 0x38))
snd_soc_component_update_bits(component, reg,
0x20, 0x20);
if (int_mux_cfg1_val & 0x07) {
snd_soc_component_update_bits(component, reg,
0x20, 0x20);
snd_soc_component_update_bits(component,
mix_reg, 0x20, 0x20);
}
}
}
lpass_cdc_wsa_pa_on(wsa2_dev, adie_lb);
lpass_cdc_wsa2_unmute_interpolator(dai);
lpass_cdc_wsa2_macro_enable_vi_decimator(component);
lpass_cdc_wsa_pa_on(wsa2_dev, adie_lb);
lpass_cdc_wsa2_unmute_interpolator(dai);
lpass_cdc_wsa2_macro_enable_vi_decimator(component);
break;
default:
break;
}
return 0;
}
static int lpass_cdc_wsa2_macro_mclk_enable(
struct lpass_cdc_wsa2_macro_priv *wsa2_priv,
bool mclk_enable, bool dapm)
@@ -1227,6 +1198,12 @@ static int lpass_cdc_wsa2_macro_disable_vi_feedback(struct snd_soc_dapm_widget *
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL,
0x10, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL,
0x20, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL,
0x20, 0x00);
}
if (test_bit(LPASS_CDC_WSA2_MACRO_TX1,
&wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) {
@@ -1244,6 +1221,12 @@ static int lpass_cdc_wsa2_macro_disable_vi_feedback(struct snd_soc_dapm_widget *
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL,
0x10, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL,
0x20, 0x00);
snd_soc_component_update_bits(component,
LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL,
0x20, 0x00);
}
break;
}
@@ -1338,6 +1321,7 @@ static int lpass_cdc_wsa2_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
u16 gain_reg;
int offset_val = 0;
int val = 0;
uint16_t mix_reg = 0;
dev_dbg(component->dev, "%s %d %s\n", __func__, event, w->name);
@@ -1351,8 +1335,15 @@ static int lpass_cdc_wsa2_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
return 0;
}
mix_reg = LPASS_CDC_WSA2_RX0_RX_PATH_MIX_CTL +
LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET * w->shift;
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
snd_soc_component_update_bits(component, mix_reg, 0x40, 0x40);
usleep_range(500, 510);
snd_soc_component_update_bits(component, mix_reg, 0x40, 0x00);
snd_soc_component_update_bits(component,
mix_reg, 0x20, 0x20);
lpass_cdc_wsa2_macro_enable_swr(w, kcontrol, event);
val = snd_soc_component_read(component, gain_reg);
val += offset_val;
@@ -1657,18 +1648,22 @@ static int lpass_cdc_wsa2_macro_enable_main_path(struct snd_soc_dapm_widget *w,
struct lpass_cdc_wsa2_macro_priv *wsa2_priv = NULL;
bool adie_lb = false;
dev_dbg(component->dev, "%s %d %s\n", __func__, event, w->name);
if (!lpass_cdc_wsa2_macro_get_data(component, &wsa2_dev, &wsa2_priv, __func__))
return -EINVAL;
reg = LPASS_CDC_WSA2_RX0_RX_PATH_CTL +
LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET * w->shift;
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
snd_soc_component_update_bits(component, reg, 0x40, 0x40);
usleep_range(500, 510);
snd_soc_component_update_bits(component, reg, 0x40, 0x00);
snd_soc_component_update_bits(component,
reg, 0x20, 0x20);
if (lpass_cdc_wsa2_macro_adie_lb(component, w->shift)) {
adie_lb = true;
snd_soc_component_update_bits(component,
reg, 0x20, 0x20);
lpass_cdc_wsa_pa_on(wsa2_dev, adie_lb);
snd_soc_component_update_bits(component,
reg, 0x10, 0x00);

4
asoc/codecs/lpass-cdc/lpass-cdc.c
ファイルの表示

@@ -233,8 +233,8 @@ static int lpass_cdc_register_notifier(void *handle,
{
struct lpass_cdc_priv *priv = (struct lpass_cdc_priv *)handle;
if (!priv) {
pr_err_ratelimited("%s: lpass_cdc priv is null\n", __func__);
if (!priv || !nblock) {
pr_err_ratelimited("%s: lpass_cdc priv or nblock is null\n", __func__);
return -EINVAL;
}
if (enable)

9
asoc/codecs/wcd-mbhc-adc.c
ファイルの表示

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/module.h>
#include <linux/init.h>
@@ -340,7 +340,7 @@ static int wcd_check_cross_conn(struct wcd_mbhc *mbhc)
if (mbhc->mbhc_cb->update_cross_conn_thr)
mbhc->mbhc_cb->update_cross_conn_thr(mbhc);
if (hphl_adc_res > mbhc->hphl_cross_conn_thr ||
if (hphl_adc_res > mbhc->hphl_cross_conn_thr &&
hphr_adc_res > mbhc->hphr_cross_conn_thr) {
plug_type = MBHC_PLUG_TYPE_GND_MIC_SWAP;
pr_debug("%s: Cross connection identified\n", __func__);
@@ -1138,6 +1138,11 @@ static irqreturn_t wcd_mbhc_adc_hs_ins_irq(int irq, void *data)
} while (--clamp_retry);
WCD_MBHC_RSC_LOCK(mbhc);
if (!(test_bit(WCD_MBHC_ELEC_HS_INS, &mbhc->intr_status))) {
WCD_MBHC_RSC_UNLOCK(mbhc);
return IRQ_HANDLED;
}
/*
* If current plug is headphone then there is no chance to
* get ADC complete interrupt, so connected cable should be

13
asoc/codecs/wcd-mbhc-v2.c
ファイルの表示

@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/module.h>
#include <linux/init.h>
@@ -1142,6 +1143,10 @@ static irqreturn_t wcd_mbhc_mech_plug_detect_irq(int irq, void *data)
pr_debug("%s: enter\n", __func__);
if (mbhc == NULL) {
pr_err("%s: NULL irq data\n", __func__);
return IRQ_NONE;
}
/* WCD USB AATC did not required mech plug detection, will receive
* insertion/removal events from UCSI layer
*/
@@ -1152,10 +1157,6 @@ static irqreturn_t wcd_mbhc_mech_plug_detect_irq(int irq, void *data)
}
#endif
if (mbhc == NULL) {
pr_err("%s: NULL irq data\n", __func__);
return IRQ_NONE;
}
if (unlikely((mbhc->mbhc_cb->lock_sleep(mbhc, true)) == false)) {
pr_warn("%s: failed to hold suspend\n", __func__);
r = IRQ_NONE;
@@ -1695,7 +1696,7 @@ static int wcd_mbhc_usbc_ana_event_handler(struct notifier_block *nb,
#endif
if (mbhc->mbhc_cb->clk_setup)
mbhc->mbhc_cb->clk_setup(mbhc->component, true);
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_L_DET_EN, 1);
#if IS_ENABLED(CONFIG_QCOM_WCD_USBSS_I2C)
if (unlikely((mbhc->mbhc_cb->lock_sleep(mbhc, true)) == false))
@@ -1712,8 +1713,6 @@ static int wcd_mbhc_usbc_ana_event_handler(struct notifier_block *nb,
WCD_MBHC_REG_READ(WCD_MBHC_MECH_DETECTION_TYPE, detection_type);
if ((mode == TYPEC_ACCESSORY_NONE) && !detection_type) {
wcd_usbss_switch_update(WCD_USBSS_AATC, WCD_USBSS_CABLE_DISCONNECT);
/* removal detected, disable L_DET_EN */
WCD_MBHC_REG_UPDATE_BITS(WCD_MBHC_L_DET_EN, 0);
if (unlikely((mbhc->mbhc_cb->lock_sleep(mbhc, true)) == false))
pr_warn("%s: failed to hold suspend\n", __func__);
else {

31
asoc/codecs/wcd939x/internal.h
ファイルの表示

@@ -43,6 +43,12 @@ enum {
TX_HDR_MAX,
};
enum xtalk_mode {
XTALK_NONE = 0,
XTALK_DIGITAL = 1,
XTALK_ANALOG = 2
};
extern struct regmap_config wcd939x_regmap_config;
struct comp_coeff_val {
@@ -151,11 +157,36 @@ struct wcd939x_micbias_setting {
u8 bias1_cfilt_sel;
};
struct wcd939x_xtalk_params {
u32 r_gnd_int_fet_mohms;
u32 r_gnd_par_route1_mohms;
u32 r_gnd_par_route2_mohms;
u32 r_gnd_ext_fet_mohms;
u32 r_conn_par_load_neg_mohms;
u32 r_aud_int_fet_l_mohms;
u32 r_aud_int_fet_r_mohms;
u32 r_aud_ext_fet_l_mohms;
u32 r_aud_ext_fet_r_mohms;
u32 r_conn_par_load_pos_l_mohms;
u32 r_conn_par_load_pos_r_mohms;
u32 r_gnd_res_tot_mohms;
u32 r_aud_res_tot_l_mohms;
u32 r_aud_res_tot_r_mohms;
u32 zl;
u32 zr;
u8 scale_l;
u8 alpha_l;
u8 scale_r;
u8 alpha_r;
enum xtalk_mode xtalk_config;
};
struct wcd939x_pdata {
struct device_node *rst_np;
struct device_node *rx_slave;
struct device_node *tx_slave;
struct wcd939x_micbias_setting micbias;
struct wcd939x_xtalk_params xtalk;
struct cdc_regulator *regulator;
int num_supplies;

10
asoc/codecs/wcd939x/wcd939x-registers.h
ファイルの表示

@@ -17,6 +17,11 @@ enum {
RD_WR_REG
};
enum {
WCD939X_VERSION_1_0,
WCD939X_VERSION_1_1,
WCD939X_VERSION_2_0,
};
#define WCD939X_ANA_BASE (WCD939X_BASE+0x01)
#define WCD939X_ANA_PAGE (WCD939X_ANA_BASE+0x00)
@@ -228,6 +233,11 @@ enum {
#define WCD939X_STATUS_REG_1 (WCD939X_EAR_BASE+0x06)
#define WCD939X_STATUS_REG_2 (WCD939X_EAR_BASE+0x07)
#define WCD939X_FLYBACK_NEW_BASE (WCD939X_BASE+0xf7)
#define WCD939X_FLYBACK_NEW_CTRL_2 (WCD939X_FLYBACK_NEW_BASE+0x00)
#define WCD939X_FLYBACK_NEW_CTRL_3 (WCD939X_FLYBACK_NEW_BASE+0x01)
#define WCD939X_FLYBACK_NEW_CTRL_4 (WCD939X_FLYBACK_NEW_BASE+0x02)
#define WCD939X_ANA_NEW_BASE (WCD939X_BASE+0x101)
#define WCD939X_ANA_NEW_PAGE (WCD939X_ANA_NEW_BASE+0x00)

12
asoc/codecs/wcd939x/wcd939x-regmap.c
ファイルの表示

@@ -185,6 +185,9 @@ static struct reg_default wcd939x_defaults[] = {
{WCD939X_EAR_TEST_CTL, 0x00},
{WCD939X_STATUS_REG_1, 0x00},
{WCD939X_STATUS_REG_2, 0x08},
{WCD939X_FLYBACK_NEW_CTRL_2, 0x00},
{WCD939X_FLYBACK_NEW_CTRL_3, 0x00},
{WCD939X_FLYBACK_NEW_CTRL_4, 0x44},
{WCD939X_ANA_NEW_PAGE, 0x00},
{WCD939X_ANA_HPH2, 0x00},
{WCD939X_ANA_HPH3, 0x00},
@@ -569,14 +572,6 @@ static struct reg_default wcd939x_defaults[] = {
{WCD939X_DSD_HPHR_CFG5, 0x00},
};
static bool wcd939x_readable_register(struct device *dev, unsigned int reg)
{
if (reg <= WCD939X_BASE + 1)
return 0;
return wcd939x_reg_access[WCD939X_REG(reg)] & RD_REG;
}
static bool wcd939x_writeable_register(struct device *dev, unsigned int reg)
{
if (reg <= WCD939X_BASE + 1)
@@ -602,7 +597,6 @@ struct regmap_config wcd939x_regmap_config = {
.num_reg_defaults = ARRAY_SIZE(wcd939x_defaults),
.max_register = WCD939X_MAX_REGISTER,
.volatile_reg = wcd939x_volatile_register,
.readable_reg = wcd939x_readable_register,
.writeable_reg = wcd939x_writeable_register,
.reg_format_endian = REGMAP_ENDIAN_NATIVE,
.val_format_endian = REGMAP_ENDIAN_NATIVE,

4
asoc/codecs/wcd939x/wcd939x-tables.c
ファイルの表示

@@ -183,6 +183,9 @@ const u8 wcd939x_reg_access[WCD939X_NUM_REGISTERS] = {
[WCD939X_REG(WCD939X_EAR_TEST_CTL)] = RD_WR_REG,
[WCD939X_REG(WCD939X_STATUS_REG_1)] = RD_REG,
[WCD939X_REG(WCD939X_STATUS_REG_2)] = RD_REG,
[WCD939X_REG(WCD939X_FLYBACK_NEW_CTRL_2)] = RD_WR_REG,
[WCD939X_REG(WCD939X_FLYBACK_NEW_CTRL_3)] = RD_WR_REG,
[WCD939X_REG(WCD939X_FLYBACK_NEW_CTRL_4)] = RD_WR_REG,
[WCD939X_REG(WCD939X_ANA_NEW_PAGE)] = RD_WR_REG,
[WCD939X_REG(WCD939X_ANA_HPH2)] = RD_WR_REG,
[WCD939X_REG(WCD939X_ANA_HPH3)] = RD_WR_REG,
@@ -566,3 +569,4 @@ const u8 wcd939x_reg_access[WCD939X_NUM_REGISTERS] = {
[WCD939X_REG(WCD939X_DSD_HPHR_CFG4)] = RD_WR_REG,
[WCD939X_REG(WCD939X_DSD_HPHR_CFG5)] = RD_WR_REG,
};

622
asoc/codecs/wcd939x/wcd939x.c
ファイルの表示

@@ -11,6 +11,7 @@
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/component.h>
#include <linux/stringify.h>
#include <sound/soc.h>
#include <sound/tlv.h>
#include <soc/soundwire.h>
@@ -37,7 +38,6 @@
#define NUM_SWRS_DT_PARAMS 5
#define WCD939X_VARIANT_ENTRY_SIZE 32
#define WCD939X_VERSION_1_0 1
#define WCD939X_VERSION_ENTRY_SIZE 32
#define ADC_MODE_VAL_HIFI 0x01
@@ -53,6 +53,15 @@
#define COMP_MAX_COEFF 25
#define HPH_MODE_MAX 4
#define FLOAT_TO_FIXED (1 << 12)
#define MAX_XTALK_SCALE 31
#define MAX_XTALK_ALPHA 255
#define MAX_RLOAD_OHMS 1000
#define MAX_IMPEDANCE_MOHMS 20000
#define OHMS_TO_MILLIOHMS 1000
#define XTALK_L_CH_NUM 0
#define XTALK_R_CH_NUM 1
#define DAPM_MICBIAS1_STANDALONE "MIC BIAS1 Standalone"
#define DAPM_MICBIAS2_STANDALONE "MIC BIAS2 Standalone"
#define DAPM_MICBIAS3_STANDALONE "MIC BIAS3 Standalone"
@@ -121,6 +130,7 @@ static u8 tx_mode_bit[] = {
[ADC_MODE_ULP2] = 0x20,
};
extern const u8 wcd939x_reg_access[WCD939X_NUM_REGISTERS];
static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
@@ -164,6 +174,20 @@ static struct regmap_irq_chip wcd939x_regmap_irq_chip = {
.irq_drv_data = NULL,
};
static bool wcd939x_readable_register(struct device *dev, unsigned int reg)
{
struct wcd939x_priv *wcd939x = dev_get_drvdata(dev);
if (reg <= WCD939X_BASE + 1)
return 0;
if (reg >= WCD939X_FLYBACK_NEW_CTRL_2 && reg <= WCD939X_FLYBACK_NEW_CTRL_4) {
if (wcd939x && wcd939x->version == WCD939X_VERSION_1_0)
return 0;
}
return wcd939x_reg_access[WCD939X_REG(reg)] & RD_REG;
}
static int wcd939x_handle_post_irq(void *data)
{
struct wcd939x_priv *wcd939x = data;
@@ -357,11 +381,6 @@ static int wcd939x_set_swr_clk_rate(struct snd_soc_component *component,
static int wcd939x_init_reg(struct snd_soc_component *component)
{
struct wcd939x_priv *wcd939x = snd_soc_component_get_drvdata(component);
if (!wcd939x->hph_pcm_enabled)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(VBG_FINE_ADJ, VBG_FINE_ADJ, 0x04));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(BIAS, ANALOG_BIAS_EN, 0x01));
snd_soc_component_update_bits(component,
@@ -376,8 +395,6 @@ static int wcd939x_init_reg(struct snd_soc_component *component)
REG_FIELD_VALUE(RDAC_HD2_CTL_L, HD2_RES_DIV_CTL_L, 0x15));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(RDAC_HD2_CTL_R, HD2_RES_DIV_CTL_R, 0x15));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(REFBUFF_UHQA_CTL, SPARE_BITS, 0x02));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(CDC_DMIC_CTL, CLK_SCALE_EN, 0x01));
@@ -685,11 +702,13 @@ static int wcd939x_rx_connect_port(struct snd_soc_component *component,
return ret;
}
static int wcd939x_rx_clk_enable(struct snd_soc_component *component)
static int wcd939x_rx_clk_enable(struct snd_soc_component *component, int rx_num)
{
struct wcd939x_priv *wcd939x = snd_soc_component_get_drvdata(component);
dev_dbg(component->dev, "%s rx_clk_cnt: %d\n", __func__, wcd939x->rx_clk_cnt);
if (wcd939x->rx_clk_cnt == 0) {
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(RX_SUPPLIES, RX_BIAS_ENABLE, 0x01));
@@ -710,12 +729,6 @@ static int wcd939x_rx_clk_enable(struct snd_soc_component *component)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(CDC_DIG_CLK_CTL, RXD2_CLK_EN, 0x01));
if (wcd939x->hph_pcm_enabled) {
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(PA_GAIN_CTL_L, RX_SUPPLY_LEVEL, 0x01));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(VNEG_CTRL_4, ILIM_SEL, 0x02));
}
}
wcd939x->rx_clk_cnt++;
@@ -726,6 +739,11 @@ static int wcd939x_rx_clk_disable(struct snd_soc_component *component)
{
struct wcd939x_priv *wcd939x = snd_soc_component_get_drvdata(component);
dev_dbg(component->dev, "%s rx_clk_cnt: %d\n", __func__, wcd939x->rx_clk_cnt);
if (wcd939x->rx_clk_cnt == 0)
return 0;
wcd939x->rx_clk_cnt--;
if (wcd939x->rx_clk_cnt == 0) {
@@ -782,8 +800,12 @@ static int wcd939x_config_power_mode(struct snd_soc_component *component,
{
switch (event) {
case SND_SOC_DAPM_POST_PMU:
case SND_SOC_DAPM_PRE_PMU:
if (mode == CLS_H_ULP) {
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(REFBUFF_UHQA_CTL, REFBUFP_IOUT_CTL, 0x2));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(REFBUFF_UHQA_CTL, REFBUFN_IOUT_CTL, 0x2));
if (index == WCD939X_HPHL) {
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(CTL12, ZONE3_RMS, 0x21));
@@ -832,10 +854,31 @@ static int wcd939x_config_power_mode(struct snd_soc_component *component,
REG_FIELD_VALUE(R_CTL17, PATH_GAIN, 0x00));
}
}
break;
case SND_SOC_DAPM_POST_PMD:
if (mode == CLS_H_ULP) {
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(REFBUFF_UHQA_CTL, REFBUFN_IOUT_CTL, 0x0));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(REFBUFF_UHQA_CTL, REFBUFP_IOUT_CTL, 0x0));
}
break;
}
return 0;
}
static int wcd939x_get_usbss_hph_power_mode(int hph_mode)
{
switch (hph_mode) {
case CLS_H_HIFI:
case CLS_H_LOHIFI:
return 0x4;
default:
/* set default mode to ULP */
return 0x2;
}
}
static int wcd939x_enable_hph_pcm_index(struct snd_soc_component *component,
int event, int hph)
{
@@ -957,9 +1000,177 @@ static int wcd939x_config_compander(struct snd_soc_component *component,
return 0;
}
static u8 get_xtalk_scale(u32 gain)
{
u8 i;
int target = FLOAT_TO_FIXED / ((int) gain);
int residue = target;
for (i = 0; i <= MAX_XTALK_SCALE; i++) {
residue = target - (1 << ((int)((u32) i)));
if (residue <= 0)
return i;
}
return MAX_XTALK_SCALE;
}
static u8 get_xtalk_alpha(u32 gain, u8 scale)
{
u32 two_exp_scale = 1 << ((u32) scale);
u32 round_offset = FLOAT_TO_FIXED / 2;
u32 alpha = (((gain * two_exp_scale - FLOAT_TO_FIXED) * 255) + round_offset)
/ FLOAT_TO_FIXED;
return (alpha <= MAX_XTALK_ALPHA) ? ((u8) alpha) : MAX_XTALK_ALPHA;
}
static u32 get_r_gnd_res_tot_mohms(u32 r_gnd_int_fet_mohms, u32 r_gnd_par_route1_mohms,
u32 r_gnd_par_route2_mohms, u32 r_gnd_ext_fet_mohms,
u32 r_conn_par_load_neg_mohms)
{
return r_gnd_int_fet_mohms + r_gnd_par_route1_mohms + r_gnd_par_route2_mohms +
r_gnd_ext_fet_mohms + r_conn_par_load_neg_mohms;
}
static u32 get_r_aud_res_tot_mohms(u32 r_aud_int_fet_mohms, u32 r_aud_ext_fet_mohms,
u32 r_conn_par_load_pos_mohms)
{
return r_aud_int_fet_mohms + r_aud_ext_fet_mohms + r_conn_par_load_pos_mohms;
}
static u32 get_v_common_gnd_factor(u32 r_gnd_res_tot_mohms, u32 r_load_mohms,
u32 r_aud_res_tot_mohms)
{
return FLOAT_TO_FIXED * r_gnd_res_tot_mohms /
(r_load_mohms + r_aud_res_tot_mohms + r_gnd_res_tot_mohms);
}
static u32 get_v_feedback_tap_factor(u32 r_gnd_int_fet_mohms, u32 r_gnd_par_route1_mohms,
u32 r_load_mohms, u32 r_gnd_res_tot_mohms,
u32 r_aud_res_tot_mohms)
{
return FLOAT_TO_FIXED * (r_gnd_int_fet_mohms + r_gnd_par_route1_mohms) /
(r_load_mohms + r_gnd_res_tot_mohms + r_aud_res_tot_mohms);
}
static u32 get_v_feedback_tap_factor_analog(u32 r_conn_par_load_neg_mohms, u32 r_load_mohms,
u32 r_gnd_res_tot_mohms, u32 r_aud_res_tot_mohms)
{
return FLOAT_TO_FIXED * (r_gnd_res_tot_mohms - r_conn_par_load_neg_mohms) /
(r_load_mohms + r_gnd_res_tot_mohms + r_aud_res_tot_mohms);
}
static u32 get_xtalk_gain(u32 v_common_gnd_factor, u32 v_feedback_tap_factor)
{
return v_common_gnd_factor - v_feedback_tap_factor;
}
static void get_xtalk_scale_and_alpha(struct snd_soc_component *component, int xtalk_indx,
u8 *scale, u8 *alpha)
{
u32 r_aud_int_fet_mohms = 0, r_aud_ext_fet_mohms = 0, r_conn_par_load_pos_mohms = 0,
r_load_mohms = 32360, r_aud_res_tot_mohms = 0, v_common_gnd_factor = 0,
v_feedback_tap_factor = 0, xtalk_gain = 0, zl = 0, zr = 0;
struct wcd939x_priv *wcd939x = NULL;
struct wcd939x_pdata *pdata = NULL;
if ((xtalk_indx != XTALK_L_CH_NUM) && (xtalk_indx != XTALK_R_CH_NUM))
goto err_data;
wcd939x = snd_soc_component_get_drvdata(component);
if (!wcd939x->dev)
goto err_data;
pdata = dev_get_platdata(wcd939x->dev);
if (pdata->xtalk.xtalk_config == XTALK_NONE)
goto err_data;
/* Get headphone impedance for r_load */
wcd939x_mbhc_get_impedance(wcd939x->mbhc, &zl, &zr);
if (xtalk_indx == XTALK_L_CH_NUM) {
if (zl > MAX_RLOAD_OHMS || zl == 0) {
pdata->xtalk.scale_l = MAX_XTALK_SCALE;
pdata->xtalk.alpha_l = MAX_XTALK_ALPHA;
pdata->xtalk.zl = 0;
goto err_data;
}
/* Use cached alpha and scale for the same headphone load */
if (zl == pdata->xtalk.zl) {
*alpha = pdata->xtalk.alpha_l;
*scale = pdata->xtalk.scale_l;
return;
}
pdata->xtalk.zl = zl;
} else {
if (zr > MAX_RLOAD_OHMS || zr == 0) {
pdata->xtalk.scale_r = MAX_XTALK_SCALE;
pdata->xtalk.alpha_r = MAX_XTALK_ALPHA;
pdata->xtalk.zr = 0;
goto err_data;
}
/* Use cached alpha and scale for the same headphone load */
if (zr == pdata->xtalk.zr) {
*alpha = pdata->xtalk.alpha_r;
*scale = pdata->xtalk.scale_r;
return;
}
pdata->xtalk.zr = zr;
}
/* Channel-dependent impedance parameters */
if (xtalk_indx == XTALK_L_CH_NUM) {
r_aud_int_fet_mohms = pdata->xtalk.r_aud_int_fet_l_mohms;
r_aud_ext_fet_mohms = pdata->xtalk.r_aud_ext_fet_l_mohms;
r_conn_par_load_pos_mohms = pdata->xtalk.r_conn_par_load_pos_l_mohms;
r_aud_res_tot_mohms = pdata->xtalk.r_aud_res_tot_l_mohms;
r_load_mohms = pdata->xtalk.zl * OHMS_TO_MILLIOHMS;
} else {
r_aud_int_fet_mohms = pdata->xtalk.r_aud_int_fet_r_mohms;
r_aud_ext_fet_mohms = pdata->xtalk.r_aud_ext_fet_r_mohms;
r_conn_par_load_pos_mohms = pdata->xtalk.r_conn_par_load_pos_r_mohms;
r_aud_res_tot_mohms = pdata->xtalk.r_aud_res_tot_r_mohms;
r_load_mohms = pdata->xtalk.zr * OHMS_TO_MILLIOHMS;
}
/* Xtalk gain calculation */
v_common_gnd_factor = get_v_common_gnd_factor(pdata->xtalk.r_gnd_res_tot_mohms,
r_load_mohms,
r_aud_res_tot_mohms);
if (pdata->xtalk.xtalk_config == XTALK_ANALOG) {
v_feedback_tap_factor = get_v_feedback_tap_factor_analog(
pdata->xtalk.r_conn_par_load_neg_mohms,
r_load_mohms,
pdata->xtalk.r_gnd_res_tot_mohms,
r_aud_res_tot_mohms);
} else {
v_feedback_tap_factor = get_v_feedback_tap_factor(
pdata->xtalk.r_gnd_int_fet_mohms,
pdata->xtalk.r_gnd_par_route1_mohms,
r_load_mohms,
pdata->xtalk.r_gnd_res_tot_mohms,
r_aud_res_tot_mohms);
}
xtalk_gain = get_xtalk_gain(v_common_gnd_factor, v_feedback_tap_factor);
/* Store scale and alpha values */
*scale = get_xtalk_scale(xtalk_gain);
*alpha = get_xtalk_alpha(xtalk_gain, *scale);
if (xtalk_indx == XTALK_L_CH_NUM) {
pdata->xtalk.scale_l = *scale;
pdata->xtalk.alpha_l = *alpha;
} else {
pdata->xtalk.scale_r = *scale;
pdata->xtalk.alpha_r = *alpha;
}
return;
err_data:
*scale = MAX_XTALK_SCALE;
*alpha = MAX_XTALK_ALPHA;
}
static int wcd939x_config_xtalk(struct snd_soc_component *component,
int event, int xtalk_indx)
{
u8 scale = MAX_XTALK_SCALE, alpha = MAX_XTALK_ALPHA;
u16 xtalk_sec0 = 0, xtalk_sec1 = 0, xtalk_sec2 = 0, xtalk_sec3 = 0;
struct wcd939x_priv *wcd939x = NULL;
@@ -968,7 +1179,7 @@ static int wcd939x_config_xtalk(struct snd_soc_component *component,
return -EINVAL;
}
wcd939x = snd_soc_component_get_drvdata(component);
wcd939x = snd_soc_component_get_drvdata(component);
if (!wcd939x->xtalk_enabled[xtalk_indx])
return 0;
@@ -979,14 +1190,16 @@ static int wcd939x_config_xtalk(struct snd_soc_component *component,
switch(event) {
case SND_SOC_DAPM_PRE_PMU:
xtalk_sec0 = WCD939X_HPHL_RX_PATH_SEC0 + (xtalk_indx * WCD939X_XTALK_OFFSET);
xtalk_sec1 = WCD939X_HPHL_RX_PATH_SEC1 + (xtalk_indx * WCD939X_XTALK_OFFSET);
xtalk_sec2 = WCD939X_HPHL_RX_PATH_SEC2 + (xtalk_indx * WCD939X_XTALK_OFFSET);
xtalk_sec3 = WCD939X_HPHL_RX_PATH_SEC3 + (xtalk_indx * WCD939X_XTALK_OFFSET);
snd_soc_component_update_bits(component, xtalk_sec1, 0xFF, 0xFE);
snd_soc_component_update_bits(component, xtalk_sec0, 0x1F, 0x06);
/* Determine scale and alpha */
get_xtalk_scale_and_alpha(component, xtalk_indx, &scale, &alpha);
snd_soc_component_update_bits(component, xtalk_sec1, 0xFF, alpha);
snd_soc_component_update_bits(component, xtalk_sec0, 0x1F, scale);
snd_soc_component_update_bits(component, xtalk_sec3, 0xFF, 0x4F);
snd_soc_component_update_bits(component, xtalk_sec2, 0x1F, 0x11);
@@ -1006,6 +1219,26 @@ static int wcd939x_config_xtalk(struct snd_soc_component *component,
return 0;
}
static int wcd939x_rx3_mux(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
dev_dbg(component->dev, "%s event: %d wshift: %d wname: %s\n",
__func__, event, w->shift, w->name);
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
wcd939x_rx_clk_enable(component, w->shift);
break;
case SND_SOC_DAPM_POST_PMD:
wcd939x_rx_clk_disable(component);
break;
}
return 0;
}
static int wcd939x_rx_mux(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol,
int event)
@@ -1023,7 +1256,7 @@ static int wcd939x_rx_mux(struct snd_soc_dapm_widget *w,
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
wcd939x_rx_clk_enable(component);
wcd939x_rx_clk_enable(component, w->shift);
if (wcd939x->hph_pcm_enabled)
wcd939x_config_power_mode(component, event, w->shift, hph_mode);
wcd939x_config_compander(component, event, w->shift);
@@ -1032,14 +1265,21 @@ static int wcd939x_rx_mux(struct snd_soc_dapm_widget *w,
case SND_SOC_DAPM_POST_PMU:
wcd939x_config_xtalk(component, event, w->shift);
/*TBD: need to revisit , for both L & R we are updating, but in QCRG only once*/
if (wcd939x->hph_pcm_enabled)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(TOP_CFG0, HPH_DAC_RATE_SEL, 0x1));
if (wcd939x->hph_pcm_enabled) {
if (hph_mode == CLS_H_HIFI || hph_mode == CLS_AB_HIFI)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(TOP_CFG0, HPH_DAC_RATE_SEL, 0x1));
else
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(TOP_CFG0, HPH_DAC_RATE_SEL, 0x0));
}
wcd939x_enable_hph_pcm_index(component, event, w->shift);
break;
case SND_SOC_DAPM_POST_PMD:
wcd939x_config_xtalk(component, event, w->shift);
wcd939x_config_compander(component, event, w->shift);
if (wcd939x->hph_pcm_enabled)
wcd939x_config_power_mode(component, event, w->shift, hph_mode);
wcd939x_rx_clk_disable(component);
break;
@@ -1195,34 +1435,19 @@ static int wcd939x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
case SND_SOC_DAPM_PRE_PMU:
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(CDC_EAR_GAIN_CTL, EAR_EN, 0x01));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(CDC_DIG_CLK_CTL, RXD0_CLK_EN, 0x01));
if (wcd939x->comp1_enable)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(CDC_COMP_CTL_0, HPHL_COMP_EN, 0x01));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(EAR_DAC_CON, DAC_SAMPLE_EDGE_SEL, 0x00));
/* 5 msec delay as per HW requirement */
usleep_range(5000, 5010);
if (wcd939x->flyback_cur_det_disable == 0)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(EN, EN_CUR_DET, 0x00));
wcd939x->flyback_cur_det_disable++;
wcd_cls_h_fsm(component, &wcd939x->clsh_info,
WCD_CLSH_EVENT_PRE_DAC,
WCD_CLSH_STATE_EAR,
wcd939x->hph_mode);
CLS_AB_HIFI);
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(VNEG_CTRL_4, ILIM_SEL, 0xD));
break;
case SND_SOC_DAPM_POST_PMD:
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(CDC_COMP_CTL_0, HPHL_COMP_EN, 0x01));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(CDC_DIG_CLK_CTL, RXD0_CLK_EN, 0x00));
if (wcd939x->comp1_enable)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(CDC_COMP_CTL_0, HPHL_COMP_EN, 0x00));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(EAR_COMPANDER_CTL, GAIN_OVRD_REG, 0x00));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(EAR_DAC_CON, DAC_SAMPLE_EDGE_SEL, 0x01));
break;
@@ -1266,13 +1491,22 @@ static int wcd939x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(REFBUFF_LP_CTL, PREREF_FILT_BYPASS, 0x01));
}
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(VNEG_CTRL_4, ILIM_SEL, 0xD));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(HPH, HPHR_REF_ENABLE, 0x01));
wcd_clsh_set_hph_mode(component, hph_mode);
/* update USBSS power mode for AATC */
if (wcd939x->mbhc->wcd_mbhc.mbhc_cfg->enable_usbc_analog)
wcd_usbss_audio_config(NULL, WCD_USBSS_CONFIG_TYPE_POWER_MODE,
wcd939x_get_usbss_hph_power_mode(hph_mode));
/* update Mode for LOHIFI */
if (hph_mode == CLS_H_LOHIFI)
if (hph_mode == CLS_H_LOHIFI) {
snd_soc_component_write(component,
WCD939X_HPH_RDAC_BIAS_LOHIFI, 0x52);
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(HPH, PWR_LEVEL, 0x00));
}
/* 100 usec delay as per HW requirement */
usleep_range(100, 110);
set_bit(HPH_PA_DELAY, &wcd939x->status_mask);
@@ -1362,6 +1596,9 @@ static int wcd939x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
REG_FIELD_VALUE(HPH, HPHR_REF_ENABLE, 0x00));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(PDM_WD_CTL1, PDM_WD_EN, 0x00));
if (wcd939x->mbhc->wcd_mbhc.mbhc_cfg->enable_usbc_analog &&
!(snd_soc_component_read(component, WCD939X_HPH) & 0XC0))
wcd_usbss_audio_config(NULL, WCD_USBSS_CONFIG_TYPE_POWER_MODE, 1);
wcd_cls_h_fsm(component, &wcd939x->clsh_info,
WCD_CLSH_EVENT_POST_PA,
WCD_CLSH_STATE_HPHR,
@@ -1409,13 +1646,22 @@ static int wcd939x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(REFBUFF_LP_CTL, PREREF_FILT_BYPASS, 0x01));
}
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(VNEG_CTRL_4, ILIM_SEL, 0xD));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(HPH, HPHL_REF_ENABLE, 0x01));
wcd_clsh_set_hph_mode(component, hph_mode);
/* update USBSS power mode for AATC */
if (wcd939x->mbhc->wcd_mbhc.mbhc_cfg->enable_usbc_analog)
wcd_usbss_audio_config(NULL, WCD_USBSS_CONFIG_TYPE_POWER_MODE,
wcd939x_get_usbss_hph_power_mode(hph_mode));
/* update Mode for LOHIFI */
if (hph_mode == CLS_H_LOHIFI)
if (hph_mode == CLS_H_LOHIFI) {
snd_soc_component_write(component,
WCD939X_HPH_RDAC_BIAS_LOHIFI, 0x52);
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(HPH, PWR_LEVEL, 0x00));
}
/* 100 usec delay as per HW requirement */
usleep_range(100, 110);
set_bit(HPH_PA_DELAY, &wcd939x->status_mask);
@@ -1503,7 +1749,9 @@ static int wcd939x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
REG_FIELD_VALUE(HPH, HPHL_REF_ENABLE, 0x00));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(PDM_WD_CTL0, PDM_WD_EN, 0x00));
if (wcd939x->mbhc->wcd_mbhc.mbhc_cfg->enable_usbc_analog &&
!(snd_soc_component_read(component, WCD939X_HPH) & 0XC0))
wcd_usbss_audio_config(NULL, WCD_USBSS_CONFIG_TYPE_POWER_MODE, 1);
wcd_cls_h_fsm(component, &wcd939x->clsh_info,
WCD_CLSH_EVENT_POST_PA,
WCD_CLSH_STATE_HPHL,
@@ -1524,7 +1772,6 @@ static int wcd939x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
struct snd_soc_component *component =
snd_soc_dapm_to_component(w->dapm);
struct wcd939x_priv *wcd939x = snd_soc_component_get_drvdata(component);
int hph_mode = wcd939x->hph_mode;
int ret = 0;
dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
@@ -1540,23 +1787,20 @@ static int wcd939x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
*/
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(PDM_WD_CTL0, PDM_WD_EN, 0x03));
if (!wcd939x->comp1_enable)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(EAR_COMPANDER_CTL, GAIN_OVRD_REG, 0x01));
/* For EAR, use CLASS_AB regulator mode */
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(RX_SUPPLIES, REGULATOR_MODE, 0x01));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(EAR_COMPANDER_CTL, GAIN_OVRD_REG, 0x01));
break;
case SND_SOC_DAPM_POST_PMU:
/* 6 msec delay as per HW requirement */
usleep_range(6000, 6010);
if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI ||
hph_mode == CLS_AB_LP || hph_mode == CLS_AB_LOHIFI)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(RX_SUPPLIES, REGULATOR_MODE, 0x01));
if (wcd939x->update_wcd_event)
wcd939x->update_wcd_event(wcd939x->handle,
SLV_BOLERO_EVT_RX_MUTE,
(WCD_RX1 << 0x10));
wcd_enable_irq(&wcd939x->irq_info,
WCD939X_IRQ_EAR_PDM_WD_INT);
(WCD_RX3 << 0x10));
wcd_enable_irq(&wcd939x->irq_info, WCD939X_IRQ_EAR_PDM_WD_INT);
break;
case SND_SOC_DAPM_PRE_PMD:
wcd_disable_irq(&wcd939x->irq_info,
@@ -1564,12 +1808,11 @@ static int wcd939x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
if (wcd939x->update_wcd_event)
wcd939x->update_wcd_event(wcd939x->handle,
SLV_BOLERO_EVT_RX_MUTE,
(WCD_RX1 << 0x10 | 0x1));
(WCD_RX3 << 0x10 | 0x1));
break;
case SND_SOC_DAPM_POST_PMD:
if (!wcd939x->comp1_enable)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(EAR_COMPANDER_CTL, GAIN_OVRD_REG, 0x00));
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(EAR_COMPANDER_CTL, GAIN_OVRD_REG, 0x00));
/* 7 msec delay as per HW requirement */
usleep_range(7000, 7010);
snd_soc_component_update_bits(component,
@@ -1577,17 +1820,32 @@ static int wcd939x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
wcd_cls_h_fsm(component, &wcd939x->clsh_info,
WCD_CLSH_EVENT_POST_PA,
WCD_CLSH_STATE_EAR,
hph_mode);
wcd939x->flyback_cur_det_disable--;
if (wcd939x->flyback_cur_det_disable == 0)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(EN, EN_CUR_DET, 0x01));
CLS_AB_HIFI);
break;
};
return ret;
}
static int wcd939x_clsh_dummy(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol,
int event)
{
struct snd_soc_component *component =
snd_soc_dapm_to_component(w->dapm);
struct wcd939x_priv *wcd939x = snd_soc_component_get_drvdata(component);
int ret = 0;
dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
w->name, event);
if (SND_SOC_DAPM_EVENT_OFF(event))
ret = swr_slvdev_datapath_control(
wcd939x->rx_swr_dev,
wcd939x->rx_swr_dev->dev_num,
false);
return ret;
}
static int wcd939x_enable_clsh(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol,
int event)
@@ -3023,21 +3281,6 @@ static int wcd939x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
}
wcd939x->hph_mode = mode_val;
switch (mode_val) {
case CLS_H_HIFI:
case CLS_H_LOHIFI:
mode_val = 0x4;
break;
default:
/* set default mode to ULP */
mode_val = 0x2;
break;
}
#if IS_ENABLED(CONFIG_QCOM_WCD_USBSS_I2C)
wcd_usbss_audio_config(NULL, WCD_USBSS_CONFIG_TYPE_POWER_MODE, mode_val);
#endif
return 0;
}
@@ -3067,18 +3310,15 @@ static int wcd939x_ear_pa_gain_put(struct snd_kcontrol *kcontrol,
u8 ear_pa_gain = 0;
struct snd_soc_component *component =
snd_soc_kcontrol_component(kcontrol);
struct wcd939x_priv *wcd939x = snd_soc_component_get_drvdata(component);
dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
__func__, ucontrol->value.integer.value[0]);
ear_pa_gain = ucontrol->value.integer.value[0] << 2;
if (!wcd939x->comp1_enable) {
snd_soc_component_update_bits(component,
WCD939X_EAR_COMPANDER_CTL,
0x7C, ear_pa_gain);
}
snd_soc_component_update_bits(component,
WCD939X_EAR_COMPANDER_CTL,
0x7C, ear_pa_gain);
return 0;
}
@@ -3646,7 +3886,7 @@ static const struct snd_kcontrol_new tx_adc4_mux =
SOC_DAPM_ENUM("ADC4 MUX Mux", adc4_enum);
static const char * const rdac3_mux_text[] = {
"RX1", "RX3"
"RX3", "RX1"
};
@@ -3675,6 +3915,14 @@ static const struct soc_enum rx2_enum =
static const struct snd_kcontrol_new rx2_mux =
SOC_DAPM_ENUM("RX2 MUX Mux", rx2_enum);
static const char * const rx3_mux_text[] = {
"ZERO", "RX3 MUX"
};
static const struct soc_enum rx3_enum =
SOC_ENUM_SINGLE(SND_SOC_NOPM, 0, 0, rx3_mux_text);
static const struct snd_kcontrol_new rx3_mux =
SOC_DAPM_ENUM("RX3 MUX Mux", rx3_enum);
static const struct snd_soc_dapm_widget wcd939x_dapm_widgets[] = {
/*input widgets*/
@@ -3874,6 +4122,8 @@ static const struct snd_soc_dapm_widget wcd939x_dapm_widgets[] = {
SND_SOC_DAPM_SUPPLY_S("CLS_H_PORT", 1, SND_SOC_NOPM, 0, 0,
wcd939x_enable_clsh,
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_SUPPLY_S("CLS_H_DUMMY", 1, SND_SOC_NOPM, 0, 0,
wcd939x_clsh_dummy, SND_SOC_DAPM_POST_PMD),
/*rx widgets*/
SND_SOC_DAPM_PGA_E("EAR PGA", WCD939X_EAR, 7, 0, NULL, 0,
@@ -3910,6 +4160,8 @@ static const struct snd_soc_dapm_widget wcd939x_dapm_widgets[] = {
SND_SOC_DAPM_MUX_E("RX2 MUX", SND_SOC_NOPM, WCD_RX2, 0, &rx2_mux,
wcd939x_rx_mux, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_MUX_E("RX3 MUX", SND_SOC_NOPM, WCD_RX3, 0, &rx3_mux,
wcd939x_rx3_mux, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
wcd939x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
@@ -4071,8 +4323,9 @@ static const struct snd_soc_dapm_route wcd939x_audio_map[] = {
{"IN3_EAR", NULL, "WCD_RX_DUMMY"},
{"IN3_EAR", NULL, "VDD_BUCK"},
{"IN3_EAR", NULL, "CLS_H_PORT"},
{"RX3", NULL, "IN3_EAR"},
{"IN3_EAR", NULL, "CLS_H_DUMMY"},
{"RX3 MUX", NULL, "IN3_EAR"},
{"RX3", NULL, "RX3 MUX"},
{"RDAC3_MUX", "RX3", "RX3"},
{"RDAC3_MUX", "RX1", "RX1"},
{"RDAC3", NULL, "RDAC3_MUX"},
@@ -4099,8 +4352,12 @@ static ssize_t wcd939x_version_read(struct snd_info_entry *entry,
switch (priv->version) {
case WCD939X_VERSION_1_0:
case WCD939X_VERSION_1_1:
len = snprintf(buffer, sizeof(buffer), "WCD939X_1_0\n");
break;
case WCD939X_VERSION_2_0:
len = snprintf(buffer, sizeof(buffer), "WCD939X_2_0\n");
break;
default:
len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
}
@@ -4390,7 +4647,6 @@ static int wcd939x_soc_codec_probe(struct snd_soc_component *component)
goto err_hwdep;
}
}
wcd939x->version = WCD939X_VERSION_1_0;
/* Register event notifier */
wcd939x->nblock.notifier_call = wcd939x_event_notify;
if (wcd939x->register_notifier) {
@@ -4578,6 +4834,129 @@ static void wcd939x_dt_parse_micbias_info(struct device *dev,
}
}
static void init_xtalk_params(struct wcd939x_xtalk_params *xtalk)
{
xtalk->r_gnd_int_fet_mohms = 200;
xtalk->r_gnd_par_route1_mohms = 50;
xtalk->r_gnd_par_route2_mohms = 50;
xtalk->r_gnd_ext_fet_mohms = 650;
xtalk->r_conn_par_load_neg_mohms = 125;
xtalk->r_aud_int_fet_l_mohms = 200;
xtalk->r_aud_int_fet_r_mohms = 200;
xtalk->r_aud_ext_fet_l_mohms = 650;
xtalk->r_aud_ext_fet_r_mohms = 650;
xtalk->r_conn_par_load_pos_l_mohms = 7550;
xtalk->r_conn_par_load_pos_r_mohms = 7550;
xtalk->zl = 0;
xtalk->zr = 0;
xtalk->scale_l = MAX_XTALK_SCALE;
xtalk->alpha_l = MAX_XTALK_ALPHA;
xtalk->scale_r = MAX_XTALK_SCALE;
xtalk->alpha_r = MAX_XTALK_ALPHA;
xtalk->xtalk_config = XTALK_ANALOG;
}
static void parse_xtalk_param(struct device *dev, u32 default_val, u32 *prop_val_p,
char *prop)
{
int rc = 0;
if (of_find_property(dev->of_node, prop, NULL)) {
rc = wcd939x_read_of_property_u32(dev, prop, prop_val_p);
if ((!rc) && (*prop_val_p <= MAX_IMPEDANCE_MOHMS) && (*prop_val_p > 0))
return;
*prop_val_p = default_val;
dev_dbg(dev, "%s: %s OOB. Default value of %d will be used.\n", __func__, prop,
default_val);
} else {
*prop_val_p = default_val;
dev_dbg(dev, "%s: %s property not found. Default value of %d will be used.\n",
__func__, prop, default_val);
}
}
static void wcd939x_dt_parse_xtalk_info(struct device *dev, struct wcd939x_xtalk_params *xtalk)
{
u32 prop_val = 0;
int rc = 0;
init_xtalk_params(xtalk);
/* xtalk_config: Determine type of crosstalk: none (0), digital (1), or analog (2) */
if (of_find_property(dev->of_node, "qcom,xtalk-config", NULL)) {
rc = wcd939x_read_of_property_u32(dev, "qcom,xtalk-config", &prop_val);
if ((!rc) && (prop_val == XTALK_NONE || prop_val == XTALK_DIGITAL
|| prop_val == XTALK_ANALOG)) {
xtalk->xtalk_config = (enum xtalk_mode) prop_val;
} else
dev_dbg(dev, "%s: qcom,xtalk-config OOB. Default value of %s used.\n",
__func__, "XTALK_NONE");
} else
dev_dbg(dev,
"%s: qcom,xtalk-config property not found. Default value of %s used.\n",
__func__, "XTALK_NONE");
if (xtalk->xtalk_config == XTALK_NONE)
goto post_get_params;
/* r_gnd_int_fet_mohms */
parse_xtalk_param(dev, xtalk->r_gnd_int_fet_mohms, &prop_val,
"qcom,xtalk-r-gnd-int-fet-mohms");
xtalk->r_gnd_int_fet_mohms = prop_val;
/* r_gnd_par_route1_mohms */
parse_xtalk_param(dev, xtalk->r_gnd_par_route1_mohms, &prop_val,
"qcom,xtalk-r-gnd-par-route1-mohms");
xtalk->r_gnd_par_route1_mohms = prop_val;
/* r_gnd_par_route2_mohms */
parse_xtalk_param(dev, xtalk->r_gnd_par_route2_mohms, &prop_val,
"qcom,xtalk-r-gnd-par-route2-mohms");
xtalk->r_gnd_par_route2_mohms = prop_val;
/* r_gnd_ext_fet_mohms */
parse_xtalk_param(dev, xtalk->r_gnd_ext_fet_mohms, &prop_val,
"qcom,xtalk-r-gnd-ext-fet-mohms");
xtalk->r_gnd_ext_fet_mohms = prop_val;
/* r_conn_par_load_neg_mohms */
parse_xtalk_param(dev, xtalk->r_conn_par_load_neg_mohms, &prop_val,
"qcom,xtalk-r-conn-par-load-neg-mohms");
xtalk->r_conn_par_load_neg_mohms = prop_val;
/* r_aud_int_fet_l_mohms */
parse_xtalk_param(dev, xtalk->r_aud_int_fet_l_mohms, &prop_val,
"qcom,xtalk-r-aud-int-fet-l-mohms");
xtalk->r_aud_int_fet_l_mohms = prop_val;
/* r_aud_int_fet_r_mohms */
parse_xtalk_param(dev, xtalk->r_aud_int_fet_r_mohms, &prop_val,
"qcom,xtalk-r-aud-int-fet-r-mohms");
xtalk->r_aud_int_fet_r_mohms = prop_val;
/* r_aud_ext_fet_l_mohms */
parse_xtalk_param(dev, xtalk->r_aud_ext_fet_l_mohms, &prop_val,
"qcom,xtalk-r-aud-ext-fet-l-mohms");
xtalk->r_aud_ext_fet_l_mohms = prop_val;
/* r_aud_ext_fet_r_mohms */
parse_xtalk_param(dev, xtalk->r_aud_ext_fet_r_mohms, &prop_val,
"qcom,xtalk-r-aud-ext-fet-r-mohms");
xtalk->r_aud_ext_fet_r_mohms = prop_val;
/* r_conn_par_load_pos_l_mohms */
parse_xtalk_param(dev, xtalk->r_conn_par_load_pos_l_mohms, &prop_val,
"qcom,xtalk-r-conn-par-load-pos-l-mohms");
xtalk->r_conn_par_load_pos_l_mohms = prop_val;
/* r_conn_par_load_pos_r_mohms */
parse_xtalk_param(dev, xtalk->r_conn_par_load_pos_r_mohms, &prop_val,
"qcom,xtalk-r-conn-par-load-pos-r-mohms");
xtalk->r_conn_par_load_pos_r_mohms = prop_val;
post_get_params:
xtalk->r_gnd_res_tot_mohms = get_r_gnd_res_tot_mohms(xtalk->r_gnd_int_fet_mohms,
xtalk->r_gnd_par_route1_mohms,
xtalk->r_gnd_par_route2_mohms,
xtalk->r_gnd_ext_fet_mohms,
xtalk->r_conn_par_load_neg_mohms);
xtalk->r_aud_res_tot_l_mohms = get_r_aud_res_tot_mohms(xtalk->r_aud_int_fet_l_mohms,
xtalk->r_aud_ext_fet_l_mohms,
xtalk->r_conn_par_load_pos_l_mohms);
xtalk->r_aud_res_tot_r_mohms = get_r_aud_res_tot_mohms(xtalk->r_aud_int_fet_r_mohms,
xtalk->r_aud_ext_fet_r_mohms,
xtalk->r_conn_par_load_pos_r_mohms);
}
static int wcd939x_reset_low(struct device *dev)
{
struct wcd939x_priv *wcd939x = NULL;
@@ -4640,6 +5019,7 @@ struct wcd939x_pdata *wcd939x_populate_dt_data(struct device *dev)
pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
wcd939x_dt_parse_micbias_info(dev, &pdata->micbias);
wcd939x_dt_parse_xtalk_info(dev, &pdata->xtalk);
return pdata;
}
@@ -4675,11 +5055,54 @@ static struct snd_soc_dai_driver wcd939x_dai[] = {
},
};
static const struct reg_default reg_def_1_1[] = {
{WCD939X_VBG_FINE_ADJ, 0xA5},
{WCD939X_FLYBACK_NEW_CTRL_2, 0x0},
{WCD939X_FLYBACK_NEW_CTRL_3, 0x0},
{WCD939X_FLYBACK_NEW_CTRL_4, 0x44},
{WCD939X_PA_GAIN_CTL_R, 0x80},
};
static const struct reg_default reg_def_2_0[] = {
{WCD939X_INTR_MASK_2, 0x3E},
};
static const char *version_to_str(u32 version)
{
switch (version) {
case WCD939X_VERSION_1_0:
return __stringify(WCD939X_1_0);
case WCD939X_VERSION_1_1:
return __stringify(WCD939X_1_1);
case WCD939X_VERSION_2_0:
return __stringify(WCD939X_2_0);
}
return NULL;
}
static void wcd939x_update_regmap_cache(struct wcd939x_priv *wcd939x)
{
if (wcd939x->version == WCD939X_VERSION_1_0)
return;
if (wcd939x->version >= WCD939X_VERSION_1_1) {
for (int i = 0; i < ARRAY_SIZE(reg_def_1_1); ++i)
regmap_write(wcd939x->regmap, reg_def_1_1[i].reg, reg_def_1_1[i].def);
}
if (wcd939x->version == WCD939X_VERSION_2_0) {
for (int i = 0; i < ARRAY_SIZE(reg_def_2_0); ++i)
regmap_write(wcd939x->regmap, reg_def_2_0[i].reg, reg_def_2_0[i].def);
}
}
static int wcd939x_bind(struct device *dev)
{
int ret = 0, i = 0;
struct wcd939x_pdata *pdata = dev_get_platdata(dev);
struct wcd939x_priv *wcd939x = dev_get_drvdata(dev);
u8 id1 = 0, status1 = 0;
/*
* Add 5msec delay to provide sufficient time for
@@ -4713,6 +5136,18 @@ static int wcd939x_bind(struct device *dev)
swr_init_port_params(wcd939x->tx_swr_dev, SWR_NUM_PORTS,
wcd939x->swr_tx_port_params);
/* Check WCD9395 version */
swr_read(wcd939x->tx_swr_dev, wcd939x->tx_swr_dev->dev_num,
WCD939X_CHIP_ID1, &id1, 1);
swr_read(wcd939x->tx_swr_dev, wcd939x->tx_swr_dev->dev_num,
WCD939X_STATUS_REG_1, &status1, 1);
if (id1 == 0)
wcd939x->version = ((status1 & 0x3) ? WCD939X_VERSION_1_1 : WCD939X_VERSION_1_0);
else if (id1 == 1)
wcd939x->version = WCD939X_VERSION_2_0;
dev_info(dev, "%s: wcd9395 version: %s\n", __func__,
version_to_str(wcd939x->version));
wcd939x_regmap_config.readable_reg = wcd939x_readable_register;
wcd939x->regmap = devm_regmap_init_swr(wcd939x->tx_swr_dev,
&wcd939x_regmap_config);
if (!wcd939x->regmap) {
@@ -4720,6 +5155,7 @@ static int wcd939x_bind(struct device *dev)
__func__);
goto err;
}
wcd939x_update_regmap_cache(wcd939x);
/* Set all interupts as edge triggered */
for (i = 0; i < wcd939x_regmap_irq_chip.num_regs; i++)

2
asoc/codecs/wsa883x/internal.h
ファイルの表示

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef WSA883X_INTERNAL_H
@@ -125,6 +126,7 @@ struct wsa883x_priv {
unsigned long status_mask;
struct snd_soc_dai_driver *dai_driver;
struct snd_soc_component_driver *driver;
unsigned long port_status_mask;
};
#endif /* WSA883X_INTERNAL_H */

22
asoc/codecs/wsa883x/wsa883x.c
ファイルの表示

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/module.h>
@@ -166,6 +167,11 @@ enum {
WSA883X_NUM_IRQS,
};
enum {
COMP_PORT_EN_STATUS_BIT = 0,
VISENSE_EN_STATUS_BIT,
};
static const struct regmap_irq wsa883x_irqs[WSA883X_NUM_IRQS] = {
REGMAP_IRQ_REG(WSA883X_IRQ_INT_SAF2WAR, 0, 0x01),
REGMAP_IRQ_REG(WSA883X_IRQ_INT_WAR2SAF, 0, 0x02),
@@ -1081,6 +1087,7 @@ static int wsa883x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
set_bit(COMP_PORT_EN_STATUS_BIT, &wsa883x->port_status_mask);
}
if (wsa883x->visense_enable) {
wsa883x_set_port(component, SWR_VISENSE_PORT,
@@ -1088,6 +1095,7 @@ static int wsa883x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
set_bit(VISENSE_EN_STATUS_BIT, &wsa883x->port_status_mask);
}
swr_connect_port(wsa883x->swr_slave, &port_id[0], num_port,
&ch_mask[0], &ch_rate[0], &num_ch[0],
@@ -1103,19 +1111,23 @@ static int wsa883x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&port_type[num_port]);
++num_port;
if (wsa883x->comp_enable) {
if (wsa883x->comp_enable &&
test_bit(COMP_PORT_EN_STATUS_BIT, &wsa883x->port_status_mask)) {
wsa883x_set_port(component, SWR_COMP_PORT,
&port_id[num_port], &num_ch[num_port],
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
clear_bit(COMP_PORT_EN_STATUS_BIT, &wsa883x->port_status_mask);
}
if (wsa883x->visense_enable) {
if (wsa883x->visense_enable &&
test_bit(VISENSE_EN_STATUS_BIT, &wsa883x->port_status_mask)) {
wsa883x_set_port(component, SWR_VISENSE_PORT,
&port_id[num_port], &num_ch[num_port],
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
clear_bit(VISENSE_EN_STATUS_BIT, &wsa883x->port_status_mask);
}
swr_disconnect_port(wsa883x->swr_slave, &port_id[0], num_port,
&ch_mask[0], &port_type[0]);
@@ -1180,7 +1192,8 @@ static int wsa883x_spkr_event(struct snd_soc_dapm_widget *w,
/* Force remove group */
swr_remove_from_group(wsa883x->swr_slave,
wsa883x->swr_slave->dev_num);
if (wsa883x->comp_enable)
if (wsa883x->comp_enable &&
test_bit(COMP_PORT_EN_STATUS_BIT, &wsa883x->port_status_mask))
snd_soc_component_update_bits(component,
WSA883X_DRE_CTL_0,
0x07,
@@ -1612,7 +1625,8 @@ static int wsa883x_event_notify(struct notifier_block *nb,
WSA883X_IRQ_INT_PDM_WD);
/* Added delay as per HW sequence */
usleep_range(3000, 3100);
if (wsa883x->comp_enable) {
if (wsa883x->comp_enable &&
test_bit(COMP_PORT_EN_STATUS_BIT, &wsa883x->port_status_mask)) {
snd_soc_component_update_bits(wsa883x->component,
WSA883X_DRE_CTL_1,
0x01, 0x00);

1
asoc/codecs/wsa884x/internal.h
ファイルの表示

@@ -397,6 +397,7 @@ struct wsa884x_priv {
int num_supplies;
struct regulator_bulk_data *supplies;
unsigned long status_mask;
unsigned long port_status_mask;
struct snd_soc_dai_driver *dai_driver;
struct snd_soc_component_driver *driver;
int noise_gate_mode;

41
asoc/codecs/wsa884x/wsa884x.c
ファイルの表示

@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/module.h>
@@ -145,6 +145,12 @@ static const struct wsa_reg_mask_val reg_init_2S[] = {
{REG_FIELD_VALUE(DAC_VCM_CTRL_REG7, DAC_VCM_SHIFT_FINAL_OVERRIDE, 0x01)},
};
static const struct wsa_reg_mask_val reg_init_uvlo[] = {
{WSA884X_UVLO_PROG, 0xFF, 0x77},
{WSA884X_UVLO_DEGLITCH_CTL, 0xFF, 0x1B},
{WSA884X_UVLO_PROG1, 0xFF, 0x40},
};
static int wsa884x_handle_post_irq(void *data);
static int wsa884x_get_temperature(struct snd_soc_component *component,
int *temp);
@@ -160,6 +166,12 @@ enum {
SPKR_ADIE_LB,
};
enum {
COMP_PORT_EN_STATUS_BIT = 0,
VI_PORT_EN_STATUS_BIT,
PBR_PORT_EN_STATUS_BIT,
CPS_PORT_EN_STATUS_BIT,
};
enum {
WSA884X_IRQ_INT_SAF2WAR = 0,
WSA884X_IRQ_INT_WAR2SAF,
@@ -1301,6 +1313,7 @@ static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
set_bit(COMP_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
if (wsa884x->pbr_enable) {
wsa884x_set_port(component, SWR_PBR_PORT,
@@ -1308,6 +1321,7 @@ static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
set_bit(PBR_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
if (wsa884x->visense_enable) {
wsa884x_set_port(component, SWR_VISENSE_PORT,
@@ -1315,6 +1329,7 @@ static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
set_bit(VI_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
if (wsa884x->cps_enable) {
wsa884x_set_port(component, SWR_CPS_PORT,
@@ -1322,6 +1337,7 @@ static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
set_bit(CPS_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
swr_connect_port(wsa884x->swr_slave, &port_id[0], num_port,
&ch_mask[0], &ch_rate[0], &num_ch[0],
@@ -1337,33 +1353,41 @@ static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&port_type[num_port]);
++num_port;
if (wsa884x->comp_enable) {
if (wsa884x->comp_enable &&
test_bit(COMP_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask)) {
wsa884x_set_port(component, SWR_COMP_PORT,
&port_id[num_port], &num_ch[num_port],
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
clear_bit(COMP_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
if (wsa884x->pbr_enable) {
if (wsa884x->pbr_enable &&
test_bit(PBR_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask)) {
wsa884x_set_port(component, SWR_PBR_PORT,
&port_id[num_port], &num_ch[num_port],
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
clear_bit(PBR_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
if (wsa884x->visense_enable) {
if (wsa884x->visense_enable &&
test_bit(VI_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask)) {
wsa884x_set_port(component, SWR_VISENSE_PORT,
&port_id[num_port], &num_ch[num_port],
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
clear_bit(VI_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
if (wsa884x->cps_enable) {
if (wsa884x->cps_enable &&
test_bit(CPS_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask)) {
wsa884x_set_port(component, SWR_CPS_PORT,
&port_id[num_port], &num_ch[num_port],
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
clear_bit(CPS_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
swr_disconnect_port(wsa884x->swr_slave, &port_id[0], num_port,
&ch_mask[0], &port_type[0]);
@@ -1525,6 +1549,10 @@ static void wsa884x_codec_init(struct snd_soc_component *component)
reg_init_2S[i].mask, reg_init_2S[i].val);
}
for (i = 0; i < ARRAY_SIZE(reg_init_uvlo); i++)
snd_soc_component_update_bits(component, reg_init_uvlo[i].reg,
reg_init_uvlo[i].mask, reg_init_uvlo[i].val);
wsa_noise_gate_write(component, wsa884x->noise_gate_mode);
}
@@ -2404,8 +2432,9 @@ static int wsa884x_swr_suspend(struct device *dev)
}
dev_dbg(dev, "%s: system suspend\n", __func__);
if (wsa884x->dapm_bias_off ||
(wsa884x->component &&
(snd_soc_component_get_bias_level(wsa884x->component) ==
SND_SOC_BIAS_OFF)) {
SND_SOC_BIAS_OFF))) {
msm_cdc_set_supplies_lpm_mode(dev, wsa884x->supplies,
wsa884x->regulator,
wsa884x->num_supplies,

72
asoc/msm_common.c
ファイルの表示

@@ -84,15 +84,17 @@ static const struct snd_pcm_hardware dummy_dma_hardware = {
};
#define MAX_USR_INPUT 10
#define MAX_AUDIO_CPU_CORE_NUM 2
static int qos_vote_status;
static bool lpi_pcm_logging_enable;
static bool vote_against_sleep_enable;
static unsigned int vote_against_sleep_cnt;
static struct dev_pm_qos_request latency_pm_qos_req; /* pm_qos request */
static unsigned int qos_client_active_cnt;
/* set audio task affinity to core 1 & 2 */
static const unsigned int audio_core_list[] = {1, 2};
static uint32_t *audio_core_list = NULL;
static uint32_t audio_core_num = MAX_AUDIO_CPU_CORE_NUM;
static cpumask_t audio_cpu_map = CPU_MASK_NONE;
static struct dev_pm_qos_request *msm_audio_req = NULL;
static bool kregister_pm_qos_latency_controls = false;
@@ -171,6 +173,8 @@ int snd_card_notify_user(snd_card_status_t card_status)
{
snd_card_pdata->card_status = card_status;
sysfs_notify(&snd_card_pdata->snd_card_kobj, NULL, "card_state");
if (card_status == 0)
vote_against_sleep_cnt = 0;
return 0;
}
@@ -642,7 +646,7 @@ static void msm_audio_add_qos_request(void)
if (!msm_audio_req)
return;
for (i = 0; i < ARRAY_SIZE(audio_core_list); i++) {
for (i = 0; i < audio_core_num; i++) {
if (audio_core_list[i] >= num_possible_cpus())
pr_err("%s incorrect cpu id: %d specified.\n",
__func__, audio_core_list[i]);
@@ -686,7 +690,7 @@ int msm_common_snd_init(struct platform_device *pdev, struct snd_soc_card *card)
int count, ret = 0;
uint32_t val_array[MI2S_TDM_AUXPCM_MAX] = {0};
struct clk *lpass_audio_hw_vote = NULL;
uint32_t *core_val_array = NULL;
common_pdata = kcalloc(1, sizeof(struct msm_common_pdata), GFP_KERNEL);
if (!common_pdata)
return -ENOMEM;
@@ -790,8 +794,48 @@ int msm_common_snd_init(struct platform_device *pdev, struct snd_soc_card *card)
msm_common_set_pdata(card, common_pdata);
/* Add QoS request for audio tasks */
core_val_array = devm_kcalloc(&pdev->dev, num_possible_cpus(), sizeof(uint32_t), GFP_KERNEL);
if (!core_val_array) {
dev_info(&pdev->dev, "%s: core val array is nullptr\n", __func__);
goto exit;
}
ret = of_property_read_variable_u32_array(pdev->dev.of_node, "qcom,audio-core-list",
core_val_array, 0, num_possible_cpus());
dev_info(&pdev->dev, "%s: getting the core list size:%d, num_possible_cpus:%d \n",
__func__, ret, num_possible_cpus());
if (ret > 0 && (ret <= num_possible_cpus())) {
audio_core_num = ret;
audio_core_list = devm_kcalloc(&pdev->dev, audio_core_num, sizeof(uint32_t), GFP_KERNEL);
if (!audio_core_list) {
dev_info(&pdev->dev, "%s: calloc failed for audio core list\n", __func__);
goto exit;
}
for (count = 0; count < audio_core_num; count++) {
audio_core_list[count] = core_val_array[count];
dev_info(&pdev->dev, "%s: update core %d\n", __func__, core_val_array[count]);
}
} else {
dev_info(&pdev->dev, "%s: keep default core\n", __func__);
audio_core_list = devm_kcalloc(&pdev->dev, audio_core_num, sizeof(uint32_t), GFP_KERNEL);
/* set audio task affinity to core 1 & 2 as default*/
if (!audio_core_list) {
dev_info(&pdev->dev, "%s: calloc failed for audio core list\n", __func__);
goto exit;
}
audio_core_list[0] = 1;
audio_core_list[1] = 2;
}
msm_audio_add_qos_request();
exit:
if (audio_core_list) {
devm_kfree(&pdev->dev, audio_core_list);
audio_core_list = NULL;
}
if (core_val_array) {
devm_kfree(&pdev->dev, core_val_array);
}
return 0;
};
@@ -1082,10 +1126,24 @@ static int msm_vote_against_sleep_ctl_put(struct snd_kcontrol *kcontrol,
int ret = 0;
vote_against_sleep_enable = ucontrol->value.integer.value[0];
pr_debug("%s: vote against sleep enable: %d", __func__,
vote_against_sleep_enable);
pr_debug("%s: vote against sleep enable: %d sleep cnt: %d", __func__,
vote_against_sleep_enable, vote_against_sleep_cnt);
ret = audio_prm_set_vote_against_sleep((uint8_t)vote_against_sleep_enable);
if (vote_against_sleep_enable) {
vote_against_sleep_cnt++;
if (vote_against_sleep_cnt == 1) {
ret = audio_prm_set_vote_against_sleep(1);
if (ret < 0) {
--vote_against_sleep_cnt;
pr_err("%s: failed to vote against sleep ret: %d\n", __func__, ret);
}
}
} else {
if (vote_against_sleep_cnt == 1)
ret = audio_prm_set_vote_against_sleep(0);
if (vote_against_sleep_cnt > 0)
vote_against_sleep_cnt--;
}
pr_debug("%s: vote against sleep vote ret: %d\n", __func__, ret);
return ret;

8
asoc/pineapple.c
ファイルの表示

@@ -138,6 +138,8 @@ static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool acti
#if IS_ENABLED(CONFIG_QCOM_WCD_USBSS_I2C)
ret = wcd_usbss_switch_update(WCD_USBSS_GND_MIC_SWAP_AATC,
WCD_USBSS_CABLE_CONNECT);
if (ret == 0)
return true;
#endif
return ret;
}
@@ -275,8 +277,12 @@ static void msm_set_upd_config(struct snd_soc_pcm_runtime *rtd)
pdata->upd_config.ear_pa_pkd_cfg.ear_pa_disable_pkd_reg_addr |= val2;
ret = audio_prm_set_cdc_earpa_duty_cycling_req(&pdata->upd_config, 1);
if (ret < 0)
if (ret < 0) {
pr_err_ratelimited("%s: upd cdc duty cycling registration failed\n", __func__);
return;
}
pr_debug("%s: upd cdc duty cycling registration done successfully!\n", __func__);
}
static struct snd_soc_ops msm_common_be_ops = {

371
audio_modules.bzl ノーマルファイル
ファイルの表示

@@ -0,0 +1,371 @@
load(":module_mgr.bzl", "create_module_registry")
DSP_PATH = "dsp"
IPC_PATH = "ipc"
SOC_PATH = "soc"
ASOC_PATH = "asoc"
ASOC_CODECS_PATH = ASOC_PATH + "/codecs"
ASOC_CODECS_LPASS_CDC_PATH = ASOC_CODECS_PATH + "/lpass-cdc"
audio_modules = create_module_registry([":audio_headers"])
# ------------------------------------ AUDIO MODULE DEFINITIONS ---------------------------------
# >>>> DSP MODULES <<<<
audio_modules.register(
name = "q6_dlkm",
path = DSP_PATH,
conditional_srcs = {
"CONFIG_SND_SOC_MSM_QDSP6V2_INTF": [
"msm-audio-event-notify.c",
"q6_init.c",
],
"CONFIG_SND_SOC_MSM_QDSP6V2_VM": [
"msm-audio-event-notify.c",
"msm_audio_ion_vm.c",
"q6_init.c",
],
"CONFIG_MSM_AVTIMER": [
"avtimer.c"
],
"CONFIG_XT_LOGGING": [
"sp_params.c"
]
}
)
audio_modules.register(
name = "spf_core_dlkm",
path = DSP_PATH,
config_option = "CONFIG_SPF_CORE",
srcs = ["spf-core.c"],
conditional_srcs = {
"CONFIG_DIGITAL_CDC_RSC_MGR": [
"digital-cdc-rsc-mgr.c"
]
}
)
audio_modules.register(
name = "audpkt_ion_dlkm",
path = DSP_PATH,
config_option = "CONFIG_AUDIO_PKT_ION",
srcs = ["msm_audio_ion.c"]
)
audio_modules.register(
name = "q6_notifier_dlkm",
path = DSP_PATH,
config_option = "CONFIG_MSM_QDSP6_NOTIFIER",
srcs = [
"audio_notifier.c",
"audio_ssr.c"
],
)
audio_modules.register(
name = "adsp_loader_dlkm",
path = DSP_PATH,
config_option = "CONFIG_MSM_ADSP_LOADER",
srcs = ["adsp-loader.c"],
)
audio_modules.register(
name = "audio_prm_dlkm",
path = DSP_PATH,
config_option = "CONFIG_AUDIO_PRM",
srcs = ["audio_prm.c"],
)
audio_modules.register(
name = "q6_pdr_dlkm",
path = DSP_PATH,
config_option = "CONFIG_MSM_QDSP6_PDR",
srcs = ["audio_pdr.c"]
)
# >>>> IPC MODULES <<<<
audio_modules.register(
name = "gpr_dlkm",
path = IPC_PATH,
config_option = "CONFIG_MSM_QDSP6_GPR_RPMSG",
srcs = ["gpr-lite.c"],
)
audio_modules.register(
name = "audio_pkt_dlkm",
path = IPC_PATH,
config_option = "CONFIG_AUDIO_PKT",
srcs = ["audio-pkt.c"],
)
# >>>> SOC MODULES <<<<
audio_modules.register(
name = "pinctrl_lpi_dlkm",
path = SOC_PATH,
config_option = "CONFIG_PINCTRL_LPI",
srcs = ["pinctrl-lpi.c"],
)
audio_modules.register(
name = "swr_dlkm",
path = SOC_PATH,
config_option = "CONFIG_SOUNDWIRE",
srcs = [
"regmap-swr.c",
"soundwire.c"
]
)
audio_modules.register(
name = "swr_ctrl_dlkm",
path = SOC_PATH,
conditional_srcs = {
"CONFIG_SOUNDWIRE_WCD_CTRL": [
"swr-wcd-ctrl.c"
],
"CONFIG_SOUNDWIRE_MSTR_CTRL": [
"swr-mstr-ctrl.c"
]
},
)
audio_modules.register(
name = "snd_event_dlkm",
path = SOC_PATH,
config_option = "CONFIG_SND_EVENT",
srcs = ["snd_event.c"]
)
# >>>> ASOC MODULES <<<<
audio_modules.register(
name = "machine_dlkm",
path = ASOC_PATH,
srcs = [
"msm_common.c",
],
conditional_srcs = {
"CONFIG_SND_SOC_SM8150": [
"sm8150.c",
"machine_815x_init.c"
],
"CONFIG_SND_SOC_SM6150": [
"sm6150.c",
"machine_615x_init.c"
],
"CONFIG_SND_SOC_SA6155": [
"sa6155.c"
],
"CONFIG_SND_SOC_QCS405": [
"qcs405.c"
],
"CONFIG_SND_SOC_KONA": [
"kona.c"
],
"CONFIG_SND_SOC_LAHAINA": [
"lahaina.c"
],
"CONFIG_SND_SOC_WAIPIO": [
"waipio.c"
],
"CONFIG_SND_SOC_KALAMA": [
"kalama.c"
],
"CONFIG_SND_SOC_PINEAPPLE": [
"pineapple.c"
],
"CONFIG_SND_SOC_HOLI": [
"holi.c"
],
"CONFIG_SND_SOC_LITO": [
"kona.c"
],
"CONFIG_SND_SOC_BENGAL": [
"bengal.c"
],
"CONFIG_SND_SOC_SA8155": [
"sa8155.c"
],
"CONFIG_SND_SOC_SDX": [
"sdx-target.c"
]
},
)
# >>>> ASOC/CODEC MODULES <<<<
audio_modules.register(
name = "wcd_core_dlkm",
path = ASOC_CODECS_PATH,
conditional_srcs = {
"CONFIG_WCD9XXX_CODEC_CORE": [
"wcd9xxx-rst.c",
"wcd9xxx-core-init.c",
"wcd9xxx-core.c",
"wcd9xxx-irq.c",
"wcd9xxx-slimslave.c",
"wcd9xxx-utils.c",
"wcd9335-regmap.c",
"wcd9335-tables.c",
"msm-cdc-pinctrl.c",
"msm-cdc-supply.c",
"wcd934x/wcd934x-regmap.c",
"wcd934x/wcd934x-tables.c",
],
"CONFIG_WCD9XXX_CODEC_CORE_V2": [
"wcd9xxx-core-init.c",
"msm-cdc-pinctrl.c",
"msm-cdc-supply.c",
],
"CONFIG_SND_SOC_WCD_IRQ": [
"wcd-irq.c"
]
}
)
audio_modules.register(
name = "mbhc_dlkm",
path = ASOC_CODECS_PATH,
config_option = "CONFIG_SND_SOC_WCD_MBHC",
srcs = ["wcd-mbhc-v2.c"],
conditional_srcs = {
"CONFIG_SND_SOC_WCD_MBHC_ADC": [
"wcd-mbhc-adc.c"
],
"CONFIG_SND_SOC_WCD_MBHC_LEGACY": [
"wcd-mbhc-legacy.c"
]
},
)
audio_modules.register(
name = "swr_dmic_dlkm",
path = ASOC_CODECS_PATH,
config_option = "CONFIG_SND_SOC_SWR_DMIC",
srcs = ["swr-dmic.c"]
)
audio_modules.register(
name = "wcd9xxx_dlkm",
path = ASOC_CODECS_PATH,
config_option = "CONFIG_SND_SOC_WCD9XXX_V2",
srcs = [
"wcdcal-hwdep.c",
"wcd9xxx-soc-init.c",
"audio-ext-clk-up.c"
],
conditional_srcs = {
"CONFIG_WCD9XXX_CODEC_CORE": {
True: [
"wcd9xxx-common-v2.c",
"wcd9xxx-resmgr-v2.c",
"wcd-dsp-utils.c",
"wcd-dsp-mgr.c",
],
False: [
"wcd-clsh.c"
]
}
}
)
audio_modules.register(
name = "swr_haptics_dlkm",
path = ASOC_CODECS_PATH,
config_option = "CONFIG_SND_SWR_HAPTICS",
srcs = ["swr-haptics.c"]
)
audio_modules.register(
name = "stub_dlkm",
path = ASOC_CODECS_PATH,
config_option = "CONFIG_SND_SOC_MSM_STUB",
srcs = ["msm_stub.c"]
)
audio_modules.register(
name = "hdmi_dlkm",
path = ASOC_CODECS_PATH,
config_option = "CONFIG_SND_SOC_MSM_HDMI_CODEC_RX",
srcs = ["msm_hdmi_codec_rx.c"],
deps = ["//vendor/qcom/opensource/mm-drivers:%b_mm_drivers"]
)
# >>>> ASOC/CODECS/LPASS-CDC MODULES <<<<
audio_modules.register(
name = "lpass_cdc_dlkm",
path = ASOC_CODECS_LPASS_CDC_PATH,
config_option = "CONFIG_SND_SOC_LPASS_CDC",
srcs = [
"lpass-cdc.c",
"lpass-cdc-comp.c",
"lpass-cdc-utils.c",
"lpass-cdc-regmap.c",
"lpass-cdc-tables.c",
"lpass-cdc-clk-rsc.c",
],
)
audio_modules.register(
name = "lpass_cdc_wsa_macro_dlkm",
path = ASOC_CODECS_LPASS_CDC_PATH,
config_option = "CONFIG_LPASS_CDC_WSA_MACRO",
srcs = ["lpass-cdc-wsa-macro.c"]
)
audio_modules.register(
name = "lpass_cdc_wsa2_macro_dlkm",
path = ASOC_CODECS_LPASS_CDC_PATH,
config_option = "CONFIG_LPASS_CDC_WSA2_MACRO",
srcs = ["lpass-cdc-wsa2-macro.c"]
)
audio_modules.register(
name = "lpass_cdc_va_macro_dlkm",
path = ASOC_CODECS_LPASS_CDC_PATH,
config_option = "CONFIG_LPASS_CDC_VA_MACRO",
srcs = ["lpass-cdc-va-macro.c"]
)
audio_modules.register(
name = "lpass_cdc_rx_macro_dlkm",
path = ASOC_CODECS_LPASS_CDC_PATH,
config_option = "CONFIG_LPASS_CDC_RX_MACRO",
srcs = ["lpass-cdc-rx-macro.c"],
)
audio_modules.register(
name = "lpass_cdc_tx_macro_dlkm",
path = ASOC_CODECS_LPASS_CDC_PATH,
config_option = "CONFIG_LPASS_CDC_TX_MACRO",
srcs = ["lpass-cdc-tx-macro.c"]
)
# >>>> WSA883X MODULE <<<<
audio_modules.register(
name = "wsa883x_dlkm",
path = ASOC_CODECS_PATH + "/wsa883x",
config_option = "CONFIG_SND_SOC_WSA883X",
srcs = [
"wsa883x.c",
"wsa883x-regmap.c",
"wsa883x-tables.c",
],
)
# >>>> WSA884X MODULE <<<<
audio_modules.register(
name = "wsa884x_dlkm",
path = ASOC_CODECS_PATH + "/wsa884x",
config_option = "CONFIG_SND_SOC_WSA884X",
srcs = [
"wsa884x.c",
"wsa884x-regmap.c",
"wsa884x-tables.c",
]
)
# >>>> WCD938X MODULES <<<<
audio_modules.register(
name = "wcd938x_dlkm",
path = ASOC_CODECS_PATH + "/wcd938x",
config_option = "CONFIG_SND_SOC_WCD938X",
srcs = [
"wcd938x.c",
"wcd938x-regmap.c",
"wcd938x-tables.c",
"wcd938x-mbhc.c",
]
)
audio_modules.register(
name = "wcd938x_slave_dlkm",
path = ASOC_CODECS_PATH + "/wcd938x",
config_option = "CONFIG_SND_SOC_WCD938X_SLAVE",
srcs = ["wcd938x-slave.c"]
)
# >>>> WCD939X MODULES <<<<
audio_modules.register(
name = "wcd939x_dlkm",
path = ASOC_CODECS_PATH + "/wcd939x",
config_option = "CONFIG_SND_SOC_WCD939X",
srcs = [
"wcd939x.c",
"wcd939x-regmap.c",
"wcd939x-tables.c",
"wcd939x-mbhc.c",
]
)
audio_modules.register(
name = "wcd939x_slave_dlkm",
path = ASOC_CODECS_PATH + "/wcd939x",
config_option = "CONFIG_SND_SOC_WCD939X_SLAVE",
srcs = ["wcd939x-slave.c"]
)

55
build/kalama.bzl ノーマルファイル
ファイルの表示

@@ -0,0 +1,55 @@
load(":audio_modules.bzl", "audio_modules")
load(":module_mgr.bzl", "define_consolidate_gki_modules")
def define_kalama():
define_consolidate_gki_modules(
target = "kalama",
registry = audio_modules,
modules = [
"q6_dlkm",
"spf_core_dlkm",
"audpkt_ion_dlkm",
"q6_notifier_dlkm",
"adsp_loader_dlkm",
"audio_prm_dlkm",
"q6_pdr_dlkm",
"gpr_dlkm",
"audio_pkt_dlkm",
"pinctrl_lpi_dlkm",
"swr_dlkm",
"swr_ctrl_dlkm",
"snd_event_dlkm",
"machine_dlkm",
"wcd_core_dlkm",
"mbhc_dlkm",
"swr_dmic_dlkm",
"wcd9xxx_dlkm",
"swr_haptics_dlkm",
"stub_dlkm",
"hdmi_dlkm",
"lpass_cdc_dlkm",
"lpass_cdc_wsa_macro_dlkm",
"lpass_cdc_wsa2_macro_dlkm",
"lpass_cdc_va_macro_dlkm",
"lpass_cdc_rx_macro_dlkm",
"lpass_cdc_tx_macro_dlkm",
"wsa883x_dlkm",
"wsa884x_dlkm",
"wcd938x_dlkm",
"wcd938x_slave_dlkm"
],
config_options = [
"CONFIG_SND_SOC_KALAMA",
"CONFIG_SND_SOC_MSM_QDSP6V2_INTF",
"CONFIG_MSM_QDSP6_SSR",
"CONFIG_DIGITAL_CDC_RSC_MGR",
"CONFIG_SOUNDWIRE_MSTR_CTRL",
"CONFIG_SWRM_VER_2P0",
"CONFIG_WCD9XXX_CODEC_CORE_V2",
"CONFIG_MSM_CDC_PINCTRL",
"CONFIG_SND_SOC_WCD_IRQ",
"CONFIG_SND_SOC_WCD9XXX_V2",
"CONFIG_SND_SOC_WCD_MBHC_ADC",
"CONFIG_MSM_EXT_DISPLAY",
]
)

57
build/pineapple.bzl ノーマルファイル
ファイルの表示

@@ -0,0 +1,57 @@
load(":audio_modules.bzl", "audio_modules")
load(":module_mgr.bzl", "define_consolidate_gki_modules")
def define_pineapple():
define_consolidate_gki_modules(
target = "pineapple",
registry = audio_modules,
modules = [
"q6_dlkm",
"spf_core_dlkm",
"audpkt_ion_dlkm",
"q6_notifier_dlkm",
"adsp_loader_dlkm",
"audio_prm_dlkm",
"q6_pdr_dlkm",
"gpr_dlkm",
"audio_pkt_dlkm",
"pinctrl_lpi_dlkm",
"swr_dlkm",
"swr_ctrl_dlkm",
"snd_event_dlkm",
"machine_dlkm",
"wcd_core_dlkm",
"mbhc_dlkm",
"swr_dmic_dlkm",
"wcd9xxx_dlkm",
"swr_haptics_dlkm",
"stub_dlkm",
"hdmi_dlkm",
"lpass_cdc_dlkm",
"lpass_cdc_wsa_macro_dlkm",
"lpass_cdc_wsa2_macro_dlkm",
"lpass_cdc_va_macro_dlkm",
"lpass_cdc_rx_macro_dlkm",
"lpass_cdc_tx_macro_dlkm",
"wsa883x_dlkm",
"wsa884x_dlkm",
"wcd938x_dlkm",
"wcd938x_slave_dlkm",
"wcd939x_dlkm",
"wcd939x_slave_dlkm"
],
config_options = [
"CONFIG_SND_SOC_PINEAPPLE",
"CONFIG_SND_SOC_MSM_QDSP6V2_INTF",
"CONFIG_MSM_QDSP6_SSR",
"CONFIG_DIGITAL_CDC_RSC_MGR",
"CONFIG_SOUNDWIRE_MSTR_CTRL",
"CONFIG_SWRM_VER_2P0",
"CONFIG_WCD9XXX_CODEC_CORE_V2",
"CONFIG_MSM_CDC_PINCTRL",
"CONFIG_SND_SOC_WCD_IRQ",
"CONFIG_SND_SOC_WCD9XXX_V2",
"CONFIG_SND_SOC_WCD_MBHC_ADC",
"CONFIG_MSM_EXT_DISPLAY",
]
)

45
dsp/msm_audio_ion.c
ファイルの表示

@@ -27,6 +27,7 @@
#endif
#include <dsp/msm_audio_ion.h>
#include <linux/msm_audio.h>
#include <linux/qcom_scm.h>
#include <soc/qcom/secure_buffer.h>
MODULE_IMPORT_NS(DMA_BUF);
@@ -119,6 +120,7 @@ static int msm_audio_ion_map_kernel(struct dma_buf *dma_buf,
if (rc) {
pr_err("%s: kernel mapping of dma_buf failed\n",
__func__);
dma_buf_end_cpu_access(dma_buf, DMA_BIDIRECTIONAL);
goto exit;
}
@@ -204,6 +206,7 @@ static int msm_audio_dma_buf_map(struct dma_buf *dma_buf,
alloc_data->vmap = iosys_vmap;
} else {
*addr = MSM_AUDIO_ION_PHYS_ADDR(alloc_data);
kfree(iosys_vmap);
}
msm_audio_ion_add_allocation(ion_data, alloc_data);
@@ -593,19 +596,19 @@ static int msm_audio_ion_free(struct dma_buf *dma_buf, struct msm_audio_ion_priv
static int msm_audio_hyp_unassign(struct msm_audio_fd_data *msm_audio_fd_data)
{
int ret = 0;
int dest_perms_unmap[1] = {PERM_READ | PERM_WRITE | PERM_EXEC};
int source_vm_unmap[3] = {VMID_LPASS, VMID_ADSP_HEAP, VMID_HLOS};
int dest_vm_unmap[1] = {VMID_HLOS};
u64 src_vmid_unmap_list = BIT(VMID_LPASS) | BIT(VMID_ADSP_HEAP);
struct qcom_scm_vmperm dst_vmids_unmap[] = {{QCOM_SCM_VMID_HLOS,
PERM_READ | PERM_WRITE | PERM_EXEC}};
if (msm_audio_fd_data->hyp_assign) {
ret = hyp_assign_phys(msm_audio_fd_data->paddr, msm_audio_fd_data->plen,
source_vm_unmap, 2, dest_vm_unmap, dest_perms_unmap, 1);
ret = qcom_scm_assign_mem(msm_audio_fd_data->paddr, msm_audio_fd_data->plen,
&src_vmid_unmap_list, dst_vmids_unmap, ARRAY_SIZE(dst_vmids_unmap));
if (ret < 0) {
pr_err("%s: hyp unassign failed result = %d addr = 0x%pK size = %d\n",
pr_err("%s: qcom assign unmap failed result = %d addr = 0x%pK size = %d\n",
__func__, ret, msm_audio_fd_data->paddr, msm_audio_fd_data->plen);
}
msm_audio_fd_data->hyp_assign = false;
pr_debug("%s: hyp unassign success\n", __func__);
pr_debug("%s: qcom scm unmap success\n", __func__);
}
return ret;
}
@@ -689,12 +692,12 @@ static long msm_audio_ion_ioctl(struct file *file, unsigned int ioctl_num,
size_t pa_len = 0;
struct iosys_map *iosys_vmap = NULL;
int ret = 0;
int dest_perms_map[2] = {PERM_READ | PERM_WRITE, PERM_READ | PERM_WRITE};
int source_vm_map[1] = {VMID_HLOS};
int dest_vm_map[3] = {VMID_LPASS, VMID_ADSP_HEAP, VMID_HLOS};
int dest_perms_unmap[1] = {PERM_READ | PERM_WRITE | PERM_EXEC};
int source_vm_unmap[3] = {VMID_LPASS, VMID_ADSP_HEAP, VMID_HLOS};
int dest_vm_unmap[1] = {VMID_HLOS};
u64 src_vmid_map_list = BIT(QCOM_SCM_VMID_HLOS);
struct qcom_scm_vmperm dst_vmids_map[] = {{VMID_LPASS, PERM_READ | PERM_WRITE},
{VMID_ADSP_HEAP, PERM_READ | PERM_WRITE}};
u64 src_vmid_unmap_list = BIT(VMID_LPASS) | BIT(VMID_ADSP_HEAP);
struct qcom_scm_vmperm dst_vmids_unmap[] = {{QCOM_SCM_VMID_HLOS,
PERM_READ | PERM_WRITE | PERM_EXEC}};
struct msm_audio_fd_data *msm_audio_fd_data = NULL;
struct msm_audio_ion_private *ion_data =
container_of(file->f_inode->i_cdev, struct msm_audio_ion_private, cdev);
@@ -741,14 +744,14 @@ static long msm_audio_ion_ioctl(struct file *file, unsigned int ioctl_num,
pr_err("%s get phys addr failed %d\n", __func__, ret);
return ret;
}
ret = hyp_assign_phys(paddr, pa_len, source_vm_map, 1,
dest_vm_map, dest_perms_map, 2);
ret = qcom_scm_assign_mem(paddr, pa_len, &src_vmid_map_list,
dst_vmids_map, ARRAY_SIZE(dst_vmids_map));
if (ret < 0) {
pr_err("%s: hyp assign failed result = %d addr = 0x%pK size = %d\n",
pr_err("%s: qcom_assign failed result = %d addr = 0x%pK size = %d\n",
__func__, ret, paddr, pa_len);
return ret;
}
pr_debug("%s: hyp assign success\n", __func__);
pr_debug("%s: qcom scm assign success\n", __func__);
msm_audio_set_hyp_assign((int)ioctl_param, true);
break;
case IOCTL_UNMAP_HYP_ASSIGN:
@@ -757,14 +760,14 @@ static long msm_audio_ion_ioctl(struct file *file, unsigned int ioctl_num,
pr_err("%s get phys addr failed %d\n", __func__, ret);
return ret;
}
ret = hyp_assign_phys(paddr, pa_len, source_vm_unmap, 2,
dest_vm_unmap, dest_perms_unmap, 1);
ret = qcom_scm_assign_mem(paddr, pa_len, &src_vmid_unmap_list,
dst_vmids_unmap, ARRAY_SIZE(dst_vmids_unmap));
if (ret < 0) {
pr_err("%s: hyp unassign failed result = %d addr = 0x%pK size = %d\n",
pr_err("%s: qcom scm unassign failed result = %d addr = 0x%pK size = %d\n",
__func__, ret, paddr, pa_len);
return ret;
}
pr_debug("%s: hyp unassign success\n", __func__);
pr_debug("%s: qcom scm unassign success\n", __func__);
msm_audio_set_hyp_assign((int)ioctl_param, false);
break;
default:

11
include/uapi/audio/linux/avtimer.h
ファイルの表示

@@ -1,11 +0,0 @@
#ifndef _UAPI_AVTIMER_H
#define _UAPI_AVTIMER_H
#include <linux/ioctl.h>
#include <linux/types.h>
#define MAJOR_NUM 100
#define IOCTL_GET_AVTIMER_TICK _IOR(MAJOR_NUM, 0, __u64)
#endif

443
include/uapi/audio/linux/msm_audio.h
ファイルの表示

@@ -3,6 +3,7 @@
*
* Copyright (C) 2008 Google, Inc.
* Copyright (c) 2012, 2014, 2017, 2020, 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _UAPI_LINUX_MSM_AUDIO_H
@@ -11,455 +12,13 @@
#include <linux/types.h>
#include <linux/ioctl.h>
/* PCM Audio */
#define AUDIO_IOCTL_MAGIC 'a'
#define AUDIO_START _IOW(AUDIO_IOCTL_MAGIC, 0, unsigned int)
#define AUDIO_STOP _IOW(AUDIO_IOCTL_MAGIC, 1, unsigned int)
#define AUDIO_FLUSH _IOW(AUDIO_IOCTL_MAGIC, 2, unsigned int)
#define AUDIO_GET_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 3, \
struct msm_audio_config)
#define AUDIO_SET_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 4, \
struct msm_audio_config)
#define AUDIO_GET_STATS _IOR(AUDIO_IOCTL_MAGIC, 5, \
struct msm_audio_stats)
#define AUDIO_ENABLE_AUDPP _IOW(AUDIO_IOCTL_MAGIC, 6, unsigned int)
#define AUDIO_SET_ADRC _IOW(AUDIO_IOCTL_MAGIC, 7, unsigned int)
#define AUDIO_SET_EQ _IOW(AUDIO_IOCTL_MAGIC, 8, unsigned int)
#define AUDIO_SET_RX_IIR _IOW(AUDIO_IOCTL_MAGIC, 9, unsigned int)
#define AUDIO_SET_VOLUME _IOW(AUDIO_IOCTL_MAGIC, 10, unsigned int)
#define AUDIO_PAUSE _IOW(AUDIO_IOCTL_MAGIC, 11, unsigned int)
#define AUDIO_PLAY_DTMF _IOW(AUDIO_IOCTL_MAGIC, 12, unsigned int)
#define AUDIO_GET_EVENT _IOR(AUDIO_IOCTL_MAGIC, 13, \
struct msm_audio_event)
#define AUDIO_ABORT_GET_EVENT _IOW(AUDIO_IOCTL_MAGIC, 14, unsigned int)
#define AUDIO_REGISTER_PMEM _IOW(AUDIO_IOCTL_MAGIC, 15, unsigned int)
#define AUDIO_DEREGISTER_PMEM _IOW(AUDIO_IOCTL_MAGIC, 16, unsigned int)
#define AUDIO_ASYNC_WRITE _IOW(AUDIO_IOCTL_MAGIC, 17, \
struct msm_audio_aio_buf)
#define AUDIO_ASYNC_READ _IOW(AUDIO_IOCTL_MAGIC, 18, \
struct msm_audio_aio_buf)
#define AUDIO_SET_INCALL _IOW(AUDIO_IOCTL_MAGIC, 19, struct msm_voicerec_mode)
#define AUDIO_GET_NUM_SND_DEVICE _IOR(AUDIO_IOCTL_MAGIC, 20, unsigned int)
#define AUDIO_GET_SND_DEVICES _IOWR(AUDIO_IOCTL_MAGIC, 21, \
struct msm_snd_device_list)
#define AUDIO_ENABLE_SND_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 22, unsigned int)
#define AUDIO_DISABLE_SND_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 23, unsigned int)
#define AUDIO_ROUTE_STREAM _IOW(AUDIO_IOCTL_MAGIC, 24, \
struct msm_audio_route_config)
#define AUDIO_GET_PCM_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 30, unsigned int)
#define AUDIO_SET_PCM_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 31, unsigned int)
#define AUDIO_SWITCH_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 32, unsigned int)
#define AUDIO_SET_MUTE _IOW(AUDIO_IOCTL_MAGIC, 33, unsigned int)
#define AUDIO_UPDATE_ACDB _IOW(AUDIO_IOCTL_MAGIC, 34, unsigned int)
#define AUDIO_START_VOICE _IOW(AUDIO_IOCTL_MAGIC, 35, unsigned int)
#define AUDIO_STOP_VOICE _IOW(AUDIO_IOCTL_MAGIC, 36, unsigned int)
#define AUDIO_REINIT_ACDB _IOW(AUDIO_IOCTL_MAGIC, 39, unsigned int)
#define AUDIO_OUTPORT_FLUSH _IOW(AUDIO_IOCTL_MAGIC, 40, unsigned short)
#define AUDIO_SET_ERR_THRESHOLD_VALUE _IOW(AUDIO_IOCTL_MAGIC, 41, \
unsigned short)
#define AUDIO_GET_BITSTREAM_ERROR_INFO _IOR(AUDIO_IOCTL_MAGIC, 42, \
struct msm_audio_bitstream_error_info)
#define AUDIO_SET_SRS_TRUMEDIA_PARAM _IOW(AUDIO_IOCTL_MAGIC, 43, unsigned int)
/* Qualcomm technologies inc extensions */
#define AUDIO_SET_STREAM_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 80, \
struct msm_audio_stream_config)
#define AUDIO_GET_STREAM_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 81, \
struct msm_audio_stream_config)
#define AUDIO_GET_SESSION_ID _IOR(AUDIO_IOCTL_MAGIC, 82, unsigned short)
#define AUDIO_GET_STREAM_INFO _IOR(AUDIO_IOCTL_MAGIC, 83, \
struct msm_audio_bitstream_info)
#define AUDIO_SET_PAN _IOW(AUDIO_IOCTL_MAGIC, 84, unsigned int)
#define AUDIO_SET_QCONCERT_PLUS _IOW(AUDIO_IOCTL_MAGIC, 85, unsigned int)
#define AUDIO_SET_MBADRC _IOW(AUDIO_IOCTL_MAGIC, 86, unsigned int)
#define AUDIO_SET_VOLUME_PATH _IOW(AUDIO_IOCTL_MAGIC, 87, \
struct msm_vol_info)
#define AUDIO_SET_MAX_VOL_ALL _IOW(AUDIO_IOCTL_MAGIC, 88, unsigned int)
#define AUDIO_ENABLE_AUDPRE _IOW(AUDIO_IOCTL_MAGIC, 89, unsigned int)
#define AUDIO_SET_AGC _IOW(AUDIO_IOCTL_MAGIC, 90, unsigned int)
#define AUDIO_SET_NS _IOW(AUDIO_IOCTL_MAGIC, 91, unsigned int)
#define AUDIO_SET_TX_IIR _IOW(AUDIO_IOCTL_MAGIC, 92, unsigned int)
#define AUDIO_GET_BUF_CFG _IOW(AUDIO_IOCTL_MAGIC, 93, \
struct msm_audio_buf_cfg)
#define AUDIO_SET_BUF_CFG _IOW(AUDIO_IOCTL_MAGIC, 94, \
struct msm_audio_buf_cfg)
#define AUDIO_SET_ACDB_BLK _IOW(AUDIO_IOCTL_MAGIC, 95, \
struct msm_acdb_cmd_device)
#define AUDIO_GET_ACDB_BLK _IOW(AUDIO_IOCTL_MAGIC, 96, \
struct msm_acdb_cmd_device)
#define IOCTL_MAP_PHYS_ADDR _IOW(AUDIO_IOCTL_MAGIC, 97, int)
#define IOCTL_UNMAP_PHYS_ADDR _IOW(AUDIO_IOCTL_MAGIC, 98, int)
#define AUDIO_SET_EFFECTS_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 99, \
struct msm_hwacc_effects_config)
#define AUDIO_EFFECTS_SET_BUF_LEN _IOW(AUDIO_IOCTL_MAGIC, 100, \
struct msm_hwacc_buf_cfg)
#define AUDIO_EFFECTS_GET_BUF_AVAIL _IOW(AUDIO_IOCTL_MAGIC, 101, \
struct msm_hwacc_buf_avail)
#define AUDIO_EFFECTS_WRITE _IOW(AUDIO_IOCTL_MAGIC, 102, void *)
#define AUDIO_EFFECTS_READ _IOWR(AUDIO_IOCTL_MAGIC, 103, void *)
#define AUDIO_EFFECTS_SET_PP_PARAMS _IOW(AUDIO_IOCTL_MAGIC, 104, void *)
#define AUDIO_PM_AWAKE _IOW(AUDIO_IOCTL_MAGIC, 105, unsigned int)
#define AUDIO_PM_RELAX _IOW(AUDIO_IOCTL_MAGIC, 106, unsigned int)
#define AUDIO_REGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 107, struct msm_audio_ion_info)
#define AUDIO_DEREGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 108, struct msm_audio_ion_info)
#define IOCTL_MAP_HYP_ASSIGN _IOW(AUDIO_IOCTL_MAGIC, 109, int)
#define IOCTL_UNMAP_HYP_ASSIGN _IOW(AUDIO_IOCTL_MAGIC, 110, int)
#define AUDIO_MAX_COMMON_IOCTL_NUM 111
#define HANDSET_MIC 0x01
#define HANDSET_SPKR 0x02
#define HEADSET_MIC 0x03
#define HEADSET_SPKR_MONO 0x04
#define HEADSET_SPKR_STEREO 0x05
#define SPKR_PHONE_MIC 0x06
#define SPKR_PHONE_MONO 0x07
#define SPKR_PHONE_STEREO 0x08
#define BT_SCO_MIC 0x09
#define BT_SCO_SPKR 0x0A
#define BT_A2DP_SPKR 0x0B
#define TTY_HEADSET_MIC 0x0C
#define TTY_HEADSET_SPKR 0x0D
/* Default devices are not supported in a */
/* device switching context. Only supported */
/* for stream devices. */
/* DO NOT USE */
#define DEFAULT_TX 0x0E
#define DEFAULT_RX 0x0F
#define BT_A2DP_TX 0x10
#define HEADSET_MONO_PLUS_SPKR_MONO_RX 0x11
#define HEADSET_MONO_PLUS_SPKR_STEREO_RX 0x12
#define HEADSET_STEREO_PLUS_SPKR_MONO_RX 0x13
#define HEADSET_STEREO_PLUS_SPKR_STEREO_RX 0x14
#define I2S_RX 0x20
#define I2S_TX 0x21
#define ADRC_ENABLE 0x0001
#define EQUALIZER_ENABLE 0x0002
#define IIR_ENABLE 0x0004
#define QCONCERT_PLUS_ENABLE 0x0008
#define MBADRC_ENABLE 0x0010
#define SRS_ENABLE 0x0020
#define SRS_DISABLE 0x0040
#define AGC_ENABLE 0x0001
#define NS_ENABLE 0x0002
#define TX_IIR_ENABLE 0x0004
#define FLUENCE_ENABLE 0x0008
#define VOC_REC_UPLINK 0x00
#define VOC_REC_DOWNLINK 0x01
#define VOC_REC_BOTH 0x02
struct msm_audio_config {
__u32 buffer_size;
__u32 buffer_count;
__u32 channel_count;
__u32 sample_rate;
__u32 type;
__u32 meta_field;
__u32 bits;
__u32 unused[3];
};
struct msm_audio_stream_config {
__u32 buffer_size;
__u32 buffer_count;
};
struct msm_audio_buf_cfg {
__u32 meta_info_enable;
__u32 frames_per_buf;
};
struct msm_audio_stats {
__u32 byte_count;
__u32 sample_count;
__u32 unused[2];
};
struct msm_audio_ion_info {
int fd;
void *vaddr;
};
struct msm_audio_pmem_info {
int fd;
void *vaddr;
};
struct msm_audio_aio_buf {
void *buf_addr;
__u32 buf_len;
__u32 data_len;
void *private_data;
unsigned short mfield_sz; /*only useful for data has meta field */
};
/* Audio routing */
#define SND_IOCTL_MAGIC 's'
#define SND_MUTE_UNMUTED 0
#define SND_MUTE_MUTED 1
struct msm_mute_info {
__u32 mute;
__u32 path;
};
struct msm_vol_info {
__u32 vol;
__u32 path;
};
struct msm_voicerec_mode {
__u32 rec_mode;
};
struct msm_snd_device_config {
__u32 device;
__u32 ear_mute;
__u32 mic_mute;
};
#define SND_SET_DEVICE _IOW(SND_IOCTL_MAGIC, 2, struct msm_device_config *)
enum cad_device_path_type {
CAD_DEVICE_PATH_RX, /*For Decoding session*/
CAD_DEVICE_PATH_TX, /* For Encoding session*/
CAD_DEVICE_PATH_RX_TX, /* For Voice call */
CAD_DEVICE_PATH_LB, /* For loopback (FM Analog)*/
CAD_DEVICE_PATH_MAX
};
struct cad_devices_type {
__u32 rx_device;
__u32 tx_device;
enum cad_device_path_type pathtype;
};
struct msm_cad_device_config {
struct cad_devices_type device;
__u32 ear_mute;
__u32 mic_mute;
};
#define CAD_SET_DEVICE _IOW(SND_IOCTL_MAGIC, 2, struct msm_cad_device_config *)
#define SND_METHOD_VOICE 0
#define SND_METHOD_MIDI 4
struct msm_snd_volume_config {
__u32 device;
__u32 method;
__u32 volume;
};
#define SND_SET_VOLUME _IOW(SND_IOCTL_MAGIC, 3, struct msm_snd_volume_config *)
struct msm_cad_volume_config {
struct cad_devices_type device;
__u32 method;
__u32 volume;
};
#define CAD_SET_VOLUME _IOW(SND_IOCTL_MAGIC, 3, struct msm_cad_volume_config *)
/* Returns the number of SND endpoints supported. */
#define SND_GET_NUM_ENDPOINTS _IOR(SND_IOCTL_MAGIC, 4, unsigned int *)
struct msm_snd_endpoint {
int id; /* input and output */
char name[64]; /* output only */
};
/* Takes an index between 0 and one less than the number returned by
* SND_GET_NUM_ENDPOINTS, and returns the SND index and name of a
* SND endpoint. On input, the .id field contains the number of the
* endpoint, and on exit it contains the SND index, while .name contains
* the description of the endpoint.
*/
#define SND_GET_ENDPOINT _IOWR(SND_IOCTL_MAGIC, 5, struct msm_snd_endpoint *)
#define SND_AVC_CTL _IOW(SND_IOCTL_MAGIC, 6, unsigned int *)
#define SND_AGC_CTL _IOW(SND_IOCTL_MAGIC, 7, unsigned int *)
/*return the number of CAD endpoints supported. */
#define CAD_GET_NUM_ENDPOINTS _IOR(SND_IOCTL_MAGIC, 4, unsigned int *)
struct msm_cad_endpoint {
int id; /* input and output */
char name[64]; /* output only */
};
/* Takes an index between 0 and one less than the number returned by
* SND_GET_NUM_ENDPOINTS, and returns the CAD index and name of a
* CAD endpoint. On input, the .id field contains the number of the
* endpoint, and on exit it contains the SND index, while .name contains
* the description of the endpoint.
*/
#define CAD_GET_ENDPOINT _IOWR(SND_IOCTL_MAGIC, 5, struct msm_cad_endpoint *)
struct msm_audio_pcm_config {
__u32 pcm_feedback; /* 0 - disable > 0 - enable */
__u32 buffer_count; /* Number of buffers to allocate */
__u32 buffer_size; /* Size of buffer for capturing of
* PCM samples
*/
};
#define AUDIO_EVENT_SUSPEND 0
#define AUDIO_EVENT_RESUME 1
#define AUDIO_EVENT_WRITE_DONE 2
#define AUDIO_EVENT_READ_DONE 3
#define AUDIO_EVENT_STREAM_INFO 4
#define AUDIO_EVENT_BITSTREAM_ERROR_INFO 5
#define AUDIO_CODEC_TYPE_MP3 0
#define AUDIO_CODEC_TYPE_AAC 1
struct msm_audio_bitstream_info {
__u32 codec_type;
__u32 chan_info;
__u32 sample_rate;
__u32 bit_stream_info;
__u32 bit_rate;
__u32 unused[3];
};
struct msm_audio_bitstream_error_info {
__u32 dec_id;
__u32 err_msg_indicator;
__u32 err_type;
};
union msm_audio_event_payload {
struct msm_audio_aio_buf aio_buf;
struct msm_audio_bitstream_info stream_info;
struct msm_audio_bitstream_error_info error_info;
int reserved;
};
struct msm_audio_event {
int event_type;
int timeout_ms;
union msm_audio_event_payload event_payload;
};
#define MSM_SNDDEV_CAP_RX 0x1
#define MSM_SNDDEV_CAP_TX 0x2
#define MSM_SNDDEV_CAP_VOICE 0x4
struct msm_snd_device_info {
__u32 dev_id;
__u32 dev_cap; /* bitmask describe capability of device */
char dev_name[64];
};
struct msm_snd_device_list {
__u32 num_dev; /* Indicate number of device info to be retrieved */
struct msm_snd_device_info *list;
};
struct msm_dtmf_config {
__u16 path;
__u16 dtmf_hi;
__u16 dtmf_low;
__u16 duration;
__u16 tx_gain;
__u16 rx_gain;
__u16 mixing;
};
#define AUDIO_ROUTE_STREAM_VOICE_RX 0
#define AUDIO_ROUTE_STREAM_VOICE_TX 1
#define AUDIO_ROUTE_STREAM_PLAYBACK 2
#define AUDIO_ROUTE_STREAM_REC 3
struct msm_audio_route_config {
__u32 stream_type;
__u32 stream_id;
__u32 dev_id;
};
#define AUDIO_MAX_EQ_BANDS 12
struct msm_audio_eq_band {
__u16 band_idx; /* The band index, 0 .. 11 */
__u32 filter_type; /* Filter band type */
__u32 center_freq_hz; /* Filter band center frequency */
__u32 filter_gain; /* Filter band initial gain (dB) */
/* Range is +12 dB to -12 dB with 1dB increments. */
__u32 q_factor;
} __attribute__ ((packed));
struct msm_audio_eq_stream_config {
__u32 enable; /* Number of consequtive bands specified */
__u32 num_bands;
struct msm_audio_eq_band eq_bands[AUDIO_MAX_EQ_BANDS];
} __attribute__ ((packed));
struct msm_acdb_cmd_device {
__u32 command_id;
__u32 device_id;
__u32 network_id;
__u32 sample_rate_id; /* Actual sample rate value */
__u32 interface_id; /* See interface id's above */
__u32 algorithm_block_id; /* See enumerations above */
__u32 total_bytes; /* Length in bytes used by buffer */
__u32 *phys_buf; /* Physical Address of data */
};
struct msm_hwacc_data_config {
__u32 buf_size;
__u32 num_buf;
__u32 num_channels;
__u8 channel_map[8];
__u32 sample_rate;
__u32 bits_per_sample;
};
struct msm_hwacc_buf_cfg {
__u32 input_len;
__u32 output_len;
};
struct msm_hwacc_buf_avail {
__u32 input_num_avail;
__u32 output_num_avail;
};
struct msm_hwacc_effects_config {
struct msm_hwacc_data_config input;
struct msm_hwacc_data_config output;
struct msm_hwacc_buf_cfg buf_cfg;
__u32 meta_mode_enabled;
__u32 overwrite_topology;
__s32 topology;
};
#define ADSP_STREAM_PP_EVENT 0
#define ADSP_STREAM_ENCDEC_EVENT 1
#define ADSP_STREAM_IEC_61937_FMT_UPDATE_EVENT 2
#define ADSP_STREAM_EVENT_MAX 3
struct msm_adsp_event_data {
__u32 event_type;
__u32 payload_len;
__u8 payload[0];
};
#endif

77
include/uapi/audio/linux/msm_audio_aac.h
ファイルの表示

@@ -1,77 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_AAC_H
#define _UAPI_MSM_AUDIO_AAC_H
#include <audio/linux/msm_audio.h>
#include <linux/types.h>
#define AUDIO_SET_AAC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+0), struct msm_audio_aac_config)
#define AUDIO_GET_AAC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+1), struct msm_audio_aac_config)
#define AUDIO_SET_AAC_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+3), struct msm_audio_aac_enc_config)
#define AUDIO_GET_AAC_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+4), struct msm_audio_aac_enc_config)
#define AUDIO_SET_AAC_MIX_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+5), __u32)
#define AUDIO_AAC_FORMAT_ADTS -1
#define AUDIO_AAC_FORMAT_RAW 0x0000
#define AUDIO_AAC_FORMAT_PSUEDO_RAW 0x0001
#define AUDIO_AAC_FORMAT_LOAS 0x0002
#define AUDIO_AAC_FORMAT_ADIF 0x0003
#define AUDIO_AAC_OBJECT_LC 0x0002
#define AUDIO_AAC_OBJECT_LTP 0x0004
#define AUDIO_AAC_OBJECT_ERLC 0x0011
#define AUDIO_AAC_OBJECT_BSAC 0x0016
#define AUDIO_AAC_SEC_DATA_RES_ON 0x0001
#define AUDIO_AAC_SEC_DATA_RES_OFF 0x0000
#define AUDIO_AAC_SCA_DATA_RES_ON 0x0001
#define AUDIO_AAC_SCA_DATA_RES_OFF 0x0000
#define AUDIO_AAC_SPEC_DATA_RES_ON 0x0001
#define AUDIO_AAC_SPEC_DATA_RES_OFF 0x0000
#define AUDIO_AAC_SBR_ON_FLAG_ON 0x0001
#define AUDIO_AAC_SBR_ON_FLAG_OFF 0x0000
#define AUDIO_AAC_SBR_PS_ON_FLAG_ON 0x0001
#define AUDIO_AAC_SBR_PS_ON_FLAG_OFF 0x0000
/* Primary channel on both left and right channels */
#define AUDIO_AAC_DUAL_MONO_PL_PR 0
/* Secondary channel on both left and right channels */
#define AUDIO_AAC_DUAL_MONO_SL_SR 1
/* Primary channel on right channel and 2nd on left channel */
#define AUDIO_AAC_DUAL_MONO_SL_PR 2
/* 2nd channel on right channel and primary on left channel */
#define AUDIO_AAC_DUAL_MONO_PL_SR 3
struct msm_audio_aac_config {
signed short format;
unsigned short audio_object;
unsigned short ep_config; /* 0 ~ 3 useful only obj = ERLC */
unsigned short aac_section_data_resilience_flag;
unsigned short aac_scalefactor_data_resilience_flag;
unsigned short aac_spectral_data_resilience_flag;
unsigned short sbr_on_flag;
unsigned short sbr_ps_on_flag;
unsigned short dual_mono_mode;
unsigned short channel_configuration;
unsigned short sample_rate;
};
struct msm_audio_aac_enc_config {
__u32 channels;
__u32 sample_rate;
__u32 bit_rate;
__u32 stream_format;
};
#endif /* _UAPI_MSM_AUDIO_AAC_H */

41
include/uapi/audio/linux/msm_audio_ac3.h
ファイルの表示

@@ -1,41 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_AC3_H
#define _UAPI_MSM_AUDIO_AC3_H
#include <audio/linux/msm_audio.h>
#define AUDIO_SET_AC3_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+0), unsigned int)
#define AUDIO_GET_AC3_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+1), unsigned int)
#define AUDAC3_DEF_WORDSIZE 0
#define AUDAC3_DEF_USER_DOWNMIX_FLAG 0x0
#define AUDAC3_DEF_USER_KARAOKE_FLAG 0x0
#define AUDAC3_DEF_ERROR_CONCEALMENT 0
#define AUDAC3_DEF_MAX_REPEAT_COUNT 0
struct msm_audio_ac3_config {
unsigned short numChans;
unsigned short wordSize;
unsigned short kCapableMode;
unsigned short compMode;
unsigned short outLfeOn;
unsigned short outputMode;
unsigned short stereoMode;
unsigned short dualMonoMode;
unsigned short fsCod;
unsigned short pcmScaleFac;
unsigned short dynRngScaleHi;
unsigned short dynRngScaleLow;
unsigned short user_downmix_flag;
unsigned short user_karaoke_flag;
unsigned short dm_address_high;
unsigned short dm_address_low;
unsigned short ko_address_high;
unsigned short ko_address_low;
unsigned short error_concealment;
unsigned short max_rep_count;
unsigned short channel_routing_mode[6];
};
#endif /* _UAPI_MSM_AUDIO_AC3_H */

26
include/uapi/audio/linux/msm_audio_alac.h
ファイルの表示

@@ -1,26 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_ALAC_H
#define _UAPI_MSM_AUDIO_ALAC_H
#include <linux/types.h>
#define AUDIO_GET_ALAC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+0), struct msm_audio_alac_config)
#define AUDIO_SET_ALAC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+1), struct msm_audio_alac_config)
struct msm_audio_alac_config {
__u32 frameLength;
__u8 compatVersion;
__u8 bitDepth;
__u8 pb; /* currently unused */
__u8 mb; /* currently unused */
__u8 kb; /* currently unused */
__u8 channelCount;
__u16 maxRun; /* currently unused */
__u32 maxSize;
__u32 averageBitRate;
__u32 sampleRate;
__u32 channelLayout;
};
#endif /* _UAPI_MSM_AUDIO_ALAC_H */

35
include/uapi/audio/linux/msm_audio_amrnb.h
ファイルの表示

@@ -1,35 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_AMRNB_H
#define _UAPI_MSM_AUDIO_AMRNB_H
#include <audio/linux/msm_audio.h>
#include <linux/types.h>
#define AUDIO_GET_AMRNB_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+0), unsigned int)
#define AUDIO_SET_AMRNB_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+1), unsigned int)
#define AUDIO_GET_AMRNB_ENC_CONFIG_V2 _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+2), \
struct msm_audio_amrnb_enc_config_v2)
#define AUDIO_SET_AMRNB_ENC_CONFIG_V2 _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+3), \
struct msm_audio_amrnb_enc_config_v2)
struct msm_audio_amrnb_enc_config {
unsigned short voicememoencweight1;
unsigned short voicememoencweight2;
unsigned short voicememoencweight3;
unsigned short voicememoencweight4;
unsigned short dtx_mode_enable; /* 0xFFFF - enable, 0- disable */
unsigned short test_mode_enable; /* 0xFFFF - enable, 0- disable */
unsigned short enc_mode; /* 0-MR475,1-MR515,2-MR59,3-MR67,4-MR74
* 5-MR795, 6- MR102, 7- MR122(default)
*/
};
struct msm_audio_amrnb_enc_config_v2 {
__u32 band_mode;
__u32 dtx_enable;
__u32 frame_format;
};
#endif /* _UAPI_MSM_AUDIO_AMRNB_H */

19
include/uapi/audio/linux/msm_audio_amrwb.h
ファイルの表示

@@ -1,19 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_AMRWB_H
#define _UAPI_MSM_AUDIO_AMRWB_H
#include <audio/linux/msm_audio.h>
#include <linux/types.h>
#define AUDIO_GET_AMRWB_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+0), \
struct msm_audio_amrwb_enc_config)
#define AUDIO_SET_AMRWB_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+1), \
struct msm_audio_amrwb_enc_config)
struct msm_audio_amrwb_enc_config {
__u32 band_mode;
__u32 dtx_enable;
__u32 frame_format;
};
#endif /* _UAPI_MSM_AUDIO_AMRWB_H */

18
include/uapi/audio/linux/msm_audio_amrwbplus.h
ファイルの表示

@@ -1,18 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_AMR_WB_PLUS_H
#define _UAPI_MSM_AUDIO_AMR_WB_PLUS_H
#define AUDIO_GET_AMRWBPLUS_CONFIG_V2 _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+2), struct msm_audio_amrwbplus_config_v2)
#define AUDIO_SET_AMRWBPLUS_CONFIG_V2 _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+3), struct msm_audio_amrwbplus_config_v2)
struct msm_audio_amrwbplus_config_v2 {
unsigned int size_bytes;
unsigned int version;
unsigned int num_channels;
unsigned int amr_band_mode;
unsigned int amr_dtx_mode;
unsigned int amr_frame_fmt;
unsigned int amr_lsf_idx;
};
#endif /* _UAPI_MSM_AUDIO_AMR_WB_PLUS_H */

28
include/uapi/audio/linux/msm_audio_ape.h
ファイルの表示

@@ -1,28 +0,0 @@
/* The following structure has been taken
* from Monkey's Audio SDK with permission
*/
#ifndef _UAPI_MSM_AUDIO_APE_H
#define _UAPI_MSM_AUDIO_APE_H
#include <linux/types.h>
#define AUDIO_GET_APE_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+0), struct msm_audio_ape_config)
#define AUDIO_SET_APE_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+1), struct msm_audio_ape_config)
struct msm_audio_ape_config {
__u16 compatibleVersion;
__u16 compressionLevel;
__u32 formatFlags;
__u32 blocksPerFrame;
__u32 finalFrameBlocks;
__u32 totalFrames;
__u16 bitsPerSample;
__u16 numChannels;
__u32 sampleRate;
__u32 seekTablePresent;
};
#endif /* _UAPI_MSM_AUDIO_APE_H */

840
include/uapi/audio/linux/msm_audio_calibration.h
ファイルの表示

@@ -1,840 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_CALIBRATION_H
#define _UAPI_MSM_AUDIO_CALIBRATION_H
#include <linux/types.h>
#include <linux/ioctl.h>
#define CAL_IOCTL_MAGIC 'a'
#define AUDIO_ALLOCATE_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, \
200, void *)
#define AUDIO_DEALLOCATE_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, \
201, void *)
#define AUDIO_PREPARE_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, \
202, void *)
#define AUDIO_SET_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, \
203, void *)
#define AUDIO_GET_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, \
204, void *)
#define AUDIO_POST_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, \
205, void *)
/* For Real-Time Audio Calibration */
#define AUDIO_GET_RTAC_ADM_INFO _IOR(CAL_IOCTL_MAGIC, \
207, void *)
#define AUDIO_GET_RTAC_VOICE_INFO _IOR(CAL_IOCTL_MAGIC, \
208, void *)
#define AUDIO_GET_RTAC_ADM_CAL _IOWR(CAL_IOCTL_MAGIC, \
209, void *)
#define AUDIO_SET_RTAC_ADM_CAL _IOWR(CAL_IOCTL_MAGIC, \
210, void *)
#define AUDIO_GET_RTAC_ASM_CAL _IOWR(CAL_IOCTL_MAGIC, \
211, void *)
#define AUDIO_SET_RTAC_ASM_CAL _IOWR(CAL_IOCTL_MAGIC, \
212, void *)
#define AUDIO_GET_RTAC_CVS_CAL _IOWR(CAL_IOCTL_MAGIC, \
213, void *)
#define AUDIO_SET_RTAC_CVS_CAL _IOWR(CAL_IOCTL_MAGIC, \
214, void *)
#define AUDIO_GET_RTAC_CVP_CAL _IOWR(CAL_IOCTL_MAGIC, \
215, void *)
#define AUDIO_SET_RTAC_CVP_CAL _IOWR(CAL_IOCTL_MAGIC, \
216, void *)
#define AUDIO_GET_RTAC_AFE_CAL _IOWR(CAL_IOCTL_MAGIC, \
217, void *)
#define AUDIO_SET_RTAC_AFE_CAL _IOWR(CAL_IOCTL_MAGIC, \
218, void *)
enum {
CVP_VOC_RX_TOPOLOGY_CAL_TYPE = 0,
CVP_VOC_TX_TOPOLOGY_CAL_TYPE,
CVP_VOCPROC_STATIC_CAL_TYPE,
CVP_VOCPROC_DYNAMIC_CAL_TYPE,
CVS_VOCSTRM_STATIC_CAL_TYPE,
CVP_VOCDEV_CFG_CAL_TYPE,
CVP_VOCPROC_STATIC_COL_CAL_TYPE,
CVP_VOCPROC_DYNAMIC_COL_CAL_TYPE,
CVS_VOCSTRM_STATIC_COL_CAL_TYPE,
ADM_TOPOLOGY_CAL_TYPE,
ADM_CUST_TOPOLOGY_CAL_TYPE,
ADM_AUDPROC_CAL_TYPE,
ADM_AUDVOL_CAL_TYPE,
ASM_TOPOLOGY_CAL_TYPE,
ASM_CUST_TOPOLOGY_CAL_TYPE,
ASM_AUDSTRM_CAL_TYPE,
AFE_COMMON_RX_CAL_TYPE,
AFE_COMMON_TX_CAL_TYPE,
AFE_ANC_CAL_TYPE,
AFE_AANC_CAL_TYPE,
AFE_FB_SPKR_PROT_CAL_TYPE,
AFE_HW_DELAY_CAL_TYPE,
AFE_SIDETONE_CAL_TYPE,
AFE_TOPOLOGY_CAL_TYPE,
AFE_CUST_TOPOLOGY_CAL_TYPE,
LSM_CUST_TOPOLOGY_CAL_TYPE,
LSM_TOPOLOGY_CAL_TYPE,
LSM_CAL_TYPE,
ADM_RTAC_INFO_CAL_TYPE,
VOICE_RTAC_INFO_CAL_TYPE,
ADM_RTAC_APR_CAL_TYPE,
ASM_RTAC_APR_CAL_TYPE,
VOICE_RTAC_APR_CAL_TYPE,
MAD_CAL_TYPE,
ULP_AFE_CAL_TYPE,
ULP_LSM_CAL_TYPE,
DTS_EAGLE_CAL_TYPE,
AUDIO_CORE_METAINFO_CAL_TYPE,
SRS_TRUMEDIA_CAL_TYPE,
CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
ADM_RTAC_AUDVOL_CAL_TYPE,
ULP_LSM_TOPOLOGY_ID_CAL_TYPE,
AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE,
AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE,
AFE_SIDETONE_IIR_CAL_TYPE,
AFE_LSM_TOPOLOGY_CAL_TYPE,
AFE_LSM_TX_CAL_TYPE,
ADM_LSM_TOPOLOGY_CAL_TYPE,
ADM_LSM_AUDPROC_CAL_TYPE,
ADM_LSM_AUDPROC_PERSISTENT_CAL_TYPE,
ADM_AUDPROC_PERSISTENT_CAL_TYPE,
AFE_FB_SPKR_PROT_V4_EX_VI_CAL_TYPE,
MAX_CAL_TYPES,
};
#define AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE AFE_FB_SPKR_PROT_TH_VI_CAL_TYPE
#define AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE AFE_FB_SPKR_PROT_EX_VI_CAL_TYPE
#define AFE_FB_SPKR_PROT_V4_EX_VI_CAL_TYPE AFE_FB_SPKR_PROT_V4_EX_VI_CAL_TYPE
#define AFE_SIDETONE_IIR_CAL_TYPE AFE_SIDETONE_IIR_CAL_TYPE
#define AFE_LSM_TOPOLOGY_CAL_TYPE AFE_LSM_TOPOLOGY_CAL_TYPE
#define AFE_LSM_TX_CAL_TYPE AFE_LSM_TX_CAL_TYPE
#define ADM_LSM_TOPOLOGY_CAL_TYPE ADM_LSM_TOPOLOGY_CAL_TYPE
#define ADM_LSM_AUDPROC_CAL_TYPE ADM_LSM_AUDPROC_CAL_TYPE
#define ADM_LSM_AUDPROC_PERSISTENT_CAL_TYPE ADM_LSM_AUDPROC_PERSISTENT_CAL_TYPE
#define ADM_AUDPROC_PERSISTENT_CAL_TYPE ADM_AUDPROC_PERSISTENT_CAL_TYPE
#define LSM_CAL_TYPES
#define TOPOLOGY_SPECIFIC_CHANNEL_INFO
#define MSM_SPKR_PROT_SPV3
#define MSM_SPKR_PROT_SPV4
#define MSM_CMA_MEM_ALLOC
enum {
VERSION_0_0,
};
enum {
PER_VOCODER_CAL_BIT_MASK = 0x10000,
};
#define MAX_IOCTL_CMD_SIZE 512
/* common structures */
struct audio_cal_header {
__s32 data_size;
__s32 version;
__s32 cal_type;
__s32 cal_type_size;
};
struct audio_cal_type_header {
__s32 version;
__s32 buffer_number;
};
struct audio_cal_data {
/* Size of cal data at mem_handle allocation or at vaddr */
__s32 cal_size;
/* If mem_handle if shared memory is used*/
__s32 mem_handle;
#ifdef MSM_CMA_MEM_ALLOC
/* cma allocation flag if cma heap memory is used */
__u32 cma_mem;
#endif
};
/* AUDIO_ALLOCATE_CALIBRATION */
struct audio_cal_type_alloc {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
};
struct audio_cal_alloc {
struct audio_cal_header hdr;
struct audio_cal_type_alloc cal_type;
};
/* AUDIO_DEALLOCATE_CALIBRATION */
struct audio_cal_type_dealloc {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
};
struct audio_cal_dealloc {
struct audio_cal_header hdr;
struct audio_cal_type_dealloc cal_type;
};
/* AUDIO_PREPARE_CALIBRATION */
struct audio_cal_type_prepare {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
};
struct audio_cal_prepare {
struct audio_cal_header hdr;
struct audio_cal_type_prepare cal_type;
};
/* AUDIO_POST_CALIBRATION */
struct audio_cal_type_post {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
};
struct audio_cal_post {
struct audio_cal_header hdr;
struct audio_cal_type_post cal_type;
};
/*AUDIO_CORE_META_INFO */
struct audio_cal_info_metainfo {
__u32 nKey;
};
/* Cal info types */
enum {
RX_DEVICE,
TX_DEVICE,
MAX_PATH_TYPE
};
struct audio_cal_info_adm_top {
__s32 topology;
__s32 acdb_id;
/* RX_DEVICE or TX_DEVICE */
__s32 path;
__s32 app_type;
__s32 sample_rate;
};
struct audio_cal_info_audproc {
__s32 acdb_id;
/* RX_DEVICE or TX_DEVICE */
__s32 path;
__s32 app_type;
__s32 sample_rate;
};
struct audio_cal_info_audvol {
__s32 acdb_id;
/* RX_DEVICE or TX_DEVICE */
__s32 path;
__s32 app_type;
__s32 vol_index;
};
struct audio_cal_info_afe {
__s32 acdb_id;
/* RX_DEVICE or TX_DEVICE */
__s32 path;
__s32 sample_rate;
};
struct audio_cal_info_afe_top {
__s32 topology;
__s32 acdb_id;
/* RX_DEVICE or TX_DEVICE */
__s32 path;
__s32 sample_rate;
};
struct audio_cal_info_asm_top {
__s32 topology;
__s32 app_type;
};
struct audio_cal_info_audstrm {
__s32 app_type;
};
struct audio_cal_info_aanc {
__s32 acdb_id;
};
#define MAX_HW_DELAY_ENTRIES 25
struct audio_cal_hw_delay_entry {
__u32 sample_rate;
__u32 delay_usec;
};
struct audio_cal_hw_delay_data {
__u32 num_entries;
struct audio_cal_hw_delay_entry entry[MAX_HW_DELAY_ENTRIES];
};
struct audio_cal_info_hw_delay {
__s32 acdb_id;
/* RX_DEVICE or TX_DEVICE */
__s32 path;
__s32 property_type;
struct audio_cal_hw_delay_data data;
};
enum msm_spkr_prot_states {
MSM_SPKR_PROT_CALIBRATED,
MSM_SPKR_PROT_CALIBRATION_IN_PROGRESS,
MSM_SPKR_PROT_DISABLED,
MSM_SPKR_PROT_NOT_CALIBRATED,
MSM_SPKR_PROT_PRE_CALIBRATED,
MSM_SPKR_PROT_IN_FTM_MODE,
MSM_SPKR_PROT_IN_V_VALI_MODE
};
#define MSM_SPKR_PROT_IN_FTM_MODE MSM_SPKR_PROT_IN_FTM_MODE
#define MSM_SPKR_PROT_IN_V_VALI_MODE MSM_SPKR_PROT_IN_V_VALI_MODE
enum msm_spkr_count {
SP_V2_SPKR_1,
SP_V2_SPKR_2,
SP_V2_NUM_MAX_SPKRS
};
struct audio_cal_info_spk_prot_cfg {
__s32 r0[SP_V2_NUM_MAX_SPKRS];
__s32 t0[SP_V2_NUM_MAX_SPKRS];
__u32 quick_calib_flag;
__u32 mode;
/*
* 0 - Start spk prot
* 1 - Start calib
* 2 - Disable spk prot
*/
#ifdef MSM_SPKR_PROT_SPV3
__u32 sp_version;
__s32 limiter_th[SP_V2_NUM_MAX_SPKRS];
#endif
};
struct audio_cal_info_sp_th_vi_ftm_cfg {
/*
* mode should be first param, add new params later to this.
* we use this mode(first 4 bytes) to differentiate
* whether it is TH_VI FTM or v-validation.
*/
__u32 mode;
/*
* 0 - normal running mode
* 1 - Calibration
* 2 - FTM mode
*/
__u32 wait_time[SP_V2_NUM_MAX_SPKRS];
__u32 ftm_time[SP_V2_NUM_MAX_SPKRS];
};
struct audio_cal_info_sp_th_vi_v_vali_cfg {
/*
* mode should be first param, add new params later to this.
* we use this mode(first 4 bytes) to differentiate
* whether it is TH_VI FTM or v-validation.
*/
__u32 mode;
/*
* 0 - normal running mode
* 1 - Calibration
* 2 - FTM mode
* 3 - V-Validation mode
*/
__u32 wait_time[SP_V2_NUM_MAX_SPKRS];
__u32 vali_time[SP_V2_NUM_MAX_SPKRS];
};
struct audio_cal_info_sp_ex_vi_ftm_cfg {
__u32 wait_time[SP_V2_NUM_MAX_SPKRS];
__u32 ftm_time[SP_V2_NUM_MAX_SPKRS];
__u32 mode;
/*
* 0 - normal running mode
* 2 - FTM mode
*/
};
struct audio_cal_info_sp_ex_vi_param {
__s32 freq_q20[SP_V2_NUM_MAX_SPKRS];
__s32 resis_q24[SP_V2_NUM_MAX_SPKRS];
__s32 qmct_q24[SP_V2_NUM_MAX_SPKRS];
__s32 status[SP_V2_NUM_MAX_SPKRS];
};
struct audio_cal_info_sp_v4_ex_vi_param {
__s32 ftm_re_q24[SP_V2_NUM_MAX_SPKRS];
__s32 ftm_Bl_q24[SP_V2_NUM_MAX_SPKRS];
__s32 ftm_Rms_q24[SP_V2_NUM_MAX_SPKRS];
__s32 ftm_Kms_q24[SP_V2_NUM_MAX_SPKRS];
__s32 ftm_freq_q20[SP_V2_NUM_MAX_SPKRS];
__s32 ftm_Qms_q24[SP_V2_NUM_MAX_SPKRS];
__u32 status[SP_V2_NUM_MAX_SPKRS];
};
struct audio_cal_info_sp_th_vi_param {
/*
* mode should be first param, add new params later to this.
* we use this mode(first 4 bytes) to differentiate
* whether it is TH_VI FTM or v-validation.
*/
__u32 mode;
__s32 r_dc_q24[SP_V2_NUM_MAX_SPKRS];
__s32 temp_q22[SP_V2_NUM_MAX_SPKRS];
__s32 status[SP_V2_NUM_MAX_SPKRS];
};
struct audio_cal_info_sp_th_vi_v_vali_param {
/*
* mode should be first param, add new params later to this.
* we use this mode(first 4 bytes) to differentiate
* whether it is TH_VI FTM or v-validation.
*/
__u32 mode;
__u32 vrms_q24[SP_V2_NUM_MAX_SPKRS];
__s32 status[SP_V2_NUM_MAX_SPKRS];
};
struct audio_cal_info_msm_spk_prot_status {
__s32 r0[SP_V2_NUM_MAX_SPKRS];
__s32 status;
};
struct audio_cal_info_sidetone {
__u16 enable;
__u16 gain;
__s32 tx_acdb_id;
__s32 rx_acdb_id;
__s32 mid;
__s32 pid;
};
#define MAX_SIDETONE_IIR_DATA_SIZE 224
#define MAX_NO_IIR_FILTER_STAGE 10
struct audio_cal_info_sidetone_iir {
__u16 iir_enable;
__u16 num_biquad_stages;
__u16 pregain;
__s32 tx_acdb_id;
__s32 rx_acdb_id;
__s32 mid;
__s32 pid;
__u8 iir_config[MAX_SIDETONE_IIR_DATA_SIZE];
};
struct audio_cal_info_lsm_top {
__s32 topology;
__s32 acdb_id;
__s32 app_type;
};
struct audio_cal_info_lsm {
__s32 acdb_id;
/* RX_DEVICE or TX_DEVICE */
__s32 path;
__s32 app_type;
};
#define VSS_NUM_CHANNELS_MAX 32
struct audio_cal_info_voc_top {
__s32 topology;
__s32 acdb_id;
#ifdef TOPOLOGY_SPECIFIC_CHANNEL_INFO
__u32 num_channels;
__u8 channel_mapping[VSS_NUM_CHANNELS_MAX];
#endif
};
struct audio_cal_info_vocproc {
__s32 tx_acdb_id;
__s32 rx_acdb_id;
__s32 tx_sample_rate;
__s32 rx_sample_rate;
};
enum {
DEFAULT_FEATURE_SET,
VOL_BOOST_FEATURE_SET,
};
struct audio_cal_info_vocvol {
__s32 tx_acdb_id;
__s32 rx_acdb_id;
/* DEFAULT_ or VOL_BOOST_FEATURE_SET */
__s32 feature_set;
};
struct audio_cal_info_vocdev_cfg {
__s32 tx_acdb_id;
__s32 rx_acdb_id;
};
#define MAX_VOICE_COLUMNS 20
union audio_cal_col_na {
__u8 val8;
__u16 val16;
__u32 val32;
__u64 val64;
} __packed;
struct audio_cal_col {
__u32 id;
__u32 type;
union audio_cal_col_na na_value;
} __packed;
struct audio_cal_col_data {
__u32 num_columns;
struct audio_cal_col column[MAX_VOICE_COLUMNS];
} __packed;
struct audio_cal_info_voc_col {
__s32 table_id;
__s32 tx_acdb_id;
__s32 rx_acdb_id;
struct audio_cal_col_data data;
};
/* AUDIO_SET_CALIBRATION & */
struct audio_cal_type_basic {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
};
struct audio_cal_basic {
struct audio_cal_header hdr;
struct audio_cal_type_basic cal_type;
};
struct audio_cal_type_adm_top {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_adm_top cal_info;
};
struct audio_cal_adm_top {
struct audio_cal_header hdr;
struct audio_cal_type_adm_top cal_type;
};
struct audio_cal_type_metainfo {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_metainfo cal_info;
};
struct audio_core_metainfo {
struct audio_cal_header hdr;
struct audio_cal_type_metainfo cal_type;
};
struct audio_cal_type_audproc {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_audproc cal_info;
};
struct audio_cal_audproc {
struct audio_cal_header hdr;
struct audio_cal_type_audproc cal_type;
};
struct audio_cal_type_audvol {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_audvol cal_info;
};
struct audio_cal_audvol {
struct audio_cal_header hdr;
struct audio_cal_type_audvol cal_type;
};
struct audio_cal_type_asm_top {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_asm_top cal_info;
};
struct audio_cal_asm_top {
struct audio_cal_header hdr;
struct audio_cal_type_asm_top cal_type;
};
struct audio_cal_type_audstrm {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_audstrm cal_info;
};
struct audio_cal_audstrm {
struct audio_cal_header hdr;
struct audio_cal_type_audstrm cal_type;
};
struct audio_cal_type_afe {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_afe cal_info;
};
struct audio_cal_afe {
struct audio_cal_header hdr;
struct audio_cal_type_afe cal_type;
};
struct audio_cal_type_afe_top {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_afe_top cal_info;
};
struct audio_cal_afe_top {
struct audio_cal_header hdr;
struct audio_cal_type_afe_top cal_type;
};
struct audio_cal_type_aanc {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_aanc cal_info;
};
struct audio_cal_aanc {
struct audio_cal_header hdr;
struct audio_cal_type_aanc cal_type;
};
struct audio_cal_type_fb_spk_prot_cfg {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_spk_prot_cfg cal_info;
};
struct audio_cal_fb_spk_prot_cfg {
struct audio_cal_header hdr;
struct audio_cal_type_fb_spk_prot_cfg cal_type;
};
struct audio_cal_type_sp_th_vi_ftm_cfg {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sp_th_vi_ftm_cfg cal_info;
};
struct audio_cal_sp_th_vi_ftm_cfg {
struct audio_cal_header hdr;
struct audio_cal_type_sp_th_vi_ftm_cfg cal_type;
};
struct audio_cal_type_sp_th_vi_v_vali_cfg {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sp_th_vi_v_vali_cfg cal_info;
};
struct audio_cal_sp_th_vi_v_vali_cfg {
struct audio_cal_header hdr;
struct audio_cal_type_sp_th_vi_v_vali_cfg cal_type;
};
struct audio_cal_type_sp_ex_vi_ftm_cfg {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sp_ex_vi_ftm_cfg cal_info;
};
struct audio_cal_sp_ex_vi_ftm_cfg {
struct audio_cal_header hdr;
struct audio_cal_type_sp_ex_vi_ftm_cfg cal_type;
};
struct audio_cal_type_hw_delay {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_hw_delay cal_info;
};
struct audio_cal_hw_delay {
struct audio_cal_header hdr;
struct audio_cal_type_hw_delay cal_type;
};
struct audio_cal_type_sidetone {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sidetone cal_info;
};
struct audio_cal_sidetone {
struct audio_cal_header hdr;
struct audio_cal_type_sidetone cal_type;
};
struct audio_cal_type_sidetone_iir {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sidetone_iir cal_info;
};
struct audio_cal_sidetone_iir {
struct audio_cal_header hdr;
struct audio_cal_type_sidetone_iir cal_type;
};
struct audio_cal_type_lsm_top {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_lsm_top cal_info;
};
struct audio_cal_lsm_top {
struct audio_cal_header hdr;
struct audio_cal_type_lsm_top cal_type;
};
struct audio_cal_type_lsm {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_lsm cal_info;
};
struct audio_cal_lsm {
struct audio_cal_header hdr;
struct audio_cal_type_lsm cal_type;
};
struct audio_cal_type_voc_top {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_voc_top cal_info;
};
struct audio_cal_voc_top {
struct audio_cal_header hdr;
struct audio_cal_type_voc_top cal_type;
};
struct audio_cal_type_vocproc {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_vocproc cal_info;
};
struct audio_cal_vocproc {
struct audio_cal_header hdr;
struct audio_cal_type_vocproc cal_type;
};
struct audio_cal_type_vocvol {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_vocvol cal_info;
};
struct audio_cal_vocvol {
struct audio_cal_header hdr;
struct audio_cal_type_vocvol cal_type;
};
struct audio_cal_type_vocdev_cfg {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_vocdev_cfg cal_info;
};
struct audio_cal_vocdev_cfg {
struct audio_cal_header hdr;
struct audio_cal_type_vocdev_cfg cal_type;
};
struct audio_cal_type_voc_col {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_voc_col cal_info;
};
struct audio_cal_voc_col {
struct audio_cal_header hdr;
struct audio_cal_type_voc_col cal_type;
};
/* AUDIO_GET_CALIBRATION */
struct audio_cal_type_fb_spk_prot_status {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_msm_spk_prot_status cal_info;
};
struct audio_cal_fb_spk_prot_status {
struct audio_cal_header hdr;
struct audio_cal_type_fb_spk_prot_status cal_type;
};
struct audio_cal_type_sp_th_vi_param {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sp_th_vi_param cal_info;
};
struct audio_cal_sp_th_vi_param {
struct audio_cal_header hdr;
struct audio_cal_type_sp_th_vi_param cal_type;
};
struct audio_cal_type_sp_th_vi_v_vali_param {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sp_th_vi_v_vali_param cal_info;
};
struct audio_cal_sp_th_vi_v_vali_param {
struct audio_cal_header hdr;
struct audio_cal_type_sp_th_vi_v_vali_param cal_type;
};
struct audio_cal_type_sp_ex_vi_param {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sp_ex_vi_param cal_info;
};
struct audio_cal_sp_ex_vi_param {
struct audio_cal_header hdr;
struct audio_cal_type_sp_ex_vi_param cal_type;
};
struct audio_cal_type_sp_v4_ex_vi_param {
struct audio_cal_type_header cal_hdr;
struct audio_cal_data cal_data;
struct audio_cal_info_sp_v4_ex_vi_param cal_info;
};
struct audio_cal_sp_v4_ex_vi_param {
struct audio_cal_header hdr;
struct audio_cal_type_sp_v4_ex_vi_param cal_type;
};
#endif /* _UAPI_MSM_AUDIO_CALIBRATION_H */

18
include/uapi/audio/linux/msm_audio_g711.h
ファイルの表示

@@ -1,18 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_G711_H
#define _UAPI_MSM_AUDIO_G711_H
#include <audio/linux/msm_audio.h>
#include <linux/types.h>
struct msm_audio_g711_enc_config {
__u32 sample_rate;
};
#define AUDIO_SET_G711_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+0), struct msm_audio_g711_enc_config)
#define AUDIO_GET_G711_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+1), struct msm_audio_g711_enc_config)
#endif /* _UAPI_MSM_AUDIO_G711_H */

17
include/uapi/audio/linux/msm_audio_g711_dec.h
ファイルの表示

@@ -1,17 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_G711_H
#define _UAPI_MSM_AUDIO_G711_H
#include <audio/linux/msm_audio.h>
#include <linux/types.h>
struct msm_audio_g711_dec_config {
__u32 sample_rate;
};
#define AUDIO_SET_G711_DEC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+0), struct msm_audio_g711_dec_config)
#define AUDIO_GET_G711_DEC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+1), struct msm_audio_g711_dec_config)
#endif /* _UAPI_MSM_AUDIO_G711_H */

156
include/uapi/audio/linux/msm_audio_mvs.h
ファイルの表示

@@ -1,156 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_MVS_H
#define _UAPI_MSM_AUDIO_MVS_H
#include <audio/linux/msm_audio.h>
#include <linux/types.h>
#define AUDIO_GET_MVS_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM + 0), unsigned int)
#define AUDIO_SET_MVS_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM + 1), unsigned int)
/* MVS modes */
#define MVS_MODE_IS733 0x1 /*QCELP 13K*/
#define MVS_MODE_IS127 0x2 /*EVRC-8k*/
#define MVS_MODE_4GV_NB 0x3 /*EVRC-B*/
#define MVS_MODE_4GV_WB 0x4 /*EVRC-WB*/
#define MVS_MODE_AMR 0x5
#define MVS_MODE_EFR 0x6
#define MVS_MODE_FR 0x7
#define MVS_MODE_HR 0x8
#define MVS_MODE_LINEAR_PCM 0x9
#define MVS_MODE_G711 0xA
#define MVS_MODE_PCM 0xC
#define MVS_MODE_AMR_WB 0xD
#define MVS_MODE_G729A 0xE
#define MVS_MODE_G711A 0xF
#define MVS_MODE_G722 0x10
#define MVS_MODE_PCM_WB 0x12
enum msm_audio_amr_mode {
MVS_AMR_MODE_0475, /* AMR 4.75 kbps */
MVS_AMR_MODE_0515, /* AMR 5.15 kbps */
MVS_AMR_MODE_0590, /* AMR 5.90 kbps */
MVS_AMR_MODE_0670, /* AMR 6.70 kbps */
MVS_AMR_MODE_0740, /* AMR 7.40 kbps */
MVS_AMR_MODE_0795, /* AMR 7.95 kbps */
MVS_AMR_MODE_1020, /* AMR 10.20 kbps */
MVS_AMR_MODE_1220, /* AMR 12.20 kbps */
MVS_AMR_MODE_0660, /* AMR-WB 6.60 kbps */
MVS_AMR_MODE_0885, /* AMR-WB 8.85 kbps */
MVS_AMR_MODE_1265, /* AMR-WB 12.65 kbps */
MVS_AMR_MODE_1425, /* AMR-WB 14.25 kbps */
MVS_AMR_MODE_1585, /* AMR-WB 15.85 kbps */
MVS_AMR_MODE_1825, /* AMR-WB 18.25 kbps */
MVS_AMR_MODE_1985, /* AMR-WB 19.85 kbps */
MVS_AMR_MODE_2305, /* AMR-WB 23.05 kbps */
MVS_AMR_MODE_2385, /* AMR-WB 23.85 kbps */
MVS_AMR_MODE_UNDEF
};
/* The MVS VOC rate type is used to identify the rate of QCELP 13K(IS733),
* EVRC(IS127), 4GV, or 4GV-WB frame.
*/
enum msm_audio_voc_rate {
MVS_VOC_0_RATE, /* Blank frame */
MVS_VOC_8_RATE, /* 1/8 rate */
MVS_VOC_4_RATE, /* 1/4 rate */
MVS_VOC_2_RATE, /* 1/2 rate */
MVS_VOC_1_RATE, /* Full rate */
MVS_VOC_ERASURE, /* erasure frame */
MVS_VOC_RATE_MAX,
MVS_VOC_RATE_UNDEF = MVS_VOC_RATE_MAX
};
enum msm_audio_amr_frame_type {
MVS_AMR_SPEECH_GOOD, /* Good speech frame */
MVS_AMR_SPEECH_DEGRADED, /* Speech degraded */
MVS_AMR_ONSET, /* Onset */
MVS_AMR_SPEECH_BAD, /* Corrupt speech frame (bad CRC) */
MVS_AMR_SID_FIRST, /* First silence descriptor */
MVS_AMR_SID_UPDATE, /* Comfort noise frame */
MVS_AMR_SID_BAD, /* Corrupt SID frame (bad CRC) */
MVS_AMR_NO_DATA, /* Nothing to transmit */
MVS_AMR_SPEECH_LOST /* Downlink speech lost */
};
enum msm_audio_g711a_mode {
MVS_G711A_MODE_MULAW,
MVS_G711A_MODE_ALAW
};
enum msm_audio_g711_mode {
MVS_G711_MODE_MULAW,
MVS_G711_MODE_ALAW
};
enum mvs_g722_mode_type {
MVS_G722_MODE_01,
MVS_G722_MODE_02,
MVS_G722_MODE_03,
MVS_G722_MODE_MAX,
MVS_G722_MODE_UNDEF
};
enum msm_audio_g711a_frame_type {
MVS_G711A_SPEECH_GOOD,
MVS_G711A_SID,
MVS_G711A_NO_DATA,
MVS_G711A_ERASURE
};
enum msm_audio_g729a_frame_type {
MVS_G729A_NO_DATA,
MVS_G729A_SPEECH_GOOD,
MVS_G729A_SID,
MVS_G729A_ERASURE
};
struct min_max_rate {
__u32 min_rate;
__u32 max_rate;
};
struct msm_audio_mvs_config {
__u32 mvs_mode;
__u32 rate_type;
struct min_max_rate min_max_rate;
__u32 dtx_mode;
};
#define MVS_MAX_VOC_PKT_SIZE 640
struct gsm_header {
__u8 bfi;
__u8 sid;
__u8 taf;
__u8 ufi;
};
struct q6_msm_audio_mvs_frame {
union {
__u32 frame_type;
__u32 packet_rate;
struct gsm_header gsm_frame_type;
} header;
__u32 len;
__u8 voc_pkt[MVS_MAX_VOC_PKT_SIZE];
};
struct msm_audio_mvs_frame {
__u32 frame_type;
__u32 len;
__u8 voc_pkt[MVS_MAX_VOC_PKT_SIZE];
};
#define Q5V2_MVS_MAX_VOC_PKT_SIZE 320
struct q5v2_msm_audio_mvs_frame {
__u32 frame_type;
__u32 len;
__u8 voc_pkt[Q5V2_MVS_MAX_VOC_PKT_SIZE];
};
#endif /* _UAPI_MSM_AUDIO_MVS_H */

38
include/uapi/audio/linux/msm_audio_qcp.h
ファイルの表示

@@ -1,38 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_QCP_H
#define _UAPI_MSM_AUDIO_QCP_H
#include <audio/linux/msm_audio.h>
#include <linux/types.h>
#define AUDIO_SET_QCELP_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
0, struct msm_audio_qcelp_enc_config)
#define AUDIO_GET_QCELP_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
1, struct msm_audio_qcelp_enc_config)
#define AUDIO_SET_EVRC_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
2, struct msm_audio_evrc_enc_config)
#define AUDIO_GET_EVRC_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
3, struct msm_audio_evrc_enc_config)
#define CDMA_RATE_BLANK 0x00
#define CDMA_RATE_EIGHTH 0x01
#define CDMA_RATE_QUARTER 0x02
#define CDMA_RATE_HALF 0x03
#define CDMA_RATE_FULL 0x04
#define CDMA_RATE_ERASURE 0x05
struct msm_audio_qcelp_enc_config {
__u32 cdma_rate;
__u32 min_bit_rate;
__u32 max_bit_rate;
};
struct msm_audio_evrc_enc_config {
__u32 cdma_rate;
__u32 min_bit_rate;
__u32 max_bit_rate;
};
#endif /* _UAPI_MSM_AUDIO_QCP_H */

37
include/uapi/audio/linux/msm_audio_sbc.h
ファイルの表示

@@ -1,37 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_SBC_H
#define _UAPI_MSM_AUDIO_SBC_H
#include <audio/linux/msm_audio.h>
#include <linux/types.h>
#define AUDIO_SET_SBC_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+0), struct msm_audio_sbc_enc_config)
#define AUDIO_GET_SBC_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+1), struct msm_audio_sbc_enc_config)
#define AUDIO_SBC_BA_LOUDNESS 0x0
#define AUDIO_SBC_BA_SNR 0x1
#define AUDIO_SBC_MODE_MONO 0x0
#define AUDIO_SBC_MODE_DUAL 0x1
#define AUDIO_SBC_MODE_STEREO 0x2
#define AUDIO_SBC_MODE_JSTEREO 0x3
#define AUDIO_SBC_BANDS_8 0x1
#define AUDIO_SBC_BLOCKS_4 0x0
#define AUDIO_SBC_BLOCKS_8 0x1
#define AUDIO_SBC_BLOCKS_12 0x2
#define AUDIO_SBC_BLOCKS_16 0x3
struct msm_audio_sbc_enc_config {
__u32 channels;
__u32 sample_rate;
__u32 bit_allocation;
__u32 number_of_subbands;
__u32 number_of_blocks;
__u32 bit_rate;
__u32 mode;
};
#endif /* _UAPI_MSM_AUDIO_SBC_H */

67
include/uapi/audio/linux/msm_audio_voicememo.h
ファイルの表示

@@ -1,67 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_VOICEMEMO_H
#define _UAPI_MSM_AUDIO_VOICEMEMO_H
#include <audio/linux/msm_audio.h>
#include <linux/types.h>
#define AUDIO_GET_VOICEMEMO_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+0), unsigned int)
#define AUDIO_SET_VOICEMEMO_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+1), unsigned int)
/* rec_type */
enum rpc_voc_rec_dir_type {
RPC_VOC_REC_NONE,
RPC_VOC_REC_FORWARD,
RPC_VOC_REC_REVERSE,
RPC_VOC_REC_BOTH,
RPC_VOC_MAX_REC_TYPE
};
/* capability */
enum rpc_voc_capability_type {
RPC_VOC_CAP_IS733 = 4,
RPC_VOC_CAP_IS127 = 8,
RPC_VOC_CAP_AMR = 64,
RPC_VOC_CAP_32BIT_DUMMY = 2147483647
};
/* Rate */
enum rpc_voc_rate_type {
RPC_VOC_0_RATE = 0,
RPC_VOC_8_RATE,
RPC_VOC_4_RATE,
RPC_VOC_2_RATE,
RPC_VOC_1_RATE,
RPC_VOC_ERASURE,
RPC_VOC_ERR_RATE,
RPC_VOC_AMR_RATE_475 = 0,
RPC_VOC_AMR_RATE_515 = 1,
RPC_VOC_AMR_RATE_590 = 2,
RPC_VOC_AMR_RATE_670 = 3,
RPC_VOC_AMR_RATE_740 = 4,
RPC_VOC_AMR_RATE_795 = 5,
RPC_VOC_AMR_RATE_1020 = 6,
RPC_VOC_AMR_RATE_1220 = 7,
};
/* frame_format */
enum rpc_voc_pb_len_rate_var_type {
RPC_VOC_PB_NATIVE_QCP = 3,
RPC_VOC_PB_AMR,
RPC_VOC_PB_EVB
};
struct msm_audio_voicememo_config {
__u32 rec_type;
__u32 rec_interval_ms;
__u32 auto_stop_ms;
__u32 capability;
__u32 max_rate;
__u32 min_rate;
__u32 frame_format;
__u32 dtx_enable;
__u32 data_req_ms;
};
#endif /* _UAPI_MSM_AUDIO_VOICEMEMO_H */

35
include/uapi/audio/linux/msm_audio_wma.h
ファイルの表示

@@ -1,35 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_WMA_H
#define _UAPI_MSM_AUDIO_WMA_H
#include <linux/types.h>
#define AUDIO_GET_WMA_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+0), unsigned int)
#define AUDIO_SET_WMA_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+1), unsigned int)
#define AUDIO_GET_WMA_CONFIG_V2 _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+2), struct msm_audio_wma_config_v2)
#define AUDIO_SET_WMA_CONFIG_V2 _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+3), struct msm_audio_wma_config_v2)
struct msm_audio_wma_config {
unsigned short armdatareqthr;
unsigned short channelsdecoded;
unsigned short wmabytespersec;
unsigned short wmasamplingfreq;
unsigned short wmaencoderopts;
};
struct msm_audio_wma_config_v2 {
unsigned short format_tag;
unsigned short numchannels;
__u32 samplingrate;
__u32 avgbytespersecond;
unsigned short block_align;
unsigned short validbitspersample;
__u32 channelmask;
unsigned short encodeopt;
};
#endif /* _UAPI_MSM_AUDIO_WMA_H */

24
include/uapi/audio/linux/msm_audio_wmapro.h
ファイルの表示

@@ -1,24 +0,0 @@
#ifndef _UAPI_MSM_AUDIO_WMAPRO_H
#define _UAPI_MSM_AUDIO_WMAPRO_H
#include <linux/types.h>
#define AUDIO_GET_WMAPRO_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+0), struct msm_audio_wmapro_config)
#define AUDIO_SET_WMAPRO_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
(AUDIO_MAX_COMMON_IOCTL_NUM+1), struct msm_audio_wmapro_config)
struct msm_audio_wmapro_config {
unsigned short armdatareqthr;
__u8 validbitspersample;
__u8 numchannels;
unsigned short formattag;
__u32 samplingrate;
__u32 avgbytespersecond;
unsigned short asfpacketlength;
__u32 channelmask;
unsigned short encodeopt;
unsigned short advancedencodeopt;
__u32 advancedencodeopt2;
};
#endif /* _UAPI_MSM_AUDIO_WMAPRO_H */

52
include/uapi/audio/linux/wcd-spi-ac-params.h
ファイルの表示

@@ -1,52 +0,0 @@
#ifndef __UAPI_WCD_SPI_AC_PARAMS_H__
#define __UAPI_WCD_SPI_AC_PARAMS_H__
#include <linux/types.h>
#define WCD_SPI_AC_CMD_CONC_BEGIN 0x01
#define WCD_SPI_AC_CMD_CONC_END 0x02
#define WCD_SPI_AC_CMD_BUF_DATA 0x03
#define WCD_SPI_AC_MAX_BUFFERS 2
#define WCD_SPI_AC_MAX_CH_PER_BUF 8
#define WCD_SPI_AC_CLIENT_CDEV_NAME "wcd-spi-ac-client"
#define WCD_SPI_AC_PROCFS_DIR_NAME "wcd-spi-ac"
#define WCD_SPI_AC_PROCFS_STATE_NAME "svc-state"
/*
* wcd_spi_ac_buf_data:
* Buffer address for one buffer. Should have data
* for all the channels. If channels are unused, the
* value must be NULL.
*
* @addr:
* Address where each channel of the buffer starts.
*/
struct wcd_spi_ac_buf_data {
__u32 addr[WCD_SPI_AC_MAX_CH_PER_BUF];
} __packed;
/*
* wcd_spi_ac_write_cmd:
* Data sent to the driver's write interface should
* be packed in this format.
*
* @cmd_type:
* Indicates the type of command that is sent. Should
* be one of the valid commands defined with
* WCD_SPI_AC_CMD_*
* @payload:
* No payload for:
* WCD_SPI_AC_CMD_CONC_BEGIN
* WCD_SPI_AC_CMD_CONC_END
* Upto WCD_SPI_AC_MAX_BUFFERS of type
* struct wcd_spi_ac_buf_data for:
* WCD_SPI_AC_CMD_BUF_DATA
*/
struct wcd_spi_ac_write_cmd {
__u32 cmd_type;
__u8 payload[0];
} __packed;
#endif /* end of __UAPI_WCD_SPI_AC_PARAMS_H__ */

90
include/uapi/audio/sound/audio_compressed_formats.h
ファイルの表示

@@ -1,90 +0,0 @@
#ifndef __AUDIO_COMPRESSED_FORMATS_H
#define __AUDIO_COMPRESSED_FORMATS_H
#include <linux/types.h>
#define AUDIO_COMP_FORMAT_ALAC 0x1
#define AUDIO_COMP_FORMAT_APE 0x2
#define AUDIO_COMP_FORMAT_APTX 0x3
#define AUDIO_COMP_FORMAT_DSD 0x4
#define AUDIO_COMP_FORMAT_FLAC 0x5
#define AUDIO_COMP_FORMAT_VORBIS 0x6
#define AUDIO_COMP_FORMAT_WMA 0x7
#define AUDIO_COMP_FORMAT_WMA_PRO 0x8
#define SND_COMPRESS_DEC_HDR
struct snd_generic_dec_aac {
__u16 audio_obj_type;
__u16 pce_bits_size;
} __attribute__((packed, aligned(4)));
struct snd_generic_dec_flac {
__u16 sample_size;
__u16 min_blk_size;
__u16 max_blk_size;
__u16 min_frame_size;
__u16 max_frame_size;
} __attribute__((packed, aligned(4)));
struct snd_generic_dec_alac {
__u32 frame_length;
__u8 compatible_version;
__u8 bit_depth;
__u8 pb;
__u8 mb;
__u8 kb;
__u8 num_channels;
__u16 max_run;
__u32 max_frame_bytes;
__u32 avg_bit_rate;
__u32 sample_rate;
__u32 channel_layout_tag;
} __attribute__((packed, aligned(4)));
struct snd_generic_dec_ape {
__u16 compatible_version;
__u16 compression_level;
__u32 format_flags;
__u32 blocks_per_frame;
__u32 final_frame_blocks;
__u32 total_frames;
__u16 bits_per_sample;
__u16 num_channels;
__u32 sample_rate;
__u32 seek_table_present;
} __attribute__((packed, aligned(4)));
struct snd_generic_dec_wma {
__u32 super_block_align;
__u32 bits_per_sample;
__u32 channelmask;
__u32 encodeopt;
__u32 encodeopt1;
__u32 encodeopt2;
__u32 avg_bit_rate;
} __attribute__((packed, aligned(4)));
#define SND_DEC_WMA_EXTENTED_SUPPORT
struct snd_generic_dec_aptx {
__u32 lap;
__u32 uap;
__u32 nap;
} __attribute__((packed, aligned(4)));
struct snd_generic_dec_vorbis {
__u32 bit_stream_fmt;
} __attribute__((packed, aligned(4)));
/** struct snd_generic_dec_dsd - codec for DSD format
* @blk_size - dsd channel block size
*/
struct snd_generic_dec_dsd {
__u32 blk_size;
} __attribute__((packed, aligned(4)));
struct snd_generic_dec_amrwb_plus {
__u32 bit_stream_fmt;
} __attribute__((packed, aligned(4)));
#endif

104
module_mgr.bzl ノーマルファイル
ファイルの表示

@@ -0,0 +1,104 @@
load("//build/bazel_common_rules/dist:dist.bzl", "copy_to_dist_dir")
load("//build/kernel/kleaf:kernel.bzl", "kernel_module",
"kernel_modules_install",
"ddk_module",
"ddk_submodule")
def _create_module_conditional_src_map(conditional_srcs):
processed_conditional_srcs = {}
for conditional_src_name in conditional_srcs:
conditional_src = conditional_srcs[conditional_src_name]
if type(conditional_src) == "list":
processed_conditional_srcs[conditional_src_name] = { True: conditional_src }
else:
processed_conditional_srcs[conditional_src_name] = conditional_src
return processed_conditional_srcs
def _get_module_srcs(module, options, formatter):
srcs = [] + module.srcs
module_path = "{}/".format(module.path) if module.path else ""
for option in module.conditional_srcs:
is_option_enabled = option in options
srcs.extend(module.conditional_srcs[option].get(is_option_enabled, []))
return ["{}{}".format(module_path, formatter(src)) for src in srcs]
def _combine_target_module_options(modules, config_options):
all_options = {option: True for option in config_options}
all_options = all_options | {module.config_option: True for module in modules if module.config_option}
return all_options
def create_module_registry(hdrs = []):
module_map = {}
def register(name, path = None, config_option = None, srcs = [], conditional_srcs = {}, deps = []):
module_map[name] = struct(
name = name,
path = path,
srcs = srcs,
conditional_srcs = _create_module_conditional_src_map(conditional_srcs),
config_option = config_option,
deps = deps,
)
return struct(
module_map = module_map,
hdrs = hdrs,
register = register,
get = module_map.get,
)
def define_target_modules(target, variant, registry, modules, config_options = []):
formatter = lambda s : s.replace("%t", target)\
.replace("%v", variant)\
.replace("%b", "{}_{}".format(target, variant))
kernel_build = "{}_{}".format(target, variant)
kernel_build_label = "//msm-kernel:{}".format(kernel_build)
modules = [registry.get(module_name) for module_name in modules]
options = _combine_target_module_options(modules, config_options)
headers = ["//msm-kernel:all_headers"] + registry.hdrs
all_module_rules = []
for module in modules:
rule_name = "{}_{}".format(kernel_build, module.name)
srcs = _get_module_srcs(module, options, formatter)
deps = headers + [formatter(dep) for dep in module.deps]
if not srcs:
continue
ddk_submodule(
name = rule_name,
srcs = srcs,
out = "{}.ko".format(module.name),
deps = deps,
local_defines = options.keys(),
)
all_module_rules.append(rule_name)
ddk_module(
name = "{}_modules".format(kernel_build),
kernel_build = kernel_build_label,
deps = all_module_rules
)
copy_to_dist_dir(
name = "{}_modules_dist".format(kernel_build),
data = [":{}_modules".format(kernel_build)],
dist_dir = "out/target/product/{}/dlkm/lib/modules/".format(target),
flat = True,
wipe_dist_dir = False,
allow_duplicate_filenames = False,
mode_overrides = {"**/*": "644"},
log = "info"
)
def define_consolidate_gki_modules(target, registry, modules, config_options = []):
define_target_modules(target, "consolidate", registry, modules, config_options)
define_target_modules(target, "gki", registry, modules, config_options)

51
soc/regmap-swr.c
ファイルの表示

@@ -12,6 +12,9 @@
#include <linux/init.h>
#include <soc/soundwire.h>
#define ADDR_BYTES 2
#define VAL_BYTES 1
#define PAD_BYTES 0
static int regmap_swr_gather_write(void *context,
const void *reg, size_t reg_size,
@@ -20,8 +23,6 @@ static int regmap_swr_gather_write(void *context,
struct device *dev = context;
struct swr_device *swr = to_swr_device(dev);
struct regmap *map = dev_get_regmap(dev, NULL);
size_t addr_bytes;
size_t val_bytes;
int i, ret = 0;
u16 reg_addr = 0;
u8 *value;
@@ -30,21 +31,20 @@ static int regmap_swr_gather_write(void *context,
dev_err_ratelimited(dev, "%s: regmap is NULL\n", __func__);
return -EINVAL;
}
addr_bytes = map->format.reg_bytes;
if (swr == NULL) {
dev_err_ratelimited(dev, "%s: swr device is NULL\n", __func__);
return -EINVAL;
}
if (reg_size != addr_bytes) {
if (reg_size != ADDR_BYTES) {
dev_err_ratelimited(dev, "%s: reg size %zd bytes not supported\n",
__func__, reg_size);
return -EINVAL;
}
reg_addr = *(u16 *)reg;
val_bytes = map->format.val_bytes;
/* val_len = val_bytes * val_count */
for (i = 0; i < (val_len / val_bytes); i++) {
value = (u8 *)val + (val_bytes * i);
/* val_len = VAL_BYTES * val_count */
for (i = 0; i < (val_len / VAL_BYTES); i++) {
value = (u8 *)val + (VAL_BYTES * i);
ret = swr_write(swr, swr->dev_num, (reg_addr + i), value);
if (ret < 0) {
dev_err_ratelimited(dev, "%s: write reg 0x%x failed, err %d\n",
@@ -61,9 +61,6 @@ static int regmap_swr_raw_multi_reg_write(void *context, const void *data,
struct device *dev = context;
struct swr_device *swr = to_swr_device(dev);
struct regmap *map = dev_get_regmap(dev, NULL);
size_t addr_bytes;
size_t val_bytes;
size_t pad_bytes;
size_t num_regs;
int i = 0;
int ret = 0;
@@ -81,15 +78,11 @@ static int regmap_swr_raw_multi_reg_write(void *context, const void *data,
return -EINVAL;
}
addr_bytes = map->format.reg_bytes;
val_bytes = map->format.val_bytes;
pad_bytes = map->format.pad_bytes;
if (addr_bytes + val_bytes + pad_bytes == 0) {
if (ADDR_BYTES + VAL_BYTES + PAD_BYTES == 0) {
dev_err_ratelimited(dev, "%s: sum of addr, value and pad is 0\n", __func__);
return -EINVAL;
}
num_regs = count / (addr_bytes + val_bytes + pad_bytes);
num_regs = count / (ADDR_BYTES + VAL_BYTES + PAD_BYTES);
reg = kcalloc(num_regs, sizeof(u16), GFP_KERNEL);
if (!reg)
@@ -104,9 +97,9 @@ static int regmap_swr_raw_multi_reg_write(void *context, const void *data,
buf = (u8 *)data;
for (i = 0; i < num_regs; i++) {
reg[i] = *(u16 *)buf;
buf += (map->format.reg_bytes + map->format.pad_bytes);
buf += (ADDR_BYTES + PAD_BYTES);
val[i] = *buf;
buf += map->format.val_bytes;
buf += VAL_BYTES;
}
ret = swr_bulk_write(swr, swr->dev_num, reg, val, num_regs);
if (ret)
@@ -122,26 +115,20 @@ static int regmap_swr_write(void *context, const void *data, size_t count)
{
struct device *dev = context;
struct regmap *map = dev_get_regmap(dev, NULL);
size_t addr_bytes;
size_t val_bytes;
size_t pad_bytes;
if (map == NULL) {
dev_err_ratelimited(dev, "%s: regmap is NULL\n", __func__);
return -EINVAL;
}
addr_bytes = map->format.reg_bytes;
val_bytes = map->format.val_bytes;
pad_bytes = map->format.pad_bytes;
WARN_ON(count < addr_bytes);
WARN_ON(count < ADDR_BYTES);
if (count > (addr_bytes + val_bytes + pad_bytes))
if (count > (ADDR_BYTES + VAL_BYTES + PAD_BYTES))
return regmap_swr_raw_multi_reg_write(context, data, count);
else
return regmap_swr_gather_write(context, data, addr_bytes,
(data + addr_bytes),
(count - addr_bytes));
return regmap_swr_gather_write(context, data, ADDR_BYTES,
(data + ADDR_BYTES),
(count - ADDR_BYTES));
}
static int regmap_swr_read(void *context,
@@ -151,7 +138,6 @@ static int regmap_swr_read(void *context,
struct device *dev = context;
struct swr_device *swr = to_swr_device(dev);
struct regmap *map = dev_get_regmap(dev, NULL);
size_t addr_bytes;
int ret = 0;
u16 reg_addr = 0;
@@ -159,12 +145,11 @@ static int regmap_swr_read(void *context,
dev_err_ratelimited(dev, "%s: regmap is NULL\n", __func__);
return -EINVAL;
}
addr_bytes = map->format.reg_bytes;
if (swr == NULL) {
dev_err_ratelimited(dev, "%s: swr is NULL\n", __func__);
return -EINVAL;
}
if (reg_size != addr_bytes) {
if (reg_size != ADDR_BYTES) {
dev_err_ratelimited(dev, "%s: register size %zd bytes not supported\n",
__func__, reg_size);
return -EINVAL;

17
soc/swr-mstr-ctrl.c
ファイルの表示

@@ -497,6 +497,7 @@ static int swrm_get_ssp_period(struct swr_mstr_ctrl *swrm,
static int swrm_core_vote_request(struct swr_mstr_ctrl *swrm, bool enable)
{
int ret = 0;
static DEFINE_RATELIMIT_STATE(rtl, 1 * HZ, 1);
if (!swrm->handle)
return -EINVAL;
@@ -509,8 +510,9 @@ static int swrm_core_vote_request(struct swr_mstr_ctrl *swrm, bool enable)
if (swrm->core_vote) {
ret = swrm->core_vote(swrm->handle, enable);
if (ret)
dev_err_ratelimited(swrm->dev,
"%s: core vote request failed\n", __func__);
if (__ratelimit(&rtl))
dev_err_ratelimited(swrm->dev,
"%s: core vote request failed\n", __func__);
}
exit:
mutex_unlock(&swrm->clklock);
@@ -1906,7 +1908,6 @@ static int swrm_connect_port(struct swr_master *master,
master->num_port += portinfo->num_port;
set_bit(ENABLE_PENDING, &swrm->port_req_pending);
swr_port_response(master, portinfo->tid);
mutex_unlock(&swrm->mlock);
return 0;
@@ -1927,6 +1928,7 @@ static int swrm_disconnect_port(struct swr_master *master,
struct swrm_mports *mport;
struct swr_mstr_ctrl *swrm = swr_get_ctrl_data(master);
u8 mstr_port_id, mstr_ch_mask;
u8 num_port = 0;
if (!swrm) {
dev_err_ratelimited(&master->dev,
@@ -1959,7 +1961,7 @@ static int swrm_disconnect_port(struct swr_master *master,
if (!port_req) {
dev_err_ratelimited(&master->dev, "%s:port not enabled : port %d\n",
__func__, portinfo->port_id[i]);
goto err;
continue;
}
port_req->req_ch &= ~portinfo->ch_en[i];
mport->req_ch &= ~mstr_ch_mask;
@@ -1969,8 +1971,13 @@ static int swrm_disconnect_port(struct swr_master *master,
mport->ch_rate = 0;
swrm_update_bus_clk(swrm);
}
num_port++;
}
master->num_port -= portinfo->num_port;
if (master->num_port > num_port)
master->num_port -= num_port;
else
master->num_port = 0;
set_bit(DISABLE_PENDING, &swrm->port_req_pending);
swr_port_response(master, portinfo->tid);
mutex_unlock(&swrm->mlock);