qcacmn: Fix IPA WDI3 Tx issues
Fix bug to enable IPA WDI3 Tx H/W path. Change-Id: Ice691dccc649b38971985cd8da042719d943cec7 CRs-Fixed: 2085751
Dieser Commit ist enthalten in:
Yun Park
@@ -16,7 +16,7 @@
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#ifdef IPA_OFFLOAD
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#include <ipa_wdi3.h>
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#include <linux/ipa_wdi3.h>
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#include <qdf_types.h>
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#include <qdf_lock.h>
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#include <hal_api.h>
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@@ -25,9 +25,311 @@
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#include <wdi_event.h>
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#include <queue.h>
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#include "dp_types.h"
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#include "dp_htt.h"
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#include "dp_tx.h"
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#include "dp_ipa.h"
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/**
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* dp_tx_ipa_uc_detach - Free autonomy TX resources
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* @soc: data path instance
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* @pdev: core txrx pdev context
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*
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* Free allocated TX buffers with WBM SRNG
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*
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* Return: none
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*/
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static void dp_tx_ipa_uc_detach(struct dp_soc *soc, struct dp_pdev *pdev)
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{
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int idx;
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for (idx = 0; idx < soc->ipa_uc_tx_rsc.alloc_tx_buf_cnt; idx++) {
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if (soc->ipa_uc_tx_rsc.tx_buf_pool_vaddr[idx]) {
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qdf_mem_free(soc->ipa_uc_tx_rsc.tx_buf_pool_vaddr[idx]);
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soc->ipa_uc_tx_rsc.tx_buf_pool_vaddr[idx] = NULL;
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}
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}
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qdf_mem_free(soc->ipa_uc_tx_rsc.tx_buf_pool_vaddr);
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soc->ipa_uc_tx_rsc.tx_buf_pool_vaddr = NULL;
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}
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/**
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* dp_rx_ipa_uc_detach - free autonomy RX resources
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* @soc: data path instance
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* @pdev: core txrx pdev context
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*
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* This function will detach DP RX into main device context
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* will free DP Rx resources.
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*
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* Return: none
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*/
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static void dp_rx_ipa_uc_detach(struct dp_soc *soc, struct dp_pdev *pdev)
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{
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}
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int dp_ipa_uc_detach(struct dp_soc *soc, struct dp_pdev *pdev)
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{
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/* TX resource detach */
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dp_tx_ipa_uc_detach(soc, pdev);
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/* RX resource detach */
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dp_rx_ipa_uc_detach(soc, pdev);
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return QDF_STATUS_SUCCESS; /* success */
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}
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/* Hard coded config parameters until dp_ops_cfg.cfg_attach implemented */
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#define CFG_IPA_UC_TX_BUF_SIZE_DEFAULT (2048)
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/**
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* dp_tx_ipa_uc_attach - Allocate autonomy TX resources
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* @soc: data path instance
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* @pdev: Physical device handle
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*
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* Allocate TX buffer from non-cacheable memory
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* Attache allocated TX buffers with WBM SRNG
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*
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* Return: int
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*/
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static int dp_tx_ipa_uc_attach(struct dp_soc *soc, struct dp_pdev *pdev)
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{
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uint32_t tx_buffer_count;
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uint32_t ring_base_align = 8;
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void *buffer_vaddr_unaligned;
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void *buffer_vaddr;
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qdf_dma_addr_t buffer_paddr_unaligned;
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qdf_dma_addr_t buffer_paddr;
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struct hal_srng *wbm_srng =
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soc->tx_comp_ring[IPA_TX_COMP_RING_IDX].hal_srng;
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struct hal_srng_params srng_params;
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uint32_t paddr_lo;
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uint32_t paddr_hi;
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void *ring_entry;
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int num_entries;
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int retval = QDF_STATUS_SUCCESS;
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/*
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* Uncomment when dp_ops_cfg.cfg_attach is implemented
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* unsigned int uc_tx_buf_sz =
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* dp_cfg_ipa_uc_tx_buf_size(pdev->osif_pdev);
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*/
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unsigned int uc_tx_buf_sz = CFG_IPA_UC_TX_BUF_SIZE_DEFAULT;
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unsigned int alloc_size = uc_tx_buf_sz + ring_base_align - 1;
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hal_get_srng_params(soc->hal_soc, (void *)wbm_srng, &srng_params);
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num_entries = srng_params.num_entries;
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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"requested %d buffers to be posted to wbm ring",
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num_entries);
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soc->ipa_uc_tx_rsc.tx_buf_pool_vaddr = qdf_mem_malloc(num_entries *
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sizeof(*soc->ipa_uc_tx_rsc.tx_buf_pool_vaddr));
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if (!soc->ipa_uc_tx_rsc.tx_buf_pool_vaddr) {
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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"%s: IPA WBM Ring mem_info alloc fail", __func__);
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return -ENOMEM;
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}
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hal_srng_access_start(soc->hal_soc, (void *)wbm_srng);
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/*
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* Allocate Tx buffers as many as possible
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* Populate Tx buffers into WBM2IPA ring
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* This initial buffer population will simulate H/W as source ring,
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* and update HP
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*/
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for (tx_buffer_count = 0;
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tx_buffer_count < num_entries - 1; tx_buffer_count++) {
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buffer_vaddr_unaligned = qdf_mem_alloc_consistent(soc->osdev,
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soc->osdev->dev, alloc_size, &buffer_paddr_unaligned);
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if (!buffer_vaddr_unaligned)
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break;
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ring_entry = hal_srng_dst_get_next_hp(soc->hal_soc,
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(void *)wbm_srng);
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if (!ring_entry) {
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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"Failed to get WBM ring entry\n");
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qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
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alloc_size, buffer_vaddr_unaligned,
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buffer_paddr_unaligned, 0);
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goto fail;
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}
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buffer_vaddr = (void *)qdf_align((unsigned long)
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buffer_vaddr_unaligned, ring_base_align);
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buffer_paddr = buffer_paddr_unaligned +
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((unsigned long)(buffer_vaddr) -
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(unsigned long)buffer_vaddr_unaligned);
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paddr_lo = ((u64)buffer_paddr & 0x00000000ffffffff);
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paddr_hi = ((u64)buffer_paddr & 0x0000001f00000000) >> 32;
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HAL_WBM_PADDR_LO_SET(ring_entry, paddr_lo);
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HAL_WBM_PADDR_HI_SET(ring_entry, paddr_hi);
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soc->ipa_uc_tx_rsc.tx_buf_pool_vaddr[tx_buffer_count] =
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buffer_vaddr;
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}
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hal_srng_access_end(soc->hal_soc, wbm_srng);
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soc->ipa_uc_tx_rsc.alloc_tx_buf_cnt = tx_buffer_count;
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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"IPA WDI TX buffer: %d allocated\n",
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tx_buffer_count);
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return retval;
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fail:
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hal_srng_access_end(soc->hal_soc, wbm_srng);
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qdf_mem_free(soc->ipa_uc_tx_rsc.tx_buf_pool_vaddr);
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return retval;
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}
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/**
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* dp_rx_ipa_uc_attach - Allocate autonomy RX resources
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* @soc: data path instance
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* @pdev: core txrx pdev context
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*
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* This function will attach a DP RX instance into the main
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* device (SOC) context.
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*
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* Return: QDF_STATUS_SUCCESS: success
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* QDF_STATUS_E_RESOURCES: Error return
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*/
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static int dp_rx_ipa_uc_attach(struct dp_soc *soc, struct dp_pdev *pdev)
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{
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return QDF_STATUS_SUCCESS;
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}
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int dp_ipa_uc_attach(struct dp_soc *soc, struct dp_pdev *pdev)
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{
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int error;
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/* TX resource attach */
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error = dp_tx_ipa_uc_attach(soc, pdev);
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if (error) {
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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"DP IPA UC TX attach fail code %d\n", error);
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return error;
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}
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/* RX resource attach */
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error = dp_rx_ipa_uc_attach(soc, pdev);
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if (error) {
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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"DP IPA UC RX attach fail code %d\n", error);
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dp_tx_ipa_uc_detach(soc, pdev);
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return error;
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}
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return QDF_STATUS_SUCCESS; /* success */
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}
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/*
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* dp_ipa_ring_resource_setup() - setup IPA ring resources
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* @soc: data path SoC handle
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*
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* Return: none
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*/
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int dp_ipa_ring_resource_setup(struct dp_soc *soc,
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struct dp_pdev *pdev)
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{
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struct hal_soc *hal_soc = (struct hal_soc *)soc->hal_soc;
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struct hal_srng *hal_srng;
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struct hal_srng_params srng_params;
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qdf_dma_addr_t hp_addr;
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unsigned long addr_offset, dev_base_paddr;
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/* IPA TCL_DATA Ring - HAL_SRNG_SW2TCL3 */
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hal_srng = soc->tcl_data_ring[IPA_TCL_DATA_RING_IDX].hal_srng;
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hal_get_srng_params(hal_soc, (void *)hal_srng, &srng_params);
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soc->ipa_uc_tx_rsc.ipa_tcl_ring_base_paddr =
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srng_params.ring_base_paddr;
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soc->ipa_uc_tx_rsc.ipa_tcl_ring_base_vaddr =
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srng_params.ring_base_vaddr;
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soc->ipa_uc_tx_rsc.ipa_tcl_ring_size =
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(srng_params.num_entries * srng_params.entry_size) << 2;
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/*
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* For the register backed memory addresses, use the scn->mem_pa to
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* calculate the physical address of the shadow registers
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*/
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dev_base_paddr =
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(unsigned long)
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((struct hif_softc *)(hal_soc->hif_handle))->mem_pa;
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addr_offset = (unsigned long)(hal_srng->u.src_ring.hp_addr) -
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(unsigned long)(hal_soc->dev_base_addr);
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soc->ipa_uc_tx_rsc.ipa_tcl_hp_paddr =
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(qdf_dma_addr_t)(addr_offset + dev_base_paddr);
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QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
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"%s: addr_offset=%x, dev_base_paddr=%x, ipa_tcl_hp_paddr=%x",
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__func__, (unsigned int)addr_offset,
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(unsigned int)dev_base_paddr,
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(unsigned int)(soc->ipa_uc_tx_rsc.ipa_tcl_hp_paddr));
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/* IPA TX COMP Ring - HAL_SRNG_WBM2SW2_RELEASE */
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hal_srng = soc->tx_comp_ring[IPA_TX_COMP_RING_IDX].hal_srng;
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hal_get_srng_params(hal_soc, (void *)hal_srng, &srng_params);
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soc->ipa_uc_tx_rsc.ipa_wbm_ring_base_paddr =
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srng_params.ring_base_paddr;
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soc->ipa_uc_tx_rsc.ipa_wbm_ring_base_vaddr =
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srng_params.ring_base_vaddr;
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soc->ipa_uc_tx_rsc.ipa_wbm_ring_size =
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(srng_params.num_entries * srng_params.entry_size) << 2;
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addr_offset = (unsigned long)(hal_srng->u.dst_ring.tp_addr) -
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(unsigned long)(hal_soc->dev_base_addr);
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soc->ipa_uc_tx_rsc.ipa_wbm_tp_paddr =
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(qdf_dma_addr_t)(addr_offset + dev_base_paddr);
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QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
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"%s: addr_offset=%x, dev_base_paddr=%x, ipa_wbm_tp_paddr=%x",
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__func__, (unsigned int)addr_offset,
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(unsigned int)dev_base_paddr,
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(unsigned int)(soc->ipa_uc_tx_rsc.ipa_wbm_tp_paddr));
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/* IPA REO_DEST Ring - HAL_SRNG_REO2SW4 */
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hal_srng = soc->reo_dest_ring[IPA_REO_DEST_RING_IDX].hal_srng;
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hal_get_srng_params(hal_soc, (void *)hal_srng, &srng_params);
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soc->ipa_uc_rx_rsc.ipa_reo_ring_base_paddr =
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srng_params.ring_base_paddr;
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soc->ipa_uc_rx_rsc.ipa_reo_ring_base_vaddr =
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srng_params.ring_base_vaddr;
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soc->ipa_uc_rx_rsc.ipa_reo_ring_size =
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(srng_params.num_entries * srng_params.entry_size) << 2;
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addr_offset = (unsigned long)(hal_srng->u.dst_ring.tp_addr) -
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(unsigned long)(hal_soc->dev_base_addr);
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soc->ipa_uc_rx_rsc.ipa_reo_tp_paddr =
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(qdf_dma_addr_t)(addr_offset + dev_base_paddr);
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QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
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"%s: addr_offset=%x, dev_base_paddr=%x, ipa_reo_tp_paddr=%x",
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__func__, (unsigned int)addr_offset,
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(unsigned int)dev_base_paddr,
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(unsigned int)(soc->ipa_uc_rx_rsc.ipa_reo_tp_paddr));
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hal_srng = pdev->rx_refill_buf_ring2.hal_srng;
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hal_get_srng_params(hal_soc, (void *)hal_srng, &srng_params);
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soc->ipa_uc_rx_rsc.ipa_rx_refill_buf_ring_base_paddr =
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srng_params.ring_base_paddr;
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soc->ipa_uc_rx_rsc.ipa_rx_refill_buf_ring_base_vaddr =
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srng_params.ring_base_vaddr;
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soc->ipa_uc_rx_rsc.ipa_rx_refill_buf_ring_size =
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(srng_params.num_entries * srng_params.entry_size) << 2;
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hp_addr = hal_srng_get_hp_addr(hal_soc, (void *)hal_srng);
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soc->ipa_uc_rx_rsc.ipa_rx_refill_buf_hp_paddr = hp_addr;
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QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
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"%s: ipa_rx_refill_buf_hp_paddr=%x", __func__,
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(unsigned int)(soc->ipa_uc_rx_rsc.ipa_rx_refill_buf_hp_paddr));
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return 0;
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}
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/**
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* dp_ipa_uc_get_resource() - Client request resource information
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* @ppdev - handle to the device instance
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@@ -87,11 +389,14 @@ QDF_STATUS dp_ipa_set_doorbell_paddr(struct cdp_pdev *ppdev)
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struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
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struct dp_soc *soc = pdev->soc;
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struct dp_ipa_resources *ipa_res = &pdev->ipa_resource;
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struct hal_srng *wbm_srng =
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soc->tx_comp_ring[IPA_TX_COMP_RING_IDX].hal_srng;
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struct hal_srng *reo_srng =
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soc->reo_dest_ring[IPA_REO_DEST_RING_IDX].hal_srng;
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hal_srng_set_hp_paddr(soc->tx_comp_ring[IPA_TX_COMP_RING_IDX].
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hal_srng, ipa_res->tx_comp_doorbell_paddr);
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hal_srng_set_hp_paddr(soc->reo_dest_ring[IPA_REO_DEST_RING_IDX].
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hal_srng, ipa_res->rx_ready_doorbell_paddr);
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hal_srng_dst_set_hp_paddr(wbm_srng, ipa_res->tx_comp_doorbell_paddr);
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hal_srng_dst_init_hp(wbm_srng, ipa_res->tx_comp_doorbell_vaddr);
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hal_srng_dst_set_hp_paddr(reo_srng, ipa_res->rx_ready_doorbell_paddr);
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return QDF_STATUS_SUCCESS;
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}
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@@ -259,8 +564,13 @@ QDF_STATUS dp_ipa_setup(struct cdp_pdev *ppdev, void *ipa_i2w_cb,
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struct ipa_wdi3_setup_info rx;
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struct ipa_wdi3_conn_in_params pipe_in;
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struct ipa_wdi3_conn_out_params pipe_out;
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struct tcl_data_cmd *tcl_desc_ptr;
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uint8_t *desc_addr;
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uint32_t desc_size;
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int ret;
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qdf_mem_zero(&tx, sizeof(struct ipa_wdi3_setup_info));
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qdf_mem_zero(&rx, sizeof(struct ipa_wdi3_setup_info));
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qdf_mem_zero(&pipe_in, sizeof(struct ipa_wdi3_conn_in_params));
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qdf_mem_zero(&pipe_out, sizeof(struct ipa_wdi3_conn_out_params));
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@@ -290,6 +600,17 @@ QDF_STATUS dp_ipa_setup(struct cdp_pdev *ppdev, void *ipa_i2w_cb,
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tx.num_pkt_buffers = ipa_res->tx_num_alloc_buffer;
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tx.pkt_offset = 0;
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/* Preprogram TCL descriptor */
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desc_addr = (uint8_t *)(tx.desc_format_template);
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desc_size = sizeof(struct tcl_data_cmd);
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HAL_TX_DESC_SET_TLV_HDR(desc_addr, HAL_TX_TCL_DATA_TAG, desc_size);
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tcl_desc_ptr = (struct tcl_data_cmd *)(tx.desc_format_template+1);
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tcl_desc_ptr->buf_addr_info.return_buffer_manager =
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HAL_RX_BUF_RBM_SW2_BM;
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tcl_desc_ptr->addrx_en = 1; /* Address X search enable in ASE */
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tcl_desc_ptr->encap_type = HAL_TX_ENCAP_TYPE_ETHERNET;
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tcl_desc_ptr->packet_offset = 2; /* padding for alignment */
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/* RX PIPE */
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/**
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* Transfer Ring: REO Ring
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@@ -334,6 +655,7 @@ QDF_STATUS dp_ipa_setup(struct cdp_pdev *ppdev, void *ipa_i2w_cb,
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(unsigned int)pipe_out.rx_uc_db_pa);
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ipa_res->tx_comp_doorbell_paddr = pipe_out.tx_uc_db_pa;
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ipa_res->tx_comp_doorbell_vaddr = pipe_out.tx_uc_db_va;
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ipa_res->rx_ready_doorbell_paddr = pipe_out.rx_uc_db_pa;
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QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
|
||||
|
||||
In neuem Issue referenzieren
Einen Benutzer sperren