qcacmn: Enable the 4th Tx. completion ring

Enable the 4th Tx. completion ring to save CPU load
Initialization and interrupt handling for 4th completion ring
is done here.

Change-Id: I2db27218a3c3e14d719d012f03454a6a7aa647fe

hif/src/snoc/if_ahb.c

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2013-2021 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -43,7 +44,7 @@
 #endif
 
 #define HIF_IC_CE0_IRQ_OFFSET 4
-#define HIF_IC_MAX_IRQ 52
+#define HIF_IC_MAX_IRQ 53
 
 static uint16_t ic_irqnum[HIF_IC_MAX_IRQ];
 /* integrated chip irq names */
@@ -96,6 +97,7 @@ const char *ic_irqname[HIF_IC_MAX_IRQ] = {
 "host2tcl-input-ring3",
 "host2tcl-input-ring2",
 "host2tcl-input-ring1",
+"wbm2host-tx-completions-ring4",
 "wbm2host-tx-completions-ring3",
 "wbm2host-tx-completions-ring2",
 "wbm2host-tx-completions-ring1",