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qcacmn: Enable the 4th Tx. completion ring

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Enable the 4th Tx. completion ring to save CPU load
Initialization and interrupt handling for 4th completion ring
is done here.

Change-Id: I2db27218a3c3e14d719d012f03454a6a7aa647fe
This commit is contained in:
Neha Bisht
2021-10-28 12:14:26 +05:30
committed by Madan Koyyalamudi
parent 08f1f6b1af
commit 5f8681ff1e
13 changed files with 181 additions and 13 deletions
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32
dp/wifi3.0/dp_main.c
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@@ -111,6 +111,12 @@ cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
#define WLAN_SYSFS_STAT_REQ_WAIT_MS 3000
#endif
#ifdef QCA_DP_ENABLE_TX_COMP_RING4
#define TXCOMP_RING4_NUM 3
#else
#define TXCOMP_RING4_NUM WBM2SW_TXCOMP_RING4_NUM
#endif
#ifdef WLAN_MCAST_MLO
#define DP_TX_TCL_METADATA_PDEV_ID_SET(_var, _val) \
HTT_TX_TCL_METADATA_V2_PDEV_ID_SET(_var, _val)
@@ -1404,6 +1410,13 @@ static int dp_srng_calculate_msi_group(struct dp_soc *soc,
ring_num);
if (nf_irq_mask)
nf_irq_enabled = true;
/*
* Using ring 4 as 4th tx completion ring since ring 3
* is Rx error ring
*/
if (ring_num == WBM2SW_TXCOMP_RING4_NUM)
ring_num = TXCOMP_RING4_NUM;
}
break;
@@ -1748,12 +1761,17 @@ dp_srng_configure_interrupt_thresholds(struct dp_soc *soc,
int ring_type, int ring_num,
int num_entries)
{
uint8_t wbm2_sw_rx_rel_ring_id;
wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(soc->wlan_cfg_ctx);
if (ring_type == REO_DST) {
ring_params->intr_timer_thres_us =
wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
ring_params->intr_batch_cntr_thres_entries =
wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
} else if (ring_type == WBM2SW_RELEASE && (ring_num == 3)) {
} else if (ring_type == WBM2SW_RELEASE &&
(ring_num == wbm2_sw_rx_rel_ring_id)) {
ring_params->intr_timer_thres_us =
wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
ring_params->intr_batch_cntr_thres_entries =
@@ -1778,12 +1796,18 @@ dp_srng_configure_interrupt_thresholds(struct dp_soc *soc,
int ring_type, int ring_num,
int num_entries)
{
uint8_t wbm2_sw_rx_rel_ring_id;
wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(soc->wlan_cfg_ctx);
if (ring_type == REO_DST) {
ring_params->intr_timer_thres_us =
wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
ring_params->intr_batch_cntr_thres_entries =
wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
} else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
} else if (ring_type == WBM2SW_RELEASE &&
(ring_num < wbm2_sw_rx_rel_ring_id ||
ring_num == WBM2SW_TXCOMP_RING4_NUM)) {
ring_params->intr_timer_thres_us =
wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
ring_params->intr_batch_cntr_thres_entries =
@@ -2514,7 +2538,7 @@ static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
int_ctx->rxdma2host_ring_mask);
/* Process Tx completion interrupts first to return back buffers */
for (index = 0; index < soc->num_tcl_data_rings; index++) {
for (index = 0; index < soc->num_tx_comp_rings; index++) {
if (!(1 << wlan_cfg_get_wbm_ring_num_for_index(soc->wlan_cfg_ctx, index) & tx_mask))
continue;
work_done = dp_tx_comp_handler(int_ctx,
@@ -14461,6 +14485,8 @@ static void dp_soc_cfg_attach(struct dp_soc *soc)
} else {
soc->init_tcl_cmd_cred_ring = true;
soc->num_tx_comp_rings =
wlan_cfg_num_tx_comp_rings(soc->wlan_cfg_ctx);
soc->num_tcl_data_rings =
wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
soc->num_reo_dest_rings =