瀏覽代碼

Merge 6fc69546c35fe82baba9994a5817282e4aa3f33e on remote branch

Change-Id: Id1806d79fd040e3f1d781a608d46b38d3044f05c
Linux Build Service Account 9 月之前
父節點
當前提交
5f7f5569a3
共有 4 個文件被更改,包括 21 次插入10 次删除
  1. 4 0
      Kbuild
  2. 0 2
      cnss2/anorak_consolidate_defconfig
  3. 0 2
      cnss2/anorak_gki_defconfig
  4. 17 6
      cnss2/pci.c

+ 4 - 0
Kbuild

@@ -82,6 +82,10 @@ ifeq ($(CONFIG_SLATE_MODULE_ENABLED), y)
 KBUILD_CPPFLAGS += -DCONFIG_SLATE_MODULE_ENABLED
 endif
 
+ifeq ($(CONFIG_FEATURE_SMEM_MAILBOX), y)
+KBUILD_CPPFLAGS += -DCONFIG_FEATURE_SMEM_MAILBOX
+endif
+
 obj-$(CONFIG_CNSS2) += cnss2/
 obj-$(CONFIG_ICNSS2) += icnss2/
 obj-$(CONFIG_CNSS_GENL) += cnss_genl/

+ 0 - 2
cnss2/anorak_consolidate_defconfig

@@ -4,8 +4,6 @@ CONFIG_CNSS2_QMI=y
 CONFIG_CNSS_QMI_SVC=m
 CONFIG_BUS_AUTO_SUSPEND=y
 CONFIG_CNSS2_SSR_DRIVER_DUMP=y
-CONFIG_CNSS_HW_SECURE_DISABLE=y
-CONFIG_CNSS_HW_SECURE_SMEM=y
 CONFIG_CNSS2_SMMU_DB_SUPPORT=y
 CONFIG_CNSS_PLAT_IPC_QMI_SVC=m
 CONFIG_WCNSS_MEM_PRE_ALLOC=m

+ 0 - 2
cnss2/anorak_gki_defconfig

@@ -4,8 +4,6 @@ CONFIG_CNSS2_QMI=y
 CONFIG_CNSS_QMI_SVC=m
 CONFIG_BUS_AUTO_SUSPEND=y
 CONFIG_CNSS2_SSR_DRIVER_DUMP=y
-CONFIG_CNSS_HW_SECURE_DISABLE=y
-CONFIG_CNSS_HW_SECURE_SMEM=y
 CONFIG_CNSS2_SMMU_DB_SUPPORT=y
 CONFIG_CNSS_PLAT_IPC_QMI_SVC=m
 CONFIG_WCNSS_MEM_PRE_ALLOC=m

+ 17 - 6
cnss2/pci.c

@@ -7455,16 +7455,27 @@ static void
 cnss_pci_restore_rc_speed(struct cnss_pci_data *pci_priv)
 {
 	int ret;
+	u16 link_speed;
 	struct cnss_plat_data *plat_priv = pci_priv->plat_priv;
 
-	/* if not Genoa, do not restore rc speed */
-	if (pci_priv->device_id != QCN7605_DEVICE_ID) {
+	switch (pci_priv->device_id) {
+	case QCN7605_DEVICE_ID:
+		/* do nothing, keep Gen1*/
+		return;
+	case QCA6490_DEVICE_ID:
+		/* restore to Gen2 */
+		link_speed = PCI_EXP_LNKSTA_CLS_5_0GB;
+		break;
+	default:
 		/* The request 0 will reset maximum GEN speed to default */
-		ret = cnss_pci_set_max_link_speed(pci_priv, plat_priv->rc_num, 0);
-		if (ret)
-			cnss_pr_err("Failed to reset max PCIe RC%x link speed to default, err = %d\n",
-				     plat_priv->rc_num, ret);
+		link_speed = 0;
+		break;
 	}
+
+	ret = cnss_pci_set_max_link_speed(pci_priv, plat_priv->rc_num, link_speed);
+	if (ret)
+		cnss_pr_err("Failed to set max PCIe RC%x link speed to %d, err = %d\n",
+			    plat_priv->rc_num, link_speed, ret);
 }
 
 static void