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qcacmn: Device and Target type support for qca6018

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Added target and device type support for qca6018.

Change-Id: I85382bf053d0a5f34cfaf0cca78a4b66b4265989
CRs-Fixed: 2323023
This commit is contained in:
Basamma Yakkanahalli
2018-11-02 15:52:37 +05:30
committed by nshrivas
parent 30265f8aeb
commit 5f7cfd49c2
20 changed files with 94 additions and 26 deletions
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2
dp/inc/cdp_txrx_cmn_reg.h
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@@ -73,6 +73,8 @@ static inline ol_txrx_soc_handle cdp_soc_attach(u_int16_t devid,
case RUMIM2M_DEVICE_ID_NODE1: /*lithium emulation */ case RUMIM2M_DEVICE_ID_NODE1: /*lithium emulation */
case RUMIM2M_DEVICE_ID_NODE2: /*lithium emulation */ case RUMIM2M_DEVICE_ID_NODE2: /*lithium emulation */
case RUMIM2M_DEVICE_ID_NODE3: /*lithium emulation */ case RUMIM2M_DEVICE_ID_NODE3: /*lithium emulation */
case RUMIM2M_DEVICE_ID_NODE4: /*lithium emulation */
case RUMIM2M_DEVICE_ID_NODE5: /*lithium emulation */
return dp_soc_attach_wifi3(psoc, hif_handle, htc_handle, return dp_soc_attach_wifi3(psoc, hif_handle, htc_handle,
qdf_dev, dp_ol_if_ops, devid); qdf_dev, dp_ol_if_ops, devid);
break; break;

1
dp/wifi3.0/dp_main.c
View File

@@ -8903,6 +8903,7 @@ void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
soc->hw_nac_monitor_support = 1; soc->hw_nac_monitor_support = 1;
break; break;
case TARGET_TYPE_QCA8074V2: case TARGET_TYPE_QCA8074V2:
case TARGET_TYPE_QCA6018:
wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx, wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
REO_DST_RING_SIZE_QCA8074); REO_DST_RING_SIZE_QCA8074);
wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false); wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);

1
hal/wifi3.0/hal_generic_api.h
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@@ -553,6 +553,7 @@ hal_rx_status_get_tlv_info_generic(void *rx_tlv_hdr, void *ppduinfo,
switch (hal->target_type) { switch (hal->target_type) {
case TARGET_TYPE_QCA8074: case TARGET_TYPE_QCA8074:
case TARGET_TYPE_QCA8074V2: case TARGET_TYPE_QCA8074V2:
case TARGET_TYPE_QCA6018:
ppdu_info->rx_status.is_stbc = ppdu_info->rx_status.is_stbc =
HAL_RX_GET(vht_sig_a_info, HAL_RX_GET(vht_sig_a_info,
VHT_SIG_A_INFO_0, STBC); VHT_SIG_A_INFO_0, STBC);

9
hal/wifi3.0/hal_srng.c
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@@ -33,6 +33,9 @@ void hal_qca8074v2_attach(struct hal_soc *hal);
#ifdef QCA_WIFI_QCA6390 #ifdef QCA_WIFI_QCA6390
void hal_qca6390_attach(struct hal_soc *hal); void hal_qca6390_attach(struct hal_soc *hal);
#endif #endif
#ifdef QCA_WIFI_QCA6018
void hal_qca6018_attach(struct hal_soc *hal);
#endif
/** /**
* hal_get_srng_ring_id() - get the ring id of a descriped ring * hal_get_srng_ring_id() - get the ring id of a descriped ring
@@ -251,6 +254,12 @@ static void hal_target_based_configure(struct hal_soc *hal)
hal_qca8074v2_attach(hal); hal_qca8074v2_attach(hal);
break; break;
#endif #endif
#if defined(QCA_WIFI_QCA6018) && defined(CONFIG_WIN)
case TARGET_TYPE_QCA6018:
hal_qca6018_attach(hal);
break;
#endif
default: default:
break; break;
} }

5
hal/wifi3.0/qca6018/hal_6018.c
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@@ -116,7 +116,10 @@ struct hal_hw_txrx_ops qca6018_hal_hw_txrx_ops = {
hal_tx_update_dscp_tid_6018, hal_tx_update_dscp_tid_6018,
hal_tx_desc_set_lmac_id_6018, hal_tx_desc_set_lmac_id_6018,
hal_tx_desc_set_buf_addr_generic, hal_tx_desc_set_buf_addr_generic,
hal_tx_desc_set_search_type_generic,
hal_tx_desc_set_search_index_generic,
hal_tx_comp_get_status_generic, hal_tx_comp_get_status_generic,
hal_tx_comp_get_release_reason_generic,
/* rx */ /* rx */
hal_rx_msdu_start_nss_get_6018, hal_rx_msdu_start_nss_get_6018,
@@ -133,6 +136,8 @@ struct hal_hw_txrx_ops qca6018_hal_hw_txrx_ops = {
hal_rx_link_desc_msdu0_ptr_generic, hal_rx_link_desc_msdu0_ptr_generic,
hal_reo_status_get_header_generic, hal_reo_status_get_header_generic,
hal_rx_status_get_tlv_info_generic, hal_rx_status_get_tlv_info_generic,
hal_rx_wbm_err_info_get_generic,
hal_rx_dump_mpdu_start_tlv_generic,
}; };
struct hal_hw_srng_config hw_srng_table_6018[] = { struct hal_hw_srng_config hw_srng_table_6018[] = {

1
hif/inc/hif.h
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@@ -61,6 +61,7 @@ typedef void *hif_handle_t;
#define HIF_TYPE_QCN7605 17 #define HIF_TYPE_QCN7605 17
#define HIF_TYPE_QCA6390 18 #define HIF_TYPE_QCA6390 18
#define HIF_TYPE_QCA8074V2 19 #define HIF_TYPE_QCA8074V2 19
#define HIF_TYPE_QCA6018 20
#ifdef IPA_OFFLOAD #ifdef IPA_OFFLOAD
#define DMA_COHERENT_MASK_IPA_VER_3_AND_ABOVE 37 #define DMA_COHERENT_MASK_IPA_VER_3_AND_ABOVE 37

1
hif/inc/hostdef.h
View File

@@ -40,5 +40,6 @@ extern struct hostdef_s *IPQ4019_HOSTdef;
#endif #endif
extern struct hostdef_s *QCA8074_HOSTdef; extern struct hostdef_s *QCA8074_HOSTdef;
extern struct hostdef_s *QCA8074V2_HOSTDEF; extern struct hostdef_s *QCA8074V2_HOSTDEF;
extern struct hostdef_s *QCA6018_HOSTDEF;
#endif #endif

4
hif/inc/target_type.h
View File

@@ -70,6 +70,10 @@ extern "C" {
#ifndef TARGET_TYPE_QCA8074V2 #ifndef TARGET_TYPE_QCA8074V2
#define TARGET_TYPE_QCA8074V2 24 #define TARGET_TYPE_QCA8074V2 24
#endif #endif
/* For Cypress */
#ifndef TARGET_TYPE_QCA6018
#define TARGET_TYPE_QCA6018 25
#endif
#ifdef __cplusplus #ifdef __cplusplus
} }

2
hif/inc/targetdef.h
View File

@@ -40,6 +40,7 @@ extern struct targetdef_s *IPQ4019_TARGETdef;
#endif #endif
extern struct targetdef_s *QCA8074_TARGETdef; extern struct targetdef_s *QCA8074_TARGETdef;
extern struct targetdef_s *QCA8074V2_TARGETDEF; extern struct targetdef_s *QCA8074V2_TARGETDEF;
extern struct targetdef_s *QCA6018_TARGETDEF;
extern struct ce_reg_def *AR6002_CE_TARGETdef; extern struct ce_reg_def *AR6002_CE_TARGETdef;
extern struct ce_reg_def *AR6003_CE_TARGETdef; extern struct ce_reg_def *AR6003_CE_TARGETdef;
@@ -57,6 +58,7 @@ extern struct ce_reg_def *IPQ4019_CE_TARGETdef;
#endif #endif
extern struct ce_reg_def *QCA8074_CE_TARGETdef; extern struct ce_reg_def *QCA8074_CE_TARGETdef;
extern struct ce_reg_def *QCA8074V2_CE_TARGETDEF; extern struct ce_reg_def *QCA8074V2_CE_TARGETDEF;
extern struct ce_reg_def *QCA6018_CE_TARGETDEF;
#endif #endif

6
hif/src/ath_procfs.c
View File

@@ -86,7 +86,8 @@ static ssize_t ath_procfs_diag_read(struct file *file, char __user *buf,
((tgt_info->target_type == TARGET_TYPE_QCA6290) || ((tgt_info->target_type == TARGET_TYPE_QCA6290) ||
(tgt_info->target_type == TARGET_TYPE_QCA6390) || (tgt_info->target_type == TARGET_TYPE_QCA6390) ||
(tgt_info->target_type == TARGET_TYPE_QCA8074) || (tgt_info->target_type == TARGET_TYPE_QCA8074) ||
(tgt_info->target_type == TARGET_TYPE_QCA8074V2)))) { (tgt_info->target_type == TARGET_TYPE_QCA8074V2) ||
(tgt_info->target_type == TARGET_TYPE_QCA6018)))) {
memtype = ((uint32_t)(*pos) & 0xff000000) >> 24; memtype = ((uint32_t)(*pos) & 0xff000000) >> 24;
offset = (uint32_t)(*pos) & 0xffffff; offset = (uint32_t)(*pos) & 0xffffff;
HIF_TRACE("%s: offset 0x%x memtype 0x%x, datalen %zu\n", HIF_TRACE("%s: offset 0x%x memtype 0x%x, datalen %zu\n",
@@ -159,7 +160,8 @@ static ssize_t ath_procfs_diag_write(struct file *file,
((tgt_info->target_type == TARGET_TYPE_QCA6290) || ((tgt_info->target_type == TARGET_TYPE_QCA6290) ||
(tgt_info->target_type == TARGET_TYPE_QCA6390) || (tgt_info->target_type == TARGET_TYPE_QCA6390) ||
(tgt_info->target_type == TARGET_TYPE_QCA8074) || (tgt_info->target_type == TARGET_TYPE_QCA8074) ||
(tgt_info->target_type == TARGET_TYPE_QCA8074V2)))) { (tgt_info->target_type == TARGET_TYPE_QCA8074V2) ||
(tgt_info->target_type == TARGET_TYPE_QCA6018)))) {
memtype = ((uint32_t)(*pos) & 0xff000000) >> 24; memtype = ((uint32_t)(*pos) & 0xff000000) >> 24;
offset = (uint32_t)(*pos) & 0xffffff; offset = (uint32_t)(*pos) & 0xffffff;
HIF_TRACE("%s: offset 0x%x memtype 0x%x, datalen %zu\n", HIF_TRACE("%s: offset 0x%x memtype 0x%x, datalen %zu\n",

2
hif/src/ce/ce_main.c
View File

@@ -1001,6 +1001,7 @@ bool ce_srng_based(struct hif_softc *scn)
case TARGET_TYPE_QCA8074V2: case TARGET_TYPE_QCA8074V2:
case TARGET_TYPE_QCA6290: case TARGET_TYPE_QCA6290:
case TARGET_TYPE_QCA6390: case TARGET_TYPE_QCA6390:
case TARGET_TYPE_QCA6018:
return true; return true;
default: default:
return false; return false;
@@ -2942,6 +2943,7 @@ void hif_ce_prepare_config(struct hif_softc *scn)
case TARGET_TYPE_QCA8074: case TARGET_TYPE_QCA8074:
case TARGET_TYPE_QCA8074V2: case TARGET_TYPE_QCA8074V2:
case TARGET_TYPE_QCA6018:
if (scn->bus_type == QDF_BUS_TYPE_PCI) { if (scn->bus_type == QDF_BUS_TYPE_PCI) {
hif_state->host_ce_config = hif_state->host_ce_config =
host_ce_config_wlan_qca8074_pci; host_ce_config_wlan_qca8074_pci;

14
hif/src/hif_main.c
View File

@@ -828,13 +828,21 @@ int hif_get_device_type(uint32_t device_id,
break; break;
case QCA8074V2_DEVICE_ID: case QCA8074V2_DEVICE_ID:
*hif_type = HIF_TYPE_QCA8074V2;
*target_type = TARGET_TYPE_QCA8074V2;
HIF_INFO(" *********** QCA8074V2 *************\n");
break;
case QCA6018_DEVICE_ID:
case RUMIM2M_DEVICE_ID_NODE0: case RUMIM2M_DEVICE_ID_NODE0:
case RUMIM2M_DEVICE_ID_NODE1: case RUMIM2M_DEVICE_ID_NODE1:
case RUMIM2M_DEVICE_ID_NODE2: case RUMIM2M_DEVICE_ID_NODE2:
case RUMIM2M_DEVICE_ID_NODE3: case RUMIM2M_DEVICE_ID_NODE3:
*hif_type = HIF_TYPE_QCA8074V2; case RUMIM2M_DEVICE_ID_NODE4:
*target_type = TARGET_TYPE_QCA8074V2; case RUMIM2M_DEVICE_ID_NODE5:
HIF_INFO(" *********** QCA8074V2 *************\n"); *hif_type = HIF_TYPE_QCA6018;
*target_type = TARGET_TYPE_QCA6018;
HIF_INFO(" *********** QCA6018 *************\n");
break; break;
default: default:

3
hif/src/hif_main.h
View File

@@ -95,6 +95,7 @@
currently defining this to 0xffff for currently defining this to 0xffff for
emulation purpose */ emulation purpose */
#define QCA8074V2_DEVICE_ID (0xfffe) /* Todo: replace this with actual number */ #define QCA8074V2_DEVICE_ID (0xfffe) /* Todo: replace this with actual number */
#define QCA6018_DEVICE_ID (0xfffd) /* Todo: replace this with actual number */
/* Genoa */ /* Genoa */
#define QCN7605_DEVICE_ID (0x1102) /* Genoa PCIe device ID*/ #define QCN7605_DEVICE_ID (0x1102) /* Genoa PCIe device ID*/
#define QCN7605_COMPOSITE (0x9900) #define QCN7605_COMPOSITE (0x9900)
@@ -104,6 +105,8 @@
#define RUMIM2M_DEVICE_ID_NODE1 0xabc1 #define RUMIM2M_DEVICE_ID_NODE1 0xabc1
#define RUMIM2M_DEVICE_ID_NODE2 0xabc2 #define RUMIM2M_DEVICE_ID_NODE2 0xabc2
#define RUMIM2M_DEVICE_ID_NODE3 0xabc3 #define RUMIM2M_DEVICE_ID_NODE3 0xabc3
#define RUMIM2M_DEVICE_ID_NODE4 0xaa10
#define RUMIM2M_DEVICE_ID_NODE5 0xaa11
#define HIF_GET_PCI_SOFTC(scn) ((struct hif_pci_softc *)scn) #define HIF_GET_PCI_SOFTC(scn) ((struct hif_pci_softc *)scn)
#define HIF_GET_CE_STATE(scn) ((struct HIF_CE_state *)scn) #define HIF_GET_CE_STATE(scn) ((struct HIF_CE_state *)scn)

11
hif/src/pcie/if_pci.c
View File

@@ -1983,7 +1983,8 @@ int hif_pci_bus_configure(struct hif_softc *hif_sc)
/* todo: consider replacing this with an srng field */ /* todo: consider replacing this with an srng field */
if (((hif_sc->target_info.target_type == TARGET_TYPE_QCA8074) || if (((hif_sc->target_info.target_type == TARGET_TYPE_QCA8074) ||
(hif_sc->target_info.target_type == TARGET_TYPE_QCA8074V2)) && (hif_sc->target_info.target_type == TARGET_TYPE_QCA8074V2) ||
(hif_sc->target_info.target_type == TARGET_TYPE_QCA6018)) &&
(hif_sc->bus_type == QDF_BUS_TYPE_AHB)) { (hif_sc->bus_type == QDF_BUS_TYPE_AHB)) {
hif_sc->per_ce_irq = true; hif_sc->per_ce_irq = true;
} }
@@ -2003,7 +2004,8 @@ int hif_pci_bus_configure(struct hif_softc *hif_sc)
} }
if (((hif_sc->target_info.target_type == TARGET_TYPE_QCA8074) || if (((hif_sc->target_info.target_type == TARGET_TYPE_QCA8074) ||
(hif_sc->target_info.target_type == TARGET_TYPE_QCA8074V2)) && (hif_sc->target_info.target_type == TARGET_TYPE_QCA8074V2) ||
(hif_sc->target_info.target_type == TARGET_TYPE_QCA6018)) &&
(hif_sc->bus_type == QDF_BUS_TYPE_PCI)) (hif_sc->bus_type == QDF_BUS_TYPE_PCI))
HIF_INFO_MED("%s: Skip irq config for PCI based 8074 target", HIF_INFO_MED("%s: Skip irq config for PCI based 8074 target",
__func__); __func__);
@@ -2137,7 +2139,9 @@ static int hif_enable_pci_nopld(struct hif_pci_softc *sc,
if ((device_id == RUMIM2M_DEVICE_ID_NODE0) || if ((device_id == RUMIM2M_DEVICE_ID_NODE0) ||
(device_id == RUMIM2M_DEVICE_ID_NODE1) || (device_id == RUMIM2M_DEVICE_ID_NODE1) ||
(device_id == RUMIM2M_DEVICE_ID_NODE2) || (device_id == RUMIM2M_DEVICE_ID_NODE2) ||
(device_id == RUMIM2M_DEVICE_ID_NODE3)) { (device_id == RUMIM2M_DEVICE_ID_NODE3) ||
(device_id == RUMIM2M_DEVICE_ID_NODE4) ||
(device_id == RUMIM2M_DEVICE_ID_NODE5)) {
mem = mem + 0x0c000000; mem = mem + 0x0c000000;
sc->mem = mem; sc->mem = mem;
HIF_INFO("%s: Changing PCI mem base to %pK\n", HIF_INFO("%s: Changing PCI mem base to %pK\n",
@@ -3518,6 +3522,7 @@ int hif_configure_irq(struct hif_softc *scn)
break; break;
case TARGET_TYPE_QCA8074: case TARGET_TYPE_QCA8074:
case TARGET_TYPE_QCA8074V2: case TARGET_TYPE_QCA8074V2:
case TARGET_TYPE_QCA6018:
ret = hif_ahb_configure_irq(sc); ret = hif_ahb_configure_irq(sc);
break; break;
default: default:

16
hif/src/qca6018def.c
View File

@@ -220,20 +220,20 @@
#define QCA6018_BOARD_DATA_SZ MISSING #define QCA6018_BOARD_DATA_SZ MISSING
#define QCA6018_BOARD_EXT_DATA_SZ MISSING #define QCA6018_BOARD_EXT_DATA_SZ MISSING
#define MY_TARGET_DEF QCA6018_TARGETdef #define MY_TARGET_DEF QCA6018_TARGETDEF
#define MY_HOST_DEF QCA6018_HOSTdef #define MY_HOST_DEF QCA6018_HOSTDEF
#define MY_CEREG_DEF QCA6018_CE_TARGETdef #define MY_CEREG_DEF QCA6018_CE_TARGETDEF
#define MY_TARGET_BOARD_DATA_SZ QCA6018_BOARD_DATA_SZ #define MY_TARGET_BOARD_DATA_SZ QCA6018_BOARD_DATA_SZ
#define MY_TARGET_BOARD_EXT_DATA_SZ QCA6018_BOARD_EXT_DATA_SZ #define MY_TARGET_BOARD_EXT_DATA_SZ QCA6018_BOARD_EXT_DATA_SZ
#include "targetdef.h" #include "targetdef.h"
#include "hostdef.h" #include "hostdef.h"
qdf_export_symbol(QCA6018_CE_TARGETdef); qdf_export_symbol(QCA6018_CE_TARGETDEF);
#else #else
#include "common_drv.h" #include "common_drv.h"
#include "targetdef.h" #include "targetdef.h"
#include "hostdef.h" #include "hostdef.h"
struct targetdef_s *QCA6018_TARGETdef; struct targetdef_s *QCA6018_TARGETDEF;
struct hostdef_s *QCA6018_HOSTdef; struct hostdef_s *QCA6018_HOSTDEF;
#endif /*QCA6018_HEADERS_DEF */ #endif /*QCA6018_HEADERS_DEF */
qdf_export_symbol(QCA6018_TARGETdef); qdf_export_symbol(QCA6018_TARGETDEF);
qdf_export_symbol(QCA6018_HOSTdef); qdf_export_symbol(QCA6018_HOSTDEF);

12
hif/src/regtable.c
View File

@@ -119,6 +119,12 @@ void hif_target_register_tbl_attach(struct hif_softc *scn, u32 target_type)
scn->target_ce_def = QCA8074V2_CE_TARGETDEF; scn->target_ce_def = QCA8074V2_CE_TARGETDEF;
break; break;
#endif #endif
#if defined(QCA6018_HEADERS_DEF)
case TARGET_TYPE_QCA6018:
scn->targetdef = QCA6018_TARGETDEF;
scn->target_ce_def = QCA6018_CE_TARGETDEF;
break;
#endif
#if defined(QCA6390_HEADERS_DEF) #if defined(QCA6390_HEADERS_DEF)
case TARGET_TYPE_QCA6390: case TARGET_TYPE_QCA6390:
@@ -205,6 +211,12 @@ void hif_register_tbl_attach(struct hif_softc *scn, u32 hif_type)
scn->hostdef = QCA8074V2_HOSTDEF; scn->hostdef = QCA8074V2_HOSTDEF;
break; break;
#endif #endif
#if defined(QCA6018_HEADERS_DEF)
case HIF_TYPE_QCA6018:
scn->hostdef = QCA6018_HOSTDEF;
HIF_TRACE("%s: HIF_TYPE_QCA6018", __func__);
break;
#endif
#if defined(QCA6290_HEADERS_DEF) #if defined(QCA6290_HEADERS_DEF)
case HIF_TYPE_QCA6290: case HIF_TYPE_QCA6290:
scn->hostdef = QCA6290_HOSTdef; scn->hostdef = QCA6290_HOSTdef;

19
hif/src/snoc/if_ahb.c
View File

@@ -442,7 +442,8 @@ void hif_ahb_disable_bus(struct hif_softc *scn)
/* Should not be executed on 8074 platform */ /* Should not be executed on 8074 platform */
if ((tgt_info->target_type != TARGET_TYPE_QCA8074) && if ((tgt_info->target_type != TARGET_TYPE_QCA8074) &&
(tgt_info->target_type != TARGET_TYPE_QCA8074V2)) { (tgt_info->target_type != TARGET_TYPE_QCA8074V2) &&
(tgt_info->target_type != TARGET_TYPE_QCA6018)) {
hif_ahb_clk_enable_disable(&pdev->dev, 0); hif_ahb_clk_enable_disable(&pdev->dev, 0);
hif_ahb_device_reset(scn); hif_ahb_device_reset(scn);
@@ -545,7 +546,8 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
/* QCA_WIFI_QCA8074_VP:Should not be executed on 8074 VP platform */ /* QCA_WIFI_QCA8074_VP:Should not be executed on 8074 VP platform */
if ((tgt_info->target_type != TARGET_TYPE_QCA8074) && if ((tgt_info->target_type != TARGET_TYPE_QCA8074) &&
(tgt_info->target_type != TARGET_TYPE_QCA8074V2)) { (tgt_info->target_type != TARGET_TYPE_QCA8074V2) &&
(tgt_info->target_type != TARGET_TYPE_QCA6018)) {
if (hif_ahb_enable_radio(sc, pdev, id) != 0) { if (hif_ahb_enable_radio(sc, pdev, id) != 0) {
HIF_INFO("error in enabling soc\n"); HIF_INFO("error in enabling soc\n");
return -EIO; return -EIO;
@@ -563,7 +565,8 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
err_target_sync: err_target_sync:
/* QCA_WIFI_QCA8074_VP:Should not be executed on 8074 VP platform */ /* QCA_WIFI_QCA8074_VP:Should not be executed on 8074 VP platform */
if ((tgt_info->target_type != TARGET_TYPE_QCA8074) && if ((tgt_info->target_type != TARGET_TYPE_QCA8074) &&
(tgt_info->target_type != TARGET_TYPE_QCA8074V2)) { (tgt_info->target_type != TARGET_TYPE_QCA8074V2) &&
(tgt_info->target_type != TARGET_TYPE_QCA6018)) {
HIF_INFO("Error: Disabling target\n"); HIF_INFO("Error: Disabling target\n");
hif_ahb_disable_bus(ol_sc); hif_ahb_disable_bus(ol_sc);
} }
@@ -668,9 +671,10 @@ void hif_ahb_irq_enable(struct hif_softc *scn, int ce_id)
regval |= HOST_IE_REG2_CE_BIT(ce_id); regval |= HOST_IE_REG2_CE_BIT(ce_id);
hif_write32_mb(scn, scn->mem + reg_offset, regval); hif_write32_mb(scn, scn->mem + reg_offset, regval);
if (tgt_info->target_type == TARGET_TYPE_QCA8074 || if (tgt_info->target_type == TARGET_TYPE_QCA8074 ||
tgt_info->target_type == TARGET_TYPE_QCA8074V2) { tgt_info->target_type == TARGET_TYPE_QCA8074V2 ||
tgt_info->target_type == TARGET_TYPE_QCA6018) {
/* Enable destination ring interrupts for /* Enable destination ring interrupts for
* 8074 and 8074V2 * 8074, 8074V2 and 6018
*/ */
regval = hif_read32_mb(scn, scn->mem + regval = hif_read32_mb(scn, scn->mem +
HOST_IE_ADDRESS_3); HOST_IE_ADDRESS_3);
@@ -717,9 +721,10 @@ void hif_ahb_irq_disable(struct hif_softc *scn, int ce_id)
regval &= ~HOST_IE_REG2_CE_BIT(ce_id); regval &= ~HOST_IE_REG2_CE_BIT(ce_id);
hif_write32_mb(scn, scn->mem + reg_offset, regval); hif_write32_mb(scn, scn->mem + reg_offset, regval);
if (tgt_info->target_type == TARGET_TYPE_QCA8074 || if (tgt_info->target_type == TARGET_TYPE_QCA8074 ||
tgt_info->target_type == TARGET_TYPE_QCA8074V2) { tgt_info->target_type == TARGET_TYPE_QCA8074V2 ||
tgt_info->target_type == TARGET_TYPE_QCA6018) {
/* Disable destination ring interrupts for /* Disable destination ring interrupts for
* 8074 and 8074V2 * 8074, 8074V2 and 6018
*/ */
regval = hif_read32_mb(scn, scn->mem + regval = hif_read32_mb(scn, scn->mem +
HOST_IE_ADDRESS_3); HOST_IE_ADDRESS_3);

3
spectral/dispatcher/src/wlan_spectral_tgt_api.c
View File

@@ -287,7 +287,8 @@ tgt_spectral_register_to_dbr(struct wlan_objmgr_pdev *pdev)
dbr_tx_ops = &psoc->soc_cb.tx_ops.dbr_tx_ops; dbr_tx_ops = &psoc->soc_cb.tx_ops.dbr_tx_ops;
if ((tgt_spectral_get_target_type(psoc) == TARGET_TYPE_QCA8074) || if ((tgt_spectral_get_target_type(psoc) == TARGET_TYPE_QCA8074) ||
(tgt_spectral_get_target_type(psoc) == TARGET_TYPE_QCA8074V2)) (tgt_spectral_get_target_type(psoc) == TARGET_TYPE_QCA8074V2) ||
(tgt_spectral_get_target_type(psoc) == TARGET_TYPE_QCA6018))
if (dbr_tx_ops->direct_buf_rx_module_register) if (dbr_tx_ops->direct_buf_rx_module_register)
return dbr_tx_ops->direct_buf_rx_module_register return dbr_tx_ops->direct_buf_rx_module_register
(pdev, 0, (pdev, 0,

1
target_if/init_deinit/src/service_ready_util.c
View File

@@ -417,6 +417,7 @@ QDF_STATUS init_deinit_validate_160_80p80_fw_caps(
if ((tgt_hdl->info.target_type == TARGET_TYPE_QCA8074) || if ((tgt_hdl->info.target_type == TARGET_TYPE_QCA8074) ||
(tgt_hdl->info.target_type == TARGET_TYPE_QCA8074V2) || (tgt_hdl->info.target_type == TARGET_TYPE_QCA8074V2) ||
(tgt_hdl->info.target_type == TARGET_TYPE_QCA6018) ||
(tgt_hdl->info.target_type == TARGET_TYPE_QCA6290)) { (tgt_hdl->info.target_type == TARGET_TYPE_QCA6290)) {
/** /**
* Return true for now. This is not available in * Return true for now. This is not available in

7
target_if/spectral/target_if_spectral.c
View File

@@ -2006,7 +2006,8 @@ target_if_pdev_spectral_init(struct wlan_objmgr_pdev *pdev)
target_if_spectral_clear_stats(spectral); target_if_spectral_clear_stats(spectral);
#ifdef CONFIG_WIN #ifdef CONFIG_WIN
if (target_type == TARGET_TYPE_QCA8074V2) if (target_type == TARGET_TYPE_QCA8074V2 ||
target_type == TARGET_TYPE_QCA6018)
spectral->fftbin_size_war = spectral->fftbin_size_war =
SPECTRAL_FFTBIN_SIZE_WAR_2BYTE_TO_1BYTE; SPECTRAL_FFTBIN_SIZE_WAR_2BYTE_TO_1BYTE;
else if (target_type == TARGET_TYPE_QCA8074) else if (target_type == TARGET_TYPE_QCA8074)
@@ -2016,7 +2017,8 @@ target_if_pdev_spectral_init(struct wlan_objmgr_pdev *pdev)
spectral->fftbin_size_war = SPECTRAL_FFTBIN_SIZE_NO_WAR; spectral->fftbin_size_war = SPECTRAL_FFTBIN_SIZE_NO_WAR;
if (target_type == TARGET_TYPE_QCA8074 || if (target_type == TARGET_TYPE_QCA8074 ||
target_type == TARGET_TYPE_QCA8074V2) { target_type == TARGET_TYPE_QCA8074V2 ||
target_type == TARGET_TYPE_QCA6018) {
spectral->inband_fftbin_size_adj = 1; spectral->inband_fftbin_size_adj = 1;
spectral->null_fftbin_adj = 1; spectral->null_fftbin_adj = 1;
} else { } else {
@@ -2026,6 +2028,7 @@ target_if_pdev_spectral_init(struct wlan_objmgr_pdev *pdev)
if ((target_type == TARGET_TYPE_QCA8074) || if ((target_type == TARGET_TYPE_QCA8074) ||
(target_type == TARGET_TYPE_QCA8074V2) || (target_type == TARGET_TYPE_QCA8074V2) ||
(target_type == TARGET_TYPE_QCA6018) ||
(target_type == TARGET_TYPE_QCA6290)) { (target_type == TARGET_TYPE_QCA6290)) {
spectral->spectral_gen = SPECTRAL_GEN3; spectral->spectral_gen = SPECTRAL_GEN3;
spectral->hdr_sig_exp = SPECTRAL_PHYERR_SIGNATURE_GEN3; spectral->hdr_sig_exp = SPECTRAL_PHYERR_SIGNATURE_GEN3;