qcacld-3.0: Add PLD ATHDIAG read/write support

Add PLD wrapper for platform athdiag read/write.
HIF will call these two functions when a athdiag read/write
triggered from user space.

CRs-Fixed: 1061837
Change-Id: Ie34c634beaf1cd91e24eca1b7ce5b6444a60393e

core/pld/inc/pld_common.h

@@ -390,4 +390,9 @@ void pld_lock_pm_sem(struct device *dev);
 void pld_release_pm_sem(struct device *dev);
 int pld_power_on(struct device *dev);
 int pld_power_off(struct device *dev);
+int pld_athdiag_read(struct device *dev, uint32_t offset, uint32_t memtype,
+		     uint32_t datalen, uint8_t *output);
+int pld_athdiag_write(struct device *dev, uint32_t offset, uint32_t memtype,
+		      uint32_t datalen, uint8_t *input);
+
 #endif

core/pld/src/pld_common.c

@@ -1422,3 +1422,71 @@ int pld_power_off(struct device *dev)
 
 	return ret;
 }
+
+/**
+ * pld_athdiag_read() - Read data from WLAN FW
+ * @dev: device
+ * @offset: address offset
+ * @memtype: memory type
+ * @datalen: data length
+ * @output: output buffer
+ *
+ * Return: 0 for success
+ *         Non zero failure code for errors
+ */
+int pld_athdiag_read(struct device *dev, uint32_t offset,
+		     uint32_t memtype, uint32_t datalen,
+		     uint8_t *output)
+{
+	int ret = 0;
+
+	switch (pld_get_bus_type(dev)) {
+	case PLD_BUS_TYPE_SNOC:
+		ret = pld_snoc_athdiag_read(dev, offset, memtype,
+					    datalen, output);
+		break;
+	case PLD_BUS_TYPE_PCIE:
+	case PLD_BUS_TYPE_SDIO:
+	case PLD_BUS_TYPE_USB:
+		break;
+	default:
+		ret = -EINVAL;
+		break;
+	}
+
+	return ret;
+}
+
+/**
+ * pld_athdiag_write() - Write data to WLAN FW
+ * @dev: device
+ * @offset: address offset
+ * @memtype: memory type
+ * @datalen: data length
+ * @input: input buffer
+ *
+ * Return: 0 for success
+ *         Non zero failure code for errors
+ */
+int pld_athdiag_write(struct device *dev, uint32_t offset,
+		      uint32_t memtype, uint32_t datalen,
+		      uint8_t *input)
+{
+	int ret = 0;
+
+	switch (pld_get_bus_type(dev)) {
+	case PLD_BUS_TYPE_SNOC:
+		ret = pld_snoc_athdiag_write(dev, offset, memtype,
+					     datalen, input);
+		break;
+	case PLD_BUS_TYPE_PCIE:
+	case PLD_BUS_TYPE_SDIO:
+	case PLD_BUS_TYPE_USB:
+		break;
+	default:
+		ret = -EINVAL;
+		break;
+	}
+
+	return ret;
+}

core/pld/src/pld_snoc.h

@@ -28,6 +28,9 @@
 #ifndef __PLD_SNOC_H__
 #define __PLD_SNOC_H__
 
+#ifdef CONFIG_PLD_SNOC_ICNSS
+#include <soc/qcom/icnss.h>
+#endif
 #include "pld_internal.h"
 
 #ifndef CONFIG_PLD_SNOC_ICNSS
@@ -106,6 +109,18 @@ static inline int pld_snoc_wlan_get_dfs_nol(void *info, u16 info_len)
 {
 	return 0;
 }
+static inline int pld_snoc_athdiag_read(struct device *dev, uint32_t offset,
+					uint32_t memtype, uint32_t datalen,
+					uint8_t *output)
+{
+	return 0;
+}
+static inline int pld_snoc_athdiag_write(struct device *dev, uint32_t offset,
+					 uint32_t memtype, uint32_t datalen,
+					 uint8_t *input)
+{
+	return 0;
+}
 #else
 int pld_snoc_register_driver(void);
 void pld_snoc_unregister_driver(void);
@@ -128,5 +143,17 @@ int pld_snoc_get_wlan_unsafe_channel(u16 *unsafe_ch_list, u16 *ch_count,
 				     u16 buf_len);
 int pld_snoc_wlan_set_dfs_nol(const void *info, u16 info_len);
 int pld_snoc_wlan_get_dfs_nol(void *info, u16 info_len);
+static inline int pld_snoc_athdiag_read(struct device *dev, uint32_t offset,
+					uint32_t memtype, uint32_t datalen,
+					uint8_t *output)
+{
+	return icnss_athdiag_read(dev, offset, memtype, datalen, output);
+}
+static inline int pld_snoc_athdiag_write(struct device *dev, uint32_t offset,
+					 uint32_t memtype, uint32_t datalen,
+					 uint8_t *input)
+{
+	return icnss_athdiag_write(dev, offset, memtype, datalen, input);
+}
 #endif
 #endif