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qcacmn: Add hal_rx_is_unicast API

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Implement hal_rx_is_unicase API based
on the chipset as the macro to retrieve
is_unicast bit value is chipset dependent.

Change-Id: I38807f478c295309adf2a07ce9010b1bc04c734e
CRs-Fixed: 2522133
This commit is contained in:
Venkata Sharath Chandra Manchala
2019-09-21 15:53:03 -07:00
committed by nshrivas
parent 68d6f0d585
commit 5ddc518b2e
9 changed files with 151 additions and 15 deletions
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2
dp/wifi3.0/dp_rx_err.c
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@@ -814,7 +814,7 @@ dp_rx_null_q_desc_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
vdev->wds_enabled)) vdev->wds_enabled))
dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, peer, nbuf); dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, peer, nbuf);
if (hal_rx_is_unicast(rx_tlv_hdr)) { if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr); tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned) if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned)
dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX); dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);

1
hal/wifi3.0/hal_internal.h
View File

@@ -405,6 +405,7 @@ struct hal_hw_txrx_ops {
QDF_STATUS QDF_STATUS
(*hal_rx_mpdu_get_addr4)(uint8_t *buf, uint8_t *mac_addr); (*hal_rx_mpdu_get_addr4)(uint8_t *buf, uint8_t *mac_addr);
uint8_t (*hal_rx_get_mpdu_sequence_control_valid)(uint8_t *buf); uint8_t (*hal_rx_get_mpdu_sequence_control_valid)(uint8_t *buf);
bool (*hal_rx_is_unicast)(uint8_t *buf);
}; };
/** /**

17
hal/wifi3.0/hal_rx.h
View File

@@ -1216,26 +1216,17 @@ enum hal_rx_mpdu_info_sw_frame_group_id_type {
/** /**
* hal_rx_is_unicast: check packet is unicast frame or not. * hal_rx_is_unicast: check packet is unicast frame or not.
* * @hal_soc_hdl: hal_soc handle
* @buf: pointer to rx pkt TLV. * @buf: pointer to rx pkt TLV.
* *
* Return: true on unicast. * Return: true on unicast.
*/ */
static inline bool static inline bool
hal_rx_is_unicast(uint8_t *buf) hal_rx_is_unicast(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
{ {
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
uint32_t grp_id;
uint8_t *rx_mpdu_info = (uint8_t *)&mpdu_start->rx_mpdu_info_details;
grp_id = (_HAL_MS((*_OFFSET_TO_WORD_PTR((rx_mpdu_info), return hal_soc->ops->hal_rx_is_unicast(buf);
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_OFFSET)),
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_MASK,
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_LSB));
return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false;
} }
/** /**

24
hal/wifi3.0/qca6290/hal_6290.c
View File

@@ -544,6 +544,29 @@ static uint8_t hal_rx_get_mpdu_sequence_control_valid_6290(uint8_t *buf)
return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info);
} }
/**
* hal_rx_is_unicast_6290: check packet is unicast frame or not.
*
* @ buf: pointer to rx pkt TLV.
*
* Return: true on unicast.
*/
static bool hal_rx_is_unicast_6290(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
uint32_t grp_id;
uint8_t *rx_mpdu_info = (uint8_t *)&mpdu_start->rx_mpdu_info_details;
grp_id = (_HAL_MS((*_OFFSET_TO_WORD_PTR((rx_mpdu_info),
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_OFFSET)),
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_MASK,
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_LSB));
return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false;
}
struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
hal_srng_dst_hw_init_generic, hal_srng_dst_hw_init_generic,
@@ -606,6 +629,7 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
hal_rx_mpdu_get_addr3_6290, hal_rx_mpdu_get_addr3_6290,
hal_rx_mpdu_get_addr4_6290, hal_rx_mpdu_get_addr4_6290,
hal_rx_get_mpdu_sequence_control_valid_6290, hal_rx_get_mpdu_sequence_control_valid_6290,
hal_rx_is_unicast_6290,
}; };
struct hal_hw_srng_config hw_srng_table_6290[] = { struct hal_hw_srng_config hw_srng_table_6290[] = {

24
hal/wifi3.0/qca6390/hal_6390.c
View File

@@ -542,6 +542,29 @@ static uint8_t hal_rx_get_mpdu_sequence_control_valid_6390(uint8_t *buf)
return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info);
} }
/**
* hal_rx_is_unicast_6390: check packet is unicast frame or not.
*
* @ buf: pointer to rx pkt TLV.
*
* Return: true on unicast.
*/
static bool hal_rx_is_unicast_6390(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
uint32_t grp_id;
uint8_t *rx_mpdu_info = (uint8_t *)&mpdu_start->rx_mpdu_info_details;
grp_id = (_HAL_MS((*_OFFSET_TO_WORD_PTR((rx_mpdu_info),
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_OFFSET)),
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_MASK,
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_LSB));
return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false;
}
struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
hal_srng_dst_hw_init_generic, hal_srng_dst_hw_init_generic,
@@ -604,6 +627,7 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
hal_rx_mpdu_get_addr3_6390, hal_rx_mpdu_get_addr3_6390,
hal_rx_mpdu_get_addr4_6390, hal_rx_mpdu_get_addr4_6390,
hal_rx_get_mpdu_sequence_control_valid_6390, hal_rx_get_mpdu_sequence_control_valid_6390,
hal_rx_is_unicast_6390,
}; };
struct hal_hw_srng_config hw_srng_table_6390[] = { struct hal_hw_srng_config hw_srng_table_6390[] = {

24
hal/wifi3.0/qca6490/hal_6490.c
View File

@@ -448,6 +448,29 @@ static uint8_t hal_rx_get_mpdu_sequence_control_valid_6490(uint8_t *buf)
return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info);
} }
/**
* hal_rx_is_unicast_6490: check packet is unicast frame or not.
*
* @ buf: pointer to rx pkt TLV.
*
* Return: true on unicast.
*/
static bool hal_rx_is_unicast_6490(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
uint32_t grp_id;
uint8_t *rx_mpdu_info = (uint8_t *)&mpdu_start->rx_mpdu_info_details;
grp_id = (_HAL_MS((*_OFFSET_TO_WORD_PTR((rx_mpdu_info),
RX_MPDU_INFO_9_SW_FRAME_GROUP_ID_OFFSET)),
RX_MPDU_INFO_9_SW_FRAME_GROUP_ID_MASK,
RX_MPDU_INFO_9_SW_FRAME_GROUP_ID_LSB));
return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false;
}
struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
/* rx */ /* rx */
hal_rx_get_rx_fragment_number_6490, hal_rx_get_rx_fragment_number_6490,
@@ -470,4 +493,5 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
hal_rx_mpdu_get_addr3_6490, hal_rx_mpdu_get_addr3_6490,
hal_rx_mpdu_get_addr4_6490, hal_rx_mpdu_get_addr4_6490,
hal_rx_get_mpdu_sequence_control_valid_6490, hal_rx_get_mpdu_sequence_control_valid_6490,
hal_rx_is_unicast_6490,
}; };

24
hal/wifi3.0/qca8074v1/hal_8074v1.c
View File

@@ -539,6 +539,29 @@ static uint8_t hal_rx_get_mpdu_sequence_control_valid_8074v1(uint8_t *buf)
return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info);
} }
/**
* hal_rx_is_unicast_8074v1: check packet is unicast frame or not.
*
* @ buf: pointer to rx pkt TLV.
*
* Return: true on unicast.
*/
static bool hal_rx_is_unicast_8074v1(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
uint32_t grp_id;
uint8_t *rx_mpdu_info = (uint8_t *)&mpdu_start->rx_mpdu_info_details;
grp_id = (_HAL_MS((*_OFFSET_TO_WORD_PTR((rx_mpdu_info),
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_OFFSET)),
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_MASK,
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_LSB));
return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false;
}
struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
@@ -602,6 +625,7 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
hal_rx_mpdu_get_addr3_8074v1, hal_rx_mpdu_get_addr3_8074v1,
hal_rx_mpdu_get_addr4_8074v1, hal_rx_mpdu_get_addr4_8074v1,
hal_rx_get_mpdu_sequence_control_valid_8074v1, hal_rx_get_mpdu_sequence_control_valid_8074v1,
hal_rx_is_unicast_8074v1,
}; };
struct hal_hw_srng_config hw_srng_table_8074[] = { struct hal_hw_srng_config hw_srng_table_8074[] = {

24
hal/wifi3.0/qca8074v2/hal_8074v2.c
View File

@@ -536,6 +536,29 @@ static uint8_t hal_rx_get_mpdu_sequence_control_valid_8074v2(uint8_t *buf)
return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info);
} }
/**
* hal_rx_is_unicast_8074v2: check packet is unicast frame or not.
*
* @ buf: pointer to rx pkt TLV.
*
* Return: true on unicast.
*/
static bool hal_rx_is_unicast_8074v2(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
uint32_t grp_id;
uint8_t *rx_mpdu_info = (uint8_t *)&mpdu_start->rx_mpdu_info_details;
grp_id = (_HAL_MS((*_OFFSET_TO_WORD_PTR((rx_mpdu_info),
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_OFFSET)),
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_MASK,
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_LSB));
return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false;
}
struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
@@ -599,6 +622,7 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
hal_rx_mpdu_get_addr3_8074v2, hal_rx_mpdu_get_addr3_8074v2,
hal_rx_mpdu_get_addr4_8074v2, hal_rx_mpdu_get_addr4_8074v2,
hal_rx_get_mpdu_sequence_control_valid_8074v2, hal_rx_get_mpdu_sequence_control_valid_8074v2,
hal_rx_is_unicast_8074v2,
}; };
struct hal_hw_srng_config hw_srng_table_8074v2[] = { struct hal_hw_srng_config hw_srng_table_8074v2[] = {

24
hal/wifi3.0/qcn9000/hal_9000.c
View File

@@ -546,6 +546,29 @@ static uint8_t hal_rx_get_mpdu_sequence_control_valid_9000(uint8_t *buf)
return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info);
} }
/**
* hal_rx_is_unicast_9000: check packet is unicast frame or not.
*
* @ buf: pointer to rx pkt TLV.
*
* Return: true on unicast.
*/
static bool hal_rx_is_unicast_9000(uint8_t *buf)
{
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
uint32_t grp_id;
uint8_t *rx_mpdu_info = (uint8_t *)&mpdu_start->rx_mpdu_info_details;
grp_id = (_HAL_MS((*_OFFSET_TO_WORD_PTR((rx_mpdu_info),
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_OFFSET)),
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_MASK,
RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_LSB));
return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false;
}
struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
@@ -609,6 +632,7 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
hal_rx_mpdu_get_addr3_9000, hal_rx_mpdu_get_addr3_9000,
hal_rx_mpdu_get_addr4_9000, hal_rx_mpdu_get_addr4_9000,
hal_rx_get_mpdu_sequence_control_valid_9000, hal_rx_get_mpdu_sequence_control_valid_9000,
hal_rx_is_unicast_9000,
}; };
struct hal_hw_srng_config hw_srng_table_9000[] = { struct hal_hw_srng_config hw_srng_table_9000[] = {