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soc: swr-mstr: Reduce swr register write sleep timings

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Reduce swr bulk write and swr command fifo write sleeps
to reach coldstart latency numbers.

Change-Id: I52f2868a488e167b0a0f617b6af3e79cbf6f7eea
Signed-off-by: Karthikeyan Mani <kmani@codeaurora.org>
This commit is contained in:
Karthikeyan Mani
2019-08-15 16:58:08 -07:00
committed by Gerrit - the friendly Code Review server
parent 1fc4ce6795
commit 5d52dd8613
1 changed files with 6 additions and 2 deletions
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8
soc/swr-mstr-ctrl.c
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@@ -397,7 +397,11 @@ static int swr_master_bulk_write(struct swr_mstr_ctrl *swrm, u32 *reg_addr,
mutex_lock(&swrm->iolock);
for (i = 0; i < length; i++) {
/* wait for FIFO WR command to complete to avoid overflow */
usleep_range(100, 105);
/*
* Reduce sleep from 100us to 10us to meet KPIs
* This still meets the hardware spec
*/
usleep_range(10, 12);
swr_master_write(swrm, reg_addr[i], val[i]);
}
mutex_unlock(&swrm->iolock);
@@ -559,7 +563,7 @@ static int swrm_cmd_fifo_wr_cmd(struct swr_mstr_ctrl *swrm, u8 cmd_data,
* skip delay if write is handled in platform driver.
*/
if(!swrm->write)
usleep_range(250, 255);
usleep_range(150, 155);
if (cmd_id == 0xF) {
/*
* sleep for 10ms for MSM soundwire variant to allow broadcast