msm: eva: Checks clocks before accesing NoC

Checks AHB, MVS1, MVS1C, SLEEP, XO clocks, ensure they are
turned on before initial accessing NoC registers.

Change-Id: I429e2e410ac29aab893b490dbbd985914843ed9b
Signed-off-by: George Shen <[email protected]>

msm/eva/cvp_hfi.c

@@ -767,7 +767,39 @@ static int __read_register(struct iris_hfi_device *device, u32 reg)
 	return rc;
 }
 
-static void __set_registers(struct iris_hfi_device *device)
+static bool __noc_access_ok(struct iris_hfi_device *device)
+{
+	int ret;
+
+	ret = __read_register(device, CVP_CC_MVS1C_CBCR);
+	if (ret & 0x80000000) {
+		dprintk(CVP_ERR, "%s MVS1C off\n", __func__);
+		return false;
+	}
+	ret = __read_register(device, CVP_CC_MVS1_CBCR);
+	if (ret & 0x80000000) {
+		dprintk(CVP_ERR, "%s MVS1 off\n", __func__);
+		return false;
+	}
+	ret = __read_register(device, CVP_CC_AHB_CBCR);
+	if (ret & 0x80000000) {
+		dprintk(CVP_ERR, "%s AHB off\n", __func__);
+		return false;
+	}
+	ret = __read_register(device, CVP_CC_XO_CBCR);
+	if (ret & 0x80000000) {
+		dprintk(CVP_ERR, "%s XO off\n", __func__);
+		return false;
+	}
+	ret = __read_register(device, CVP_CC_SLEEP_CBCR);
+	if (ret & 0x80000000) {
+		dprintk(CVP_ERR, "%s SLEEP off\n", __func__);
+		return false;
+	}
+	return true;
+}
+
+static int __set_registers(struct iris_hfi_device *device)
 {
 	struct msm_cvp_core *core;
 	struct msm_cvp_platform_data *pdata;
@@ -777,7 +809,7 @@ static void __set_registers(struct iris_hfi_device *device)
 	if (!device->res) {
 		dprintk(CVP_ERR,
 			"device resources null, cannot set registers\n");
-		return;
+		return -EINVAL ;
 	}
 
 	core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
@@ -792,6 +824,9 @@ static void __set_registers(struct iris_hfi_device *device)
 					reg_set->reg_tbl[i].value);
 	}
 
+	if (!__noc_access_ok(device))
+		return -EINVAL;
+
 	__write_register(device, CVP_CPU_CS_AXI4_QOS,
 				pdata->noc_qos->axi_qos);
 	__write_register(device, CVP_NOC_RGE_PRIORITYLUT_LOW,
@@ -814,6 +849,7 @@ static void __set_registers(struct iris_hfi_device *device)
 				pdata->noc_qos->dangerlut_low);
 	__write_register(device, CVP_NOC_CDM_SAFELUT_LOW,
 				pdata->noc_qos->safelut_low);
+	return 0;
 }
 
 /*
@@ -4218,7 +4254,9 @@ static int __iris_power_on(struct iris_hfi_device *device)
 	 * Re-program all of the registers that get reset as a result of
 	 * regulator_disable() and _enable()
 	 */
-	__set_registers(device);
+	rc = __set_registers(device);
+	if (rc)
+		goto fail_enable_core;
 
 	dprintk(CVP_CORE, "Done with register set\n");
 	call_iris_op(device, interrupt_init, device);

msm/eva/cvp_hfi_io.h

@@ -272,11 +272,14 @@
 #define CVP_AON_WRAPPER_CVP_NOC_CORE_SW_RESET	(CVP_AON_BASE_OFFS + 0x1C)
 #define CVP_AON_WRAPPER_SPARE		(CVP_AON_BASE_OFFS + 0x28)
 
-#define CVP_CC_BASE_OFFS			0x000F8000
+#define CVP_CC_BASE_OFFS			0xF8000
 #define CVP_CC_MVS1C_GDSCR			(CVP_CC_BASE_OFFS + 0x78)
 #define CVP_CC_MVS1C_CBCR			(CVP_CC_BASE_OFFS + 0x90)
 #define CVP_CC_MVS1_GDSCR			(CVP_CC_BASE_OFFS + 0xCC)
 #define CVP_CC_MVS1_CBCR			(CVP_CC_BASE_OFFS + 0xE0)
+#define CVP_CC_AHB_CBCR			(CVP_CC_BASE_OFFS + 0xF4)
+#define CVP_CC_XO_CBCR				(CVP_CC_BASE_OFFS + 0x124)
+#define CVP_CC_SLEEP_CBCR			(CVP_CC_BASE_OFFS + 0x150)
 
 #define CVP_GCC_VIDEO_AXI1_CBCR		(0x22024)