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msm: camera: cre: update image address correctly for 36bit iova

This change upadates the image address programming for 36bit
iova, both on read and write engine.

CRs-Fixed: 2893978
Change-Id: I37f556191b840ba794e7373d9aea5831dc90ab1b
Signed-off-by: Vikram Sharma <[email protected]>
Vikram Sharma 4 жил өмнө
parent
commit
5ca9544430

+ 14 - 3
drivers/cam_cre/cam_cre_hw_mgr/cre_hw/bus_rd/cre_bus_rd.c

@@ -25,6 +25,7 @@
 #include "cre_hw.h"
 #include "cre_dev_intf.h"
 #include "cre_bus_rd.h"
+#include "cam_common_util.h"
 
 static struct cre_bus_rd *bus_rd;
 
@@ -57,7 +58,7 @@ static int cam_cre_bus_rd_update(struct cam_cre_hw *cam_cre_hw_info,
 	uint32_t req_idx, temp;
 	uint32_t rm_id;
 	uint32_t rsc_type;
-	uint32_t iova_base;
+	uint32_t iova_base, iova_offset;
 	struct cam_hw_prepare_update_args *prepare_args;
 	struct cam_cre_ctx *ctx_data;
 	struct cam_cre_request *cre_request;
@@ -131,11 +132,21 @@ static int cam_cre_bus_rd_update(struct cam_cre_hw *cam_cre_hw_info,
 			(rd_reg->offset + rd_reg_client->ccif_meta_data),
 			temp);
 
-		/* Image Address */
-		iova_base = io_buf->p_info[k].iova_addr;
+		/*
+		 * As CRE have 36 Bit addressing support Image Address
+		 * register will have 28 bit MSB of 36 bit iova.
+		 * and addr_config will have 8 bit byte offset.
+		 */
+		iova_base = CAM_36BIT_INTF_GET_IOVA_BASE(
+				io_buf->p_info[k].iova_addr);
 		update_cre_reg_set(cre_reg_buf,
 			rd_reg->offset + rd_reg_client->img_addr,
 			iova_base);
+		iova_offset = CAM_36BIT_INTF_GET_IOVA_OFFSET(
+				io_buf->p_info[k].iova_addr);
+		update_cre_reg_set(cre_reg_buf,
+			rd_reg->offset + rd_reg_client->addr_cfg,
+			iova_offset);
 
 		/* Buffer size */
 		update_cre_reg_set(cre_reg_buf,

+ 12 - 3
drivers/cam_cre/cam_cre_hw_mgr/cre_hw/bus_wr/cre_bus_wr.c

@@ -25,6 +25,7 @@
 #include "cre_hw.h"
 #include "cre_dev_intf.h"
 #include "cre_bus_wr.h"
+#include "cam_common_util.h"
 
 static struct cre_bus_wr *wr_info;
 #define update_cre_reg_set(cre_reg_buf, off, val) \
@@ -89,7 +90,7 @@ static int cam_cre_bus_wr_update(struct cam_cre_hw *cam_cre_hw_info,
 	uint32_t req_idx;
 	uint32_t temp = 0;
 	uint32_t wm_port_id;
-	uint32_t iova_base;
+	uint32_t iova_base, iova_offset;
 	struct cam_hw_prepare_update_args *prepare_args;
 	struct cam_cre_ctx *ctx_data;
 	struct cam_cre_request *cre_request;
@@ -159,11 +160,19 @@ static int cam_cre_bus_wr_update(struct cam_cre_hw *cam_cre_hw_info,
 			wr_reg->offset + wr_reg_client->client_cfg,
 			temp);
 
-		/* Image Address */
-		iova_base = io_buf->p_info[k].iova_addr;
+		/*
+		 * As CRE have 36 Bit addressing support Image Address
+		 * register will have 28 bit MSB of 36 bit iova.
+		 * and addr_config will have 8 bit byte offset.
+		 */
+		iova_base = CAM_36BIT_INTF_GET_IOVA_BASE(io_buf->p_info[k].iova_addr);
 		update_cre_reg_set(cre_reg_buf,
 			wr_reg->offset + wr_reg_client->img_addr,
 			iova_base);
+		iova_offset = CAM_36BIT_INTF_GET_IOVA_OFFSET(io_buf->p_info[k].iova_addr);
+		update_cre_reg_set(cre_reg_buf,
+			wr_reg->offset + wr_reg_client->addr_cfg,
+			iova_offset);
 
 		/* Buffer size */
 		temp = 0;

+ 2 - 0
drivers/cam_utils/cam_common_util.h

@@ -10,6 +10,8 @@
 #include <linux/kernel.h>
 
 #define CAM_BITS_MASK_SHIFT(x, mask, shift) (((x) & (mask)) >> shift)
+#define CAM_36BIT_INTF_GET_IOVA_BASE(iova) ((iova) >> 8)
+#define CAM_36BIT_INTF_GET_IOVA_OFFSET(iova) ((iova) & 0xff)
 
 #define PTR_TO_U64(ptr) ((uint64_t)(uintptr_t)ptr)
 #define U64_TO_PTR(ptr) ((void *)(uintptr_t)ptr)