ASoC: lpass-cdc: Toggle WSA fs_cnt_clr bit

During spk playback and VA concurrency,
sometimes WSA CLK goes out of sync causing
VI_TX data mute. To resolve this, everytime
after WSA MCLK enable toggle fs_cnt_clr bit.

Change-Id: Ia936f1d4843890d2ae5c02b039f502941a5427b9
Signed-off-by: Soumya Managoli <quic_c_smanag@quicinc.com>

asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c

@@ -959,6 +959,13 @@ static int lpass_cdc_wsa_macro_mclk_enable(
 			regmap_update_bits(regmap,
 				LPASS_CDC_WSA_CLK_RST_CTRL_MCLK_CONTROL,
 				0x01, 0x01);
+			/* Toggle fs_cntr_clr bit*/
+			regmap_update_bits(regmap,
+				LPASS_CDC_WSA_CLK_RST_CTRL_FS_CNT_CONTROL,
+				0x02, 0x02);
+			regmap_update_bits(regmap,
+				LPASS_CDC_WSA_CLK_RST_CTRL_FS_CNT_CONTROL,
+				0x02, 0x0);
 			regmap_update_bits(regmap,
 				LPASS_CDC_WSA_CLK_RST_CTRL_FS_CNT_CONTROL,
 				0x01, 0x01);

asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c

@@ -964,6 +964,13 @@ static int lpass_cdc_wsa2_macro_mclk_enable(
 			regmap_update_bits(regmap,
 				LPASS_CDC_WSA2_CLK_RST_CTRL_MCLK_CONTROL,
 				0x01, 0x01);
+			/* Toggle fs_cntr_clr bit*/
+			regmap_update_bits(regmap,
+				LPASS_CDC_WSA_CLK_RST_CTRL_FS_CNT_CONTROL,
+				0x02, 0x02);
+			regmap_update_bits(regmap,
+				LPASS_CDC_WSA_CLK_RST_CTRL_FS_CNT_CONTROL,
+				0x02, 0x0);
 			regmap_update_bits(regmap,
 				LPASS_CDC_WSA2_CLK_RST_CTRL_FS_CNT_CONTROL,
 				0x01, 0x01);