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qcacmn: Check Tx halt during umac reset

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1. Check Tx halt during umac reset and avoid halt if set already.
2. Perform SRNG disable only in case of umac reset

Change-Id: Id364a6460a64e83002b5c96e08031ad2a0bc8fd7
CRs-Fixed: 3459427
This commit is contained in:
syed touqeer pasha
2023-04-06 22:53:56 +05:30
committed by Madan Koyyalamudi
parent 499696eab5
commit 5b0980f461
10 changed files with 64 additions and 20 deletions
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21
hal/wifi3.0/hal_generic_api.h
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@@ -247,6 +247,8 @@ void hal_srng_src_hw_init_generic(struct hal_soc *hal,
uint32_t reg_val = 0;
uint64_t tp_addr = 0;
hal_debug("hw_init srng %d", srng->ring_id);
if (idle_check) {
reg_val = SRNG_SRC_REG_READ(srng, MISC);
if (!(reg_val & SRNG_IDLE_STATE_BIT)) {
@@ -256,13 +258,11 @@ void hal_srng_src_hw_init_generic(struct hal_soc *hal,
hal_srng_src_hw_write_cons_prefetch_timer(srng,
srng->prefetch_timer);
} else {
reg_val = SRNG_SRC_REG_READ(srng, MISC) & ~(SRNG_ENABLE_BIT);
SRNG_SRC_REG_WRITE(srng, MISC, reg_val);
}
hal_debug("hw_init srng %d", srng->ring_id);
reg_val = SRNG_SRC_REG_READ(srng, MISC) & ~(SRNG_ENABLE_BIT);
SRNG_SRC_REG_WRITE(srng, MISC, reg_val);
reg_val = 0;
if (srng->flags & HAL_SRNG_MSI_INTR) {
@@ -442,20 +442,19 @@ void hal_srng_dst_hw_init_generic(struct hal_soc *hal,
uint32_t reg_val = 0;
uint64_t hp_addr = 0;
hal_debug("hw_init srng %d", srng->ring_id);
if (idle_check) {
reg_val = SRNG_DST_REG_READ(srng, MISC);
if (!(reg_val & SRNG_IDLE_STATE_BIT)) {
hal_err("ring_id %d not in idle state", srng->ring_id);
qdf_assert_always(0);
}
} else {
reg_val = SRNG_DST_REG_READ(srng, MISC) & ~(SRNG_ENABLE_BIT);
SRNG_DST_REG_WRITE(srng, MISC, reg_val);
}
hal_debug("hw_init srng %d", srng->ring_id);
reg_val = SRNG_DST_REG_READ(srng, MISC) & ~(SRNG_ENABLE_BIT);
SRNG_DST_REG_WRITE(srng, MISC, reg_val);
reg_val = 0;
if (srng->flags & HAL_SRNG_MSI_INTR) {