disp: msm: dsi: Reset DMA trigger mux when initializing DSI_TRIG_CTRL

When broadcast command is sent with command DMA window scheduling enabled,
DSI_TRIG_CTRL.COMMAND_MODE_DMA_TRG_MUX does not get reset after command
transfer. Due to this next unicast command on slave fails.
This change resets DMA trigger mux during DSI_TRIG_CTRL initialization.

Change-Id: I74503d82ab1cb6ca4d61a9d14f2b3cd2c3936ea7
Signed-off-by: Kashish Jain <[email protected]>

msm/dsi/dsi_ctrl_hw_2_2.c

@@ -253,7 +253,8 @@ void dsi_ctrl_hw_22_reset_trigger_controls(struct dsi_ctrl_hw *ctrl,
 		0x0, 0x2, 0x1, 0x4, 0x5, 0x6 };
 
 	reg = DSI_R32(ctrl, DSI_TRIG_CTRL);
-	reg &= ~(0xF);
+	reg &= ~BIT(16); /* Reset DMA_TRG_MUX */
+	reg &= ~(0xF); /* Reset DMA_TRIGGER_SEL */
 	reg |= (trigger_map[cfg->dma_cmd_trigger] & 0xF);
 	DSI_W32(ctrl, DSI_TRIG_CTRL, reg);
 

msm/dsi/dsi_ctrl_hw_cmn.c

@@ -1925,7 +1925,8 @@ void dsi_ctrl_hw_cmn_init_cmddma_trig_ctrl(struct dsi_ctrl_hw *ctrl,
 
 	/* Initialize the default trigger used for Command Mode DMA path. */
 	reg = DSI_R32(ctrl, DSI_TRIG_CTRL);
-	reg &= ~(0xF);
+	reg &= ~BIT(16); /* Reset DMA_TRG_MUX */
+	reg &= ~(0xF); /* Reset DMA_TRIGGER_SEL */
 	reg |= (trigger_map[cfg->dma_cmd_trigger] & 0xF);
 	DSI_W32(ctrl, DSI_TRIG_CTRL, reg);
 }