qcacmn: Add HAL APIs for Lithium targets
Add hal soc API handlers for existing Lithium targets. Change-Id: I2ca25c94702759eb8329eb24048c9f5732caa3cc CRs-Fixed: 2891049
This commit is contained in:
Rakesh Pillai
committed by
Manjunathappa Prakash
Manjunathappa Prakash
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acd7abc01b
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59ea466ca4
@@ -15,7 +15,7 @@
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "hal_hw_headers.h"
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#include "hal_li_hw_headers.h"
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#include "hal_internal.h"
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#include "hal_api.h"
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#include "target_type.h"
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@@ -105,7 +105,9 @@
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#include "hal_8074v1_tx.h"
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#include "hal_8074v1_rx.h"
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#include <hal_generic_api.h>
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#include <hal_wbm.h>
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#include "hal_li_rx.h"
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#include "hal_li_api.h"
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#include "hal_li_generic_api.h"
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/**
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* hal_get_window_address_8074(): Function to get hp/tp address
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@@ -625,19 +627,26 @@ static uint32_t hal_rx_hw_desc_get_ppduid_get_8074v1(void *rx_tlv_hdr,
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/**
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* hal_reo_status_get_header_8074v1 - Process reo desc info
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* @d - Pointer to reo descriptior
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* @ring_desc: REO status ring descriptor
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* @b - tlv type info
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* @h1 - Pointer to hal_reo_status_header where info to be stored
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*
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* Return - none.
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*
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*/
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static void hal_reo_status_get_header_8074v1(uint32_t *d, int b, void *h1)
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static void hal_reo_status_get_header_8074v1(hal_ring_desc_t ring_desc, int b,
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void *h1)
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{
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uint32_t *d = (uint32_t *)ring_desc;
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uint32_t val1 = 0;
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struct hal_reo_status_header *h =
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(struct hal_reo_status_header *)h1;
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/* Offsets of descriptor fields defined in HW headers start
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* from the field after TLV header
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*/
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d += HAL_GET_NUM_DWORDS(sizeof(struct tlv_32_hdr));
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switch (b) {
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case HAL_REO_QUEUE_STATS_STATUS_TLV:
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val1 = d[HAL_OFFSET_DW(REO_GET_QUEUE_STATS_STATUS_0,
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@@ -1219,8 +1228,7 @@ static void hal_hw_txrx_ops_attach_qca8074(struct hal_soc *hal_soc)
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hal_soc->ops->hal_srng_dst_hw_init = hal_srng_dst_hw_init_generic;
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hal_soc->ops->hal_srng_src_hw_init = hal_srng_src_hw_init_generic;
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hal_soc->ops->hal_get_hw_hptp = hal_get_hw_hptp_generic;
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hal_soc->ops->hal_reo_setup = hal_reo_setup_generic;
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hal_soc->ops->hal_setup_link_idle_list = hal_setup_link_idle_list_generic;
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hal_soc->ops->hal_reo_setup = hal_reo_setup_generic_li;
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hal_soc->ops->hal_get_window_address = hal_get_window_address_8074;
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/* tx */
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@@ -1229,56 +1237,84 @@ static void hal_hw_txrx_ops_attach_qca8074(struct hal_soc *hal_soc)
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hal_soc->ops->hal_tx_set_dscp_tid_map = hal_tx_set_dscp_tid_map_8074;
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hal_soc->ops->hal_tx_update_dscp_tid = hal_tx_update_dscp_tid_8074;
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hal_soc->ops->hal_tx_desc_set_lmac_id = hal_tx_desc_set_lmac_id_8074;
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hal_soc->ops->hal_tx_desc_set_buf_addr = hal_tx_desc_set_buf_addr_generic;
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hal_soc->ops->hal_tx_desc_set_search_type = hal_tx_desc_set_search_type_generic;
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hal_soc->ops->hal_tx_desc_set_search_index = hal_tx_desc_set_search_index_generic;
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hal_soc->ops->hal_tx_desc_set_cache_set_num = hal_tx_desc_set_cache_set_num_generic;
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hal_soc->ops->hal_tx_comp_get_status = hal_tx_comp_get_status_generic;
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hal_soc->ops->hal_tx_desc_set_buf_addr =
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hal_tx_desc_set_buf_addr_generic_li;
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hal_soc->ops->hal_tx_desc_set_search_type =
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hal_tx_desc_set_search_type_generic_li;
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hal_soc->ops->hal_tx_desc_set_search_index =
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hal_tx_desc_set_search_index_generic_li;
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hal_soc->ops->hal_tx_desc_set_cache_set_num =
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hal_tx_desc_set_cache_set_num_generic_li;
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hal_soc->ops->hal_tx_comp_get_status =
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hal_tx_comp_get_status_generic_li;
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hal_soc->ops->hal_tx_comp_get_release_reason =
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hal_tx_comp_get_release_reason_generic;
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hal_soc->ops->hal_get_wbm_internal_error = hal_get_wbm_internal_error_generic;
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hal_tx_comp_get_release_reason_generic_li;
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hal_soc->ops->hal_get_wbm_internal_error =
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hal_get_wbm_internal_error_generic_li;
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hal_soc->ops->hal_tx_desc_set_mesh_en = hal_tx_desc_set_mesh_en_8074v1;
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hal_soc->ops->hal_tx_init_cmd_credit_ring = hal_tx_init_cmd_credit_ring_8074v1;
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hal_soc->ops->hal_tx_init_cmd_credit_ring =
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hal_tx_init_cmd_credit_ring_8074v1;
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/* rx */
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hal_soc->ops->hal_rx_msdu_start_nss_get = hal_rx_msdu_start_nss_get_8074;
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hal_soc->ops->hal_rx_msdu_start_nss_get =
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hal_rx_msdu_start_nss_get_8074;
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hal_soc->ops->hal_rx_mon_hw_desc_get_mpdu_status =
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hal_rx_mon_hw_desc_get_mpdu_status_8074;
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hal_soc->ops->hal_rx_get_tlv = hal_rx_get_tlv_8074;
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hal_soc->ops->hal_rx_proc_phyrx_other_receive_info_tlv =
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hal_rx_proc_phyrx_other_receive_info_tlv_8074;
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hal_soc->ops->hal_rx_dump_msdu_start_tlv = hal_rx_dump_msdu_start_tlv_8074;
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hal_soc->ops->hal_rx_dump_msdu_start_tlv =
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hal_rx_dump_msdu_start_tlv_8074;
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hal_soc->ops->hal_rx_dump_msdu_end_tlv = hal_rx_dump_msdu_end_tlv_8074;
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hal_soc->ops->hal_get_link_desc_size = hal_get_link_desc_size_8074;
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hal_soc->ops->hal_rx_mpdu_start_tid_get = hal_rx_mpdu_start_tid_get_8074;
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hal_soc->ops->hal_rx_mpdu_start_tid_get =
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hal_rx_mpdu_start_tid_get_8074;
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hal_soc->ops->hal_rx_msdu_start_reception_type_get =
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hal_rx_msdu_start_reception_type_get_8074;
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hal_soc->ops->hal_rx_msdu_end_da_idx_get = hal_rx_msdu_end_da_idx_get_8074;
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hal_soc->ops->hal_rx_msdu_desc_info_get_ptr = hal_rx_msdu_desc_info_get_ptr_8074v1;
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hal_soc->ops->hal_rx_link_desc_msdu0_ptr = hal_rx_link_desc_msdu0_ptr_8074v1;
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hal_soc->ops->hal_reo_status_get_header = hal_reo_status_get_header_8074v1;
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hal_soc->ops->hal_rx_status_get_tlv_info = hal_rx_status_get_tlv_info_generic;
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hal_soc->ops->hal_rx_wbm_err_info_get = hal_rx_wbm_err_info_get_generic;
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hal_soc->ops->hal_rx_dump_mpdu_start_tlv = hal_rx_dump_mpdu_start_tlv_generic;
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hal_soc->ops->hal_rx_msdu_end_da_idx_get =
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hal_rx_msdu_end_da_idx_get_8074;
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hal_soc->ops->hal_rx_msdu_desc_info_get_ptr =
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hal_rx_msdu_desc_info_get_ptr_8074v1;
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hal_soc->ops->hal_rx_link_desc_msdu0_ptr =
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hal_rx_link_desc_msdu0_ptr_8074v1;
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hal_soc->ops->hal_reo_status_get_header =
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hal_reo_status_get_header_8074v1;
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hal_soc->ops->hal_rx_status_get_tlv_info =
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hal_rx_status_get_tlv_info_generic_li;
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hal_soc->ops->hal_rx_wbm_err_info_get =
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hal_rx_wbm_err_info_get_generic_li;
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hal_soc->ops->hal_rx_dump_mpdu_start_tlv =
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hal_rx_dump_mpdu_start_tlv_generic_li;
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hal_soc->ops->hal_tx_set_pcp_tid_map = hal_tx_set_pcp_tid_map_generic;
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hal_soc->ops->hal_tx_update_pcp_tid_map = hal_tx_update_pcp_tid_generic;
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hal_soc->ops->hal_tx_set_tidmap_prty = hal_tx_update_tidmap_prty_generic;
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hal_soc->ops->hal_rx_get_rx_fragment_number = hal_rx_get_rx_fragment_number_8074v1;
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hal_soc->ops->hal_rx_msdu_end_da_is_mcbc_get = hal_rx_msdu_end_da_is_mcbc_get_8074v1;
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hal_soc->ops->hal_tx_set_pcp_tid_map =
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hal_tx_set_pcp_tid_map_generic_li;
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hal_soc->ops->hal_tx_update_pcp_tid_map =
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hal_tx_update_pcp_tid_generic_li;
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hal_soc->ops->hal_tx_set_tidmap_prty =
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hal_tx_update_tidmap_prty_generic_li;
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hal_soc->ops->hal_rx_get_rx_fragment_number =
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hal_rx_get_rx_fragment_number_8074v1;
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hal_soc->ops->hal_rx_msdu_end_da_is_mcbc_get =
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hal_rx_msdu_end_da_is_mcbc_get_8074v1;
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hal_soc->ops->hal_rx_msdu_end_sa_is_valid_get =
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hal_rx_msdu_end_sa_is_valid_get_8074v1;
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hal_soc->ops->hal_rx_msdu_end_sa_idx_get = hal_rx_msdu_end_sa_idx_get_8074v1;
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hal_soc->ops->hal_rx_desc_is_first_msdu = hal_rx_desc_is_first_msdu_8074v1;
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hal_rx_msdu_end_sa_is_valid_get_8074v1;
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hal_soc->ops->hal_rx_msdu_end_sa_idx_get =
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hal_rx_msdu_end_sa_idx_get_8074v1;
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hal_soc->ops->hal_rx_desc_is_first_msdu =
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hal_rx_desc_is_first_msdu_8074v1;
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hal_soc->ops->hal_rx_msdu_end_l3_hdr_padding_get =
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hal_rx_msdu_end_l3_hdr_padding_get_8074v1;
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hal_soc->ops->hal_rx_encryption_info_valid = hal_rx_encryption_info_valid_8074v1;
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hal_soc->ops->hal_rx_encryption_info_valid =
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hal_rx_encryption_info_valid_8074v1;
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hal_soc->ops->hal_rx_print_pn = hal_rx_print_pn_8074v1;
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hal_soc->ops->hal_rx_msdu_end_first_msdu_get = hal_rx_msdu_end_first_msdu_get_8074v1;
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hal_soc->ops->hal_rx_msdu_end_first_msdu_get =
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hal_rx_msdu_end_first_msdu_get_8074v1;
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hal_soc->ops->hal_rx_msdu_end_da_is_valid_get =
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hal_rx_msdu_end_da_is_valid_get_8074v1;
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hal_soc->ops->hal_rx_msdu_end_last_msdu_get = hal_rx_msdu_end_last_msdu_get_8074v1;
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hal_soc->ops->hal_rx_get_mpdu_mac_ad4_valid = hal_rx_get_mpdu_mac_ad4_valid_8074v1;
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hal_rx_msdu_end_da_is_valid_get_8074v1;
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hal_soc->ops->hal_rx_msdu_end_last_msdu_get =
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hal_rx_msdu_end_last_msdu_get_8074v1;
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hal_soc->ops->hal_rx_get_mpdu_mac_ad4_valid =
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hal_rx_get_mpdu_mac_ad4_valid_8074v1;
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hal_soc->ops->hal_rx_mpdu_start_sw_peer_id_get =
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hal_rx_mpdu_start_sw_peer_id_get_8074v1;
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hal_soc->ops->hal_rx_mpdu_get_to_ds = hal_rx_mpdu_get_to_ds_8074v1;
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@@ -1293,46 +1329,64 @@ static void hal_hw_txrx_ops_attach_qca8074(struct hal_soc *hal_soc)
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hal_rx_get_mpdu_sequence_control_valid_8074v1;
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hal_soc->ops->hal_rx_is_unicast = hal_rx_is_unicast_8074v1;
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hal_soc->ops->hal_rx_tid_get = hal_rx_tid_get_8074v1;
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hal_soc->ops->hal_rx_hw_desc_get_ppduid_get = hal_rx_hw_desc_get_ppduid_get_8074v1;
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hal_soc->ops->hal_rx_hw_desc_get_ppduid_get =
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hal_rx_hw_desc_get_ppduid_get_8074v1;
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hal_soc->ops->hal_rx_mpdu_start_mpdu_qos_control_valid_get =
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hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v1;
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hal_soc->ops->hal_rx_msdu_end_sa_sw_peer_id_get =
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hal_rx_msdu_end_sa_sw_peer_id_get_8074v1;
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hal_soc->ops->hal_rx_msdu0_buffer_addr_lsb = hal_rx_msdu0_buffer_addr_lsb_8074v1;
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hal_soc->ops->hal_rx_msdu_desc_info_ptr_get = hal_rx_msdu_desc_info_ptr_get_8074v1;
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hal_soc->ops->hal_rx_msdu0_buffer_addr_lsb =
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hal_rx_msdu0_buffer_addr_lsb_8074v1;
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hal_soc->ops->hal_rx_msdu_desc_info_ptr_get =
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hal_rx_msdu_desc_info_ptr_get_8074v1;
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hal_soc->ops->hal_ent_mpdu_desc_info = hal_ent_mpdu_desc_info_8074v1;
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hal_soc->ops->hal_dst_mpdu_desc_info = hal_dst_mpdu_desc_info_8074v1;
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hal_soc->ops->hal_rx_get_fc_valid = hal_rx_get_fc_valid_8074v1;
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hal_soc->ops->hal_rx_get_to_ds_flag = hal_rx_get_to_ds_flag_8074v1;
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hal_soc->ops->hal_rx_get_mac_addr2_valid = hal_rx_get_mac_addr2_valid_8074v1;
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hal_soc->ops->hal_rx_get_filter_category = hal_rx_get_filter_category_8074v1;
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hal_soc->ops->hal_rx_get_mac_addr2_valid =
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hal_rx_get_mac_addr2_valid_8074v1;
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hal_soc->ops->hal_rx_get_filter_category =
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hal_rx_get_filter_category_8074v1;
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hal_soc->ops->hal_rx_get_ppdu_id = hal_rx_get_ppdu_id_8074v1;
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hal_soc->ops->hal_reo_config = hal_reo_config_8074v1;
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hal_soc->ops->hal_rx_msdu_flow_idx_get = hal_rx_msdu_flow_idx_get_8074v1;
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hal_soc->ops->hal_rx_msdu_flow_idx_invalid = hal_rx_msdu_flow_idx_invalid_8074v1;
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hal_soc->ops->hal_rx_msdu_flow_idx_timeout = hal_rx_msdu_flow_idx_timeout_8074v1;
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hal_soc->ops->hal_rx_msdu_fse_metadata_get = hal_rx_msdu_fse_metadata_get_8074v1;
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hal_soc->ops->hal_rx_msdu_cce_metadata_get = hal_rx_msdu_cce_metadata_get_8074v1;
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hal_soc->ops->hal_rx_msdu_get_flow_params = hal_rx_msdu_get_flow_params_8074v1;
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hal_soc->ops->hal_rx_tlv_get_tcp_chksum = hal_rx_tlv_get_tcp_chksum_8074v1;
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hal_soc->ops->hal_rx_msdu_flow_idx_get =
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hal_rx_msdu_flow_idx_get_8074v1;
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hal_soc->ops->hal_rx_msdu_flow_idx_invalid =
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hal_rx_msdu_flow_idx_invalid_8074v1;
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hal_soc->ops->hal_rx_msdu_flow_idx_timeout =
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hal_rx_msdu_flow_idx_timeout_8074v1;
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hal_soc->ops->hal_rx_msdu_fse_metadata_get =
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hal_rx_msdu_fse_metadata_get_8074v1;
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hal_soc->ops->hal_rx_msdu_cce_metadata_get =
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hal_rx_msdu_cce_metadata_get_8074v1;
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hal_soc->ops->hal_rx_msdu_get_flow_params =
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hal_rx_msdu_get_flow_params_8074v1;
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hal_soc->ops->hal_rx_tlv_get_tcp_chksum =
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hal_rx_tlv_get_tcp_chksum_8074v1;
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hal_soc->ops->hal_rx_get_rx_sequence = hal_rx_get_rx_sequence_8074v1;
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/* rx - msdu fast path info fields */
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hal_soc->ops->hal_rx_msdu_packet_metadata_get =
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hal_rx_msdu_packet_metadata_get_generic;
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hal_rx_msdu_packet_metadata_get_generic_li;
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hal_soc->ops->hal_rx_mpdu_start_tlv_tag_valid =
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hal_rx_mpdu_start_tlv_tag_valid_8074v1;
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/* rx - TLV struct offsets */
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hal_soc->ops->hal_rx_msdu_end_offset_get = hal_rx_msdu_end_offset_get_generic;
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hal_soc->ops->hal_rx_msdu_end_offset_get =
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hal_rx_msdu_end_offset_get_generic;
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hal_soc->ops->hal_rx_attn_offset_get = hal_rx_attn_offset_get_generic;
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hal_soc->ops->hal_rx_msdu_start_offset_get = hal_rx_msdu_start_offset_get_generic;
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hal_soc->ops->hal_rx_mpdu_start_offset_get = hal_rx_mpdu_start_offset_get_generic;
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hal_soc->ops->hal_rx_mpdu_end_offset_get = hal_rx_mpdu_end_offset_get_generic;
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hal_soc->ops->hal_rx_msdu_start_offset_get =
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hal_rx_msdu_start_offset_get_generic;
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hal_soc->ops->hal_rx_mpdu_start_offset_get =
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hal_rx_mpdu_start_offset_get_generic;
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hal_soc->ops->hal_rx_mpdu_end_offset_get =
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hal_rx_mpdu_end_offset_get_generic;
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#ifndef NO_RX_PKT_HDR_TLV
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hal_soc->ops->hal_rx_pkt_tlv_offset_get = hal_rx_pkt_tlv_offset_get_generic;
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hal_soc->ops->hal_rx_pkt_tlv_offset_get =
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hal_rx_pkt_tlv_offset_get_generic;
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#endif
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hal_soc->ops->hal_rx_flow_setup_fse = hal_rx_flow_setup_fse_8074v1;
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hal_soc->ops->hal_compute_reo_remap_ix2_ix3 = hal_compute_reo_remap_ix2_ix3_8074v1;
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hal_soc->ops->hal_compute_reo_remap_ix2_ix3 =
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hal_compute_reo_remap_ix2_ix3_8074v1;
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};
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struct hal_hw_srng_config hw_srng_table_8074[] = {
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@@ -1785,5 +1839,6 @@ void hal_qca8074_attach(struct hal_soc *hal_soc)
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{
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hal_soc->hw_srng_table = hw_srng_table_8074;
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hal_soc->hal_hw_reg_offset = hal_hw_reg_offset_qca8074;
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hal_hw_txrx_default_ops_attach_li(hal_soc);
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hal_hw_txrx_ops_attach_qca8074(hal_soc);
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}
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