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@@ -1,6 +1,6 @@
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/*
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- * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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- * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
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+ * Copyright (c) 2016-2022 The Linux Foundation. All rights reserved.
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+ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -104,6 +104,117 @@ union hal_tx_bank_config {
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uint32_t val;
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};
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+/**
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+ * struct hal_tx_cmn_config_ppe - SW config exception related parameters
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+ * @drop_prec_err - Exception drop_prec errors.
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+ * @fake_mac_hdr - Exception fake mac header.
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+ * @cpu_code_inv - Exception cpu code invalid.
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+ * @data_buff_err - Exception buffer length/offset erorors.
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+ * @l3_l4_err - Exception m3_l4 checksum errors
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+ * @data_offset_max - Maximum data offset allowed.
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+ * @data_len_max - Maximum data length allowed.
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+ */
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+union hal_tx_cmn_config_ppe {
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+ struct {
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+ uint32_t drop_prec_err:1,
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+ fake_mac_hdr:1,
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+ cpu_code_inv:1,
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+ data_buff_err:1,
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+ l3_l4_err:1,
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+ data_offset_max:12,
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+ data_len_max:14;
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+ };
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+ uint32_t val;
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+};
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+
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+/**
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+ * hal_tx_ppe_vp_config - SW config PPE VP table
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+ * @vp_num - Virtual port number
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+ * @pmac_id - Lmac ID
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+ * @bank_id: Bank ID correspondig to this I/F.
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+ * @vdev_id: VDEV ID of the I/F.
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+ * @search_idx_reg_num: Register number of this SI.
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+ * @use_ppe_int_pri: Use the PPE INT_PRI to TID table
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+ * @to_fw: Use FW
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+ * @drop_prec_enable: Enable precendance drop.
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+ */
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+union hal_tx_ppe_vp_config {
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+ struct {
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+ uint32_t vp_num:8,
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+ pmac_id:2,
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+ bank_id:6,
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+ vdev_id:8,
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+ search_idx_reg_num:3,
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+ use_ppe_int_pri:1,
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+ to_fw:1,
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+ drop_prec_enable:1;
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+ };
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+ uint32_t val;
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+};
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+
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+/**
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+ * hal_tx_cmn_ppe_idx_map_config: Use ppe index mapping table
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+ * @search_idx: Search index
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+ * @cache_set: Cache set number
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+ */
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+union hal_tx_ppe_idx_map_config {
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+ struct {
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+ uint32_t search_idx:20,
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+ cache_set:4;
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+ };
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+ uint32_t val;
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+};
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+
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+/**
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+ * hal_tx_ppe_pri2tid_map0_config : Configure ppe INT_PRI to tid map
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+ * @int_pri0: INT_PRI_0
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+ * @int_pri1: INT_PRI_1
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+ * @int_pri2: INT_PRI_2
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+ * @int_pri3: INT_PRI_3
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+ * @int_pri4: INT_PRI_4
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+ * @int_pri5: INT_PRI_5
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+ * @int_pri6: INT_PRI_6
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+ * @int_pri7: INT_PRI_7
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+ * @int_pri8: INT_PRI_8
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+ * @int_pri9: INT_PRI_9
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+ */
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+union hal_tx_ppe_pri2tid_map0_config {
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+ struct {
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+ uint32_t int_pri0:3,
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+ int_pri1:3,
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+ int_pri2:3,
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+ int_pri3:3,
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+ int_pri4:3,
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+ int_pri5:3,
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+ int_pri6:3,
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+ int_pri7:3,
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+ int_pri8:3,
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+ int_pri9:3;
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+ };
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+ uint32_t val;
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+};
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+
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+/**
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+ * hal_tx_ppe_pri2tid_map1_config : Configure ppe INT_PRI to tid map
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+ * @int_pri0: INT_PRI_10
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+ * @int_pri1: INT_PRI_11
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+ * @int_pri2: INT_PRI_12
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+ * @int_pri3: INT_PRI_13
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+ * @int_pri4: INT_PRI_14
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+ * @int_pri5: INT_PRI_15
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+ */
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+union hal_tx_ppe_pri2tid_map1_config {
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+ struct {
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+ uint32_t int_pri10:3,
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+ int_pri11:3,
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+ int_pri12:3,
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+ int_pri13:3,
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+ int_pri14:3,
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+ int_pri15:3;
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+ };
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+ uint32_t val;
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+};
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+
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/*---------------------------------------------------------------------------
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* Function declarations and documentation
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* ---------------------------------------------------------------------------
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