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@@ -792,6 +792,95 @@ struct drm_msm_noise_layer_cfg {
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__u32 alpha_noise;
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__u32 alpha_noise;
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};
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};
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+#define FEATURE_DNSC_BLUR
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+/* Downscale Blur - number of gaussian coefficient LUTs */
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+#define DNSC_BLUR_COEF_NUM 64
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+
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+/* Downscale Blur flags */
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+#define DNSC_BLUR_EN (1 << 0)
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+#define DNSC_BLUR_RND_8B_EN (1 << 1)
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+#define DNSC_BLUR_DITHER_EN (1 << 2)
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+
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+#define DNSC_BLUR_MIRROR_BLK_CFG (1 << 16)
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+#define DNSC_BLUR_INDEPENDENT_BLK_CFG (1 << 17)
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+
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+/* Downscale Blur horizontal/vertical filter flags */
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+#define DNSC_BLUR_GAUS_FILTER (1 << 0)
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+#define DNSC_BLUR_PCMN_FILTER (1 << 1)
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+
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+/* Downscale Blur Dither matrix size */
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+#define DNSC_BLUR_DITHER_MATRIX_SZ 16
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+
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+/* Downscale Blur Dither flags */
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+#define DNSC_BLUR_DITHER_LUMA_MODE (1 << 0)
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+
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+/**
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+ * struct sde_drm_dnsc_blur_cfg - Downscale Blur config structure
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+ * @flags: Flags to indicate features enabled, values are
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+ * based on "Downscale Blur flags"
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+ * @num_blocks: Active dnsc_blur blocks used for the display
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+ * @src_width: Source width configuration
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+ * @src_height: Source height configuration
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+ * @dst_width: Destination width configuration
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+ * @dst_height: Destination height configuration
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+ * @flags_h: Flags for horizontal downscaling, values are
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+ * based on "Downscale Blur horizontal/vertical filter flags"
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+ * @flags_v: Flags for veritcal downscaling
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+ * @phase_init_h: Initial phase value for horizontal downscaling
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+ * @phase_step_h: Phase step value for horizontal downscaling
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+ * @phase_init_v: Initial phase value for vertical downscaling
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+ * @phase_step_v: Phase step value for vertical downscaling
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+ * @norm_h: Horizontal downscale normalization downshift value
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+ * @ratio_h: Horizontal downscale ratio value
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+ * @norm_v: Vertical downscale normalization downshift value
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+ * @ratio_v: Vertical downscale ratio value
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+ * @coef_hori: Horizontal downscale LUT coefficients
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+ * @coef_vert: Vertical downscale LUT coefficients
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+ * @dither_flags: Flags for dither customization, values are
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+ * based on "Downscale Blur Dither flags"
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+ * @temporal_en: Temperal dither enable
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+ * @c0_bitdepth: c0 component bit depth
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+ * @c1_bitdepth: c1 component bit depth
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+ * @c2_bitdepth: c2 component bit depth
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+ * @c3_bitdepth: c2 component bit depth
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+ * @dither_matrix: Dither strength matrix
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+ */
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+struct sde_drm_dnsc_blur_cfg {
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+ __u64 flags;
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+ __u32 num_blocks;
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+
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+ __u32 src_width;
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+ __u32 src_height;
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+ __u32 dst_width;
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+ __u32 dst_height;
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+
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+ __u32 flags_h;
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+ __u32 flags_v;
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+
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+ /* pcmn filter parameters */
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+ __u32 phase_init_h;
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+ __u32 phase_step_h;
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+ __u32 phase_init_v;
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+ __u32 phase_step_v;
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+
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+ /* gaussian filter parameters */
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+ __u32 norm_h;
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+ __u32 ratio_h;
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+ __u32 norm_v;
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+ __u32 ratio_v;
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+ __u32 coef_hori[DNSC_BLUR_COEF_NUM];
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+ __u32 coef_vert[DNSC_BLUR_COEF_NUM];
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+
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+ /* dither configs */
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+ __u64 dither_flags;
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+ __u32 temporal_en;
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+ __u32 c0_bitdepth;
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+ __u32 c1_bitdepth;
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+ __u32 c2_bitdepth;
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+ __u32 c3_bitdepth;
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+ __u32 dither_matrix[DNSC_BLUR_DITHER_MATRIX_SZ];
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+};
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+
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#define DRM_SDE_WB_CONFIG 0x40
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#define DRM_SDE_WB_CONFIG 0x40
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#define DRM_MSM_REGISTER_EVENT 0x41
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#define DRM_MSM_REGISTER_EVENT 0x41
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#define DRM_MSM_DEREGISTER_EVENT 0x42
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#define DRM_MSM_DEREGISTER_EVENT 0x42
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