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@@ -3132,14 +3132,14 @@ static int ipa3_q6_clean_q6_flt_tbls(enum ipa_ip_type ip,
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int retval = 0;
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int pipe_idx;
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int flt_idx = 0;
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- int num_cmds = 0;
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+ int num_cmds = 0, count = 0;
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int index;
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u32 lcl_addr_mem_part;
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u32 lcl_hdr_sz;
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struct ipa_mem_buffer mem;
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struct ipahal_reg_valmask valmask;
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struct ipahal_imm_cmd_register_write reg_write_coal_close;
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- int i;
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+ int coal_ep = IPA_EP_NOT_ALLOCATED;
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IPADBG("Entry\n");
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@@ -3195,14 +3195,14 @@ static int ipa3_q6_clean_q6_flt_tbls(enum ipa_ip_type ip,
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goto free_cmd_pyld;
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}
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+ coal_ep = ipa3_get_ep_mapping(IPA_CLIENT_APPS_WAN_COAL_CONS);
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/* IC to close the coal frame before HPS Clear if coal is enabled */
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- if (ipa3_get_ep_mapping(IPA_CLIENT_APPS_WAN_COAL_CONS) != -1) {
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- i = ipa3_get_ep_mapping(IPA_CLIENT_APPS_WAN_COAL_CONS);
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+ if (coal_ep != IPA_EP_NOT_ALLOCATED) {
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reg_write_coal_close.skip_pipeline_clear = false;
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reg_write_coal_close.pipeline_clear_options = IPAHAL_HPS_CLEAR;
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reg_write_coal_close.offset = ipahal_get_reg_ofst(
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IPA_AGGR_FORCE_CLOSE);
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- ipahal_get_aggr_force_close_valmask(i, &valmask);
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+ ipahal_get_aggr_force_close_valmask(coal_ep, &valmask);
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reg_write_coal_close.value = valmask.val;
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reg_write_coal_close.value_mask = valmask.mask;
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cmd_pyld[num_cmds] = ipahal_construct_imm_cmd(
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@@ -3228,7 +3228,12 @@ static int ipa3_q6_clean_q6_flt_tbls(enum ipa_ip_type ip,
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if (!ipa3_ctx->ep[pipe_idx].valid ||
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ipa3_ctx->ep[pipe_idx].skip_ep_cfg) {
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- if (num_cmds >= ipa3_ctx->ep_flt_num) {
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+ /*
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+ * When coal pipe is valid send close coalescing frame
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+ * command and increment the ep_flt_num accordingly.
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+ */
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+ count = (coal_ep != IPA_EP_NOT_ALLOCATED) ? 1 : 0;
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+ if (num_cmds >= (ipa3_ctx->ep_flt_num + count)) {
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IPAERR("number of commands is out of range\n");
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retval = -ENOBUFS;
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goto free_empty_img;
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