Merge "video: driver: Add support for slice encode delivery"

driver/platform/kalama/src/msm_vidc_kalama.c

@@ -1617,7 +1617,7 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = {
 		HFI_PROP_DPB_TAG_LIST,
 		CAP_FLAG_BITMASK},
 
-	{META_SUBFRAME_OUTPUT, ENC, HEIC,
+	{META_SUBFRAME_OUTPUT, ENC, HEIC | H264 | HEVC,
 		V4L2_MPEG_VIDC_META_DISABLE,
 		V4L2_MPEG_VIDC_META_ENABLE | V4L2_MPEG_VIDC_META_RX_OUTPUT,
 		0, V4L2_MPEG_VIDC_META_DISABLE,
@@ -1684,6 +1684,26 @@ static struct msm_platform_inst_capability instance_cap_data_kalama[] = {
 		V4L2_CID_MPEG_VIDC_METADATA_MAX_NUM_REORDER_FRAMES,
 		HFI_PROP_MAX_NUM_REORDER_FRAMES,
 		CAP_FLAG_BITMASK},
+
+	{DELIVERY_MODE, ENC, HEVC,
+		V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED,
+		V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED,
+		BIT(V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED) |
+		BIT(V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED),
+		V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED,
+		V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE,
+		HFI_PROP_ENABLE_SLICE_DELIVERY,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
+
+	{DELIVERY_MODE, ENC, H264,
+		V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED,
+		V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED,
+		BIT(V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED) |
+		BIT(V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED),
+		V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED,
+		V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE,
+		HFI_PROP_ENABLE_SLICE_DELIVERY,
+		CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU},
 };
 
 static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kalama[] = {
@@ -1867,7 +1887,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala
 		msm_vidc_set_csc_custom_matrix},
 
 	{LOWLATENCY_MODE, ENC, H264 | HEVC,
-		{BITRATE_MODE},
+		{BITRATE_MODE, DELIVERY_MODE},
 		{STAGE},
 		msm_vidc_adjust_enc_lowlatency_mode,
 		NULL},
@@ -2135,7 +2155,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala
 
 	{SLICE_MODE, ENC, H264|HEVC,
 		{BITRATE_MODE, ALL_INTRA},
-		{STAGE},
+		{STAGE, DELIVERY_MODE},
 		msm_vidc_adjust_slice_count,
 		msm_vidc_set_slice_count},
 
@@ -2188,7 +2208,7 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala
 		msm_vidc_set_u32},
 
 	{OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
-		{SUPER_FRAME},
+		{SUPER_FRAME, DELIVERY_MODE},
 		{0},
 		msm_vidc_adjust_output_buf_host_max_count,
 		msm_vidc_set_u32},
@@ -2292,6 +2312,11 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_kala
 		{0},
 		NULL,
 		msm_vidc_set_u32},
+
+	{DELIVERY_MODE, ENC, H264|HEVC,
+		{SLICE_MODE}, {LOWLATENCY_MODE, OUTPUT_BUF_HOST_MAX_COUNT},
+		msm_vidc_adjust_delivery_mode,
+		msm_vidc_set_u32},
 };
 
 /* Default UBWC config for LPDDR5 */

driver/variant/iris3/inc/hfi_buffer_iris3.h

@@ -1201,6 +1201,64 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes)           \
 		size = HFI_ALIGN(bitstream_size, HFI_ALIGNMENT_4096); \
 	} while (0)
 
+#define HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \
+				frame_width_coded, codec_standard) \
+	do \
+	{ \
+		HFI_U32 without_tile_enc_width; \
+		HFI_U32 min_tile_size = 352, fixed_tile_width = 960; \
+		without_tile_enc_width = min_tile_size + fixed_tile_width; \
+		if ((codec_standard == HFI_CODEC_ENCODE_HEVC) && \
+			(frame_width_coded > without_tile_enc_width)) \
+		{ \
+			tile_size = fixed_tile_width; \
+			tile_count = (frame_width_coded + tile_size - 1) / tile_size; \
+			last_tile_size = (frame_width_coded - (tile_size * (tile_count - 1))); \
+			if (last_tile_size < min_tile_size) \
+			{ \
+				tile_count -= 1; \
+				last_tile_size = (tile_size + min_tile_size); \
+			} \
+		} \
+		else \
+		{ \
+			tile_size = frame_width_coded; \
+			tile_count = 1; \
+			last_tile_size = 0; \
+		} \
+	} while (0)
+
+#define HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_slice_count, frame_width, frame_height, \
+			codec_standard, multi_slice_max_mb_count) \
+	do \
+	{ \
+		HFI_U32 tile_size, tile_count, last_tile_size, \
+			slice_count_per_tile, slice_count_in_last_tile; \
+		HFI_U32 mbs_in_one_tile, mbs_in_last_tile; \
+		HFI_U32 frame_width_coded, frame_height_coded, lcu_size; \
+		lcu_size = (codec_standard == HFI_CODEC_ENCODE_HEVC) ? 32 : 16; \
+		frame_width_coded = HFI_ALIGN(frame_width, lcu_size); \
+		frame_height_coded = HFI_ALIGN(frame_height, lcu_size); \
+		HFI_IRIS3_ENC_TILE_SIZE_INFO(tile_size, tile_count, last_tile_size, \
+			frame_width_coded, codec_standard); \
+		mbs_in_one_tile = (tile_size * frame_height_coded) / (lcu_size * lcu_size); \
+		slice_count_per_tile = \
+			(mbs_in_one_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \
+		if (last_tile_size) \
+		{ \
+			mbs_in_last_tile = \
+				(last_tile_size * frame_height_coded) / (lcu_size * lcu_size); \
+			slice_count_in_last_tile = \
+				(mbs_in_last_tile + multi_slice_max_mb_count - 1) / (multi_slice_max_mb_count); \
+			total_slice_count = \
+				(slice_count_per_tile * (tile_count - 1)) + slice_count_in_last_tile; \
+		} \
+		else \
+		{ \
+			total_slice_count = (slice_count_per_tile * tile_count); \
+		} \
+	} while (0)
+
 #define SIZE_ROI_METADATA_ENC(size_roi, frame_width, frame_height, lcu_size)\
 	do                                                \
 	{                                                               \

driver/variant/iris3/src/msm_vidc_buffer_iris3.c

@@ -670,6 +670,48 @@ static int msm_buffer_dpb_count(struct msm_vidc_inst *inst)
 	return msm_vidc_get_recon_buf_count(inst);
 }
 
+static int msm_buffer_delivery_mode_based_min_count_iris3(struct msm_vidc_inst *inst,
+	uint32_t count)
+{
+	struct v4l2_format *f;
+	u32 width, height, total_num_slices = 1;
+	u32 hfi_codec = 0;
+	u32 max_mbs_per_slice = 0;
+	u32 slice_mode = 0;
+	u32 delivery_mode = 0;
+
+	if (!inst || !inst->capabilities) {
+		d_vpr_e("%s: invalid params\n", __func__);
+		return count;
+	}
+
+	slice_mode = inst->capabilities->cap[SLICE_MODE].value;
+	delivery_mode = inst->capabilities->cap[DELIVERY_MODE].value;
+
+	if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB ||
+		(inst->codec == MSM_VIDC_H264 &&
+		delivery_mode != V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED) ||
+		(inst->codec == MSM_VIDC_HEVC &&
+		delivery_mode != V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED))
+		return count;
+
+	f = &inst->fmts[OUTPUT_PORT];
+	width = f->fmt.pix_mp.width;
+	height = f->fmt.pix_mp.height;
+
+	max_mbs_per_slice = inst->capabilities->cap[SLICE_MAX_MB].value;
+
+	if (inst->codec == MSM_VIDC_H264)
+		hfi_codec = HFI_CODEC_ENCODE_AVC;
+	else if (inst->codec == MSM_VIDC_HEVC)
+		hfi_codec = HFI_CODEC_ENCODE_HEVC;
+
+	HFI_IRIS3_ENC_MB_BASED_MULTI_SLICE_COUNT(total_num_slices, width, height,
+			hfi_codec, max_mbs_per_slice);
+
+	return (total_num_slices * count);
+}
+
 int msm_buffer_min_count_iris3(struct msm_vidc_inst *inst,
 		enum msm_vidc_buffer_type buffer_type)
 {
@@ -688,6 +730,7 @@ int msm_buffer_min_count_iris3(struct msm_vidc_inst *inst,
 	case MSM_VIDC_BUF_OUTPUT:
 	case MSM_VIDC_BUF_OUTPUT_META:
 		count = msm_vidc_output_min_count(inst);
+		count = msm_buffer_delivery_mode_based_min_count_iris3(inst, count);
 		break;
 	case MSM_VIDC_BUF_BIN:
 	case MSM_VIDC_BUF_COMV:

driver/vidc/inc/hfi_property.h

@@ -535,6 +535,8 @@ enum hfi_nal_length_field_type {
 
 #define HFI_PROP_IR_CYCLIC_PERIOD                               0x0300017E
 
+#define HFI_PROP_ENABLE_SLICE_DELIVERY                          0x0300017F
+
 #define HFI_PROP_AV1_FILM_GRAIN_PRESENT                         0x03000180
 
 #define HFI_PROP_AV1_SUPER_BLOCK_ENABLED                        0x03000181

driver/vidc/inc/msm_vidc_control.h

@@ -57,6 +57,7 @@ int msm_vidc_adjust_dec_frame_rate(void *instance, struct v4l2_ctrl *ctrl);
 int msm_vidc_adjust_dec_operating_rate(void *instance, struct v4l2_ctrl *ctrl);
 int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl);
 int msm_vidc_adjust_preprocess(void *instance, struct v4l2_ctrl *ctrl);
+int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl);
 
 int msm_vidc_set_header_mode(void *instance,
 	enum msm_vidc_inst_capability_type cap_id);

driver/vidc/inc/msm_vidc_driver.h

@@ -302,6 +302,21 @@ static inline bool is_secure_region(enum msm_vidc_buffer_region region)
 			region == MSM_VIDC_NON_SECURE_PIXEL);
 }
 
+static inline bool is_enc_slice_delivery_mode(struct msm_vidc_inst *inst)
+{
+	if (is_decode_session(inst))
+		return false;
+
+	return (inst->capabilities->cap[SLICE_MODE].value ==
+			V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB &&
+			((inst->codec == MSM_VIDC_H264 &&
+			inst->capabilities->cap[DELIVERY_MODE].value ==
+			V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED) ||
+			(inst->codec == MSM_VIDC_HEVC &&
+			inst->capabilities->cap[DELIVERY_MODE].value ==
+			V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED)));
+}
+
 const char *cap_name(enum msm_vidc_inst_capability_type cap_id);
 const char *v4l2_pixelfmt_name(u32 pixelfmt);
 const char *v4l2_type_name(u32 port);

driver/vidc/inc/msm_vidc_internal.h

@@ -520,6 +520,7 @@ enum msm_vidc_inst_capability_type {
 	OUTPUT_ORDER,
 	INPUT_BUF_HOST_MAX_COUNT,
 	OUTPUT_BUF_HOST_MAX_COUNT,
+	DELIVERY_MODE,
 	/* place all leaf(no child) enums before this line */
 	INST_CAP_MAX,
 };

driver/vidc/src/msm_vidc_buffer.c

@@ -302,6 +302,46 @@ u32 msm_vidc_encoder_input_size(struct msm_vidc_inst *inst)
 	return size;
 }
 
+static u32 msm_vidc_enc_delivery_mode_based_output_buf_size(struct msm_vidc_inst *inst,
+	u32 frame_size)
+{
+	u32 slice_size;
+	u32 width, height;
+	u32 width_in_lcus, height_in_lcus, lcu_size;
+	u32 total_mb_count;
+	struct v4l2_format *f;
+
+	if (!inst || !inst->capabilities) {
+		d_vpr_e("%s: invalid params\n", __func__);
+		return frame_size;
+	}
+
+	f = &inst->fmts[OUTPUT_PORT];
+
+	if (f->fmt.pix_mp.pixelformat != V4L2_PIX_FMT_HEVC &&
+		f->fmt.pix_mp.pixelformat != V4L2_PIX_FMT_H264)
+		return frame_size;
+
+	if (inst->capabilities->cap[SLICE_MODE].value != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB)
+		return frame_size;
+
+	if (!is_enc_slice_delivery_mode(inst))
+		return frame_size;
+
+	lcu_size = (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC) ? 32 : 16;
+	width = f->fmt.pix_mp.width;
+	height = f->fmt.pix_mp.height;
+	width_in_lcus = (width + lcu_size - 1) / lcu_size;
+	height_in_lcus = (height + lcu_size - 1) / lcu_size;
+	total_mb_count = width_in_lcus * height_in_lcus;
+
+	slice_size = ((frame_size * inst->capabilities->cap[SLICE_MAX_MB].value) \
+					+ total_mb_count - 1) / total_mb_count;
+
+	slice_size = ALIGN(slice_size, SZ_4K);
+	return slice_size;
+}
+
 u32 msm_vidc_encoder_output_size(struct msm_vidc_inst *inst)
 {
 	u32 frame_size;
@@ -348,7 +388,10 @@ skip_calc:
 		f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC)
 		frame_size = frame_size + (frame_size >> 2);
 
-	return ALIGN(frame_size, SZ_4K);
+	frame_size = ALIGN(frame_size, SZ_4K);
+	frame_size = msm_vidc_enc_delivery_mode_based_output_buf_size(inst, frame_size);
+
+	return frame_size;
 }
 
 static inline u32 ROI_METADATA_SIZE(

driver/vidc/src/msm_vidc_control.c

@@ -150,6 +150,12 @@ static const char *const mpeg_video_vidc_ir_type[] = {
 	NULL,
 };
 
+static const char *const mpeg_vidc_delivery_modes[] = {
+	"Frame Based Delivery Mode",
+	"Slice Based Delivery Mode",
+	NULL,
+};
+
 u32 msm_vidc_get_port_info(struct msm_vidc_inst *inst,
 	enum msm_vidc_inst_capability_type cap_id)
 {
@@ -193,6 +199,10 @@ static const char * const * msm_vidc_get_qmenu_type(
 		return av1_tier;
 	case V4L2_CID_MPEG_VIDEO_VIDC_INTRA_REFRESH_TYPE:
 		return mpeg_video_vidc_ir_type;
+	case V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE:
+		return mpeg_vidc_delivery_modes;
+	case V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE:
+		return mpeg_vidc_delivery_modes;
 	default:
 		i_vpr_e(inst, "%s: No available qmenu for ctrl %#x\n",
 			__func__, control_id);
@@ -1074,6 +1084,16 @@ static int msm_vidc_update_static_property(struct msm_vidc_inst *inst,
 			return rc;
 	}
 
+	if (ctrl->id == V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE ||
+		ctrl->id == V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE) {
+		struct v4l2_format *output_fmt;
+
+		output_fmt = &inst->fmts[OUTPUT_PORT];
+		rc = msm_venc_s_fmt_output(inst, output_fmt);
+		if (rc)
+			return rc;
+	}
+
 	if (ctrl->id == V4L2_CID_MPEG_VIDC_MIN_BITSTREAM_SIZE_OVERWRITE) {
 		rc = msm_vidc_update_bitstream_buffer_size(inst);
 		if (rc)
@@ -1600,7 +1620,8 @@ int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl *
 	adjusted_value = ctrl ? ctrl->val :
 		capability->cap[OUTPUT_BUF_HOST_MAX_COUNT].value;
 
-	if (msm_vidc_is_super_buffer(inst) || is_image_session(inst))
+	if (msm_vidc_is_super_buffer(inst) || is_image_session(inst) ||
+		is_enc_slice_delivery_mode(inst))
 		adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT;
 
 	msm_vidc_update_cap_value(inst, OUTPUT_BUF_HOST_MAX_COUNT,
@@ -2759,7 +2780,8 @@ int msm_vidc_adjust_enc_lowlatency_mode(void *instance, struct v4l2_ctrl *ctrl)
 		return -EINVAL;
 
 	if (rc_type == HFI_RC_CBR_CFR ||
-		rc_type == HFI_RC_CBR_VFR)
+		rc_type == HFI_RC_CBR_VFR ||
+		is_enc_slice_delivery_mode(inst))
 		adjusted_value = 1;
 
 	msm_vidc_update_cap_value(inst, LOWLATENCY_MODE,
@@ -2949,6 +2971,43 @@ int msm_vidc_adjust_dec_outbuf_fence(void *instance, struct v4l2_ctrl *ctrl)
 	return 0;
 }
 
+int msm_vidc_adjust_delivery_mode(void *instance, struct v4l2_ctrl *ctrl)
+{
+	struct msm_vidc_inst_capability *capability;
+	s32 adjusted_value;
+	s32 slice_mode = -1;
+	struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance;
+
+	if (!inst || !inst->capabilities) {
+		d_vpr_e("%s: invalid params\n", __func__);
+		return -EINVAL;
+	}
+
+	if (is_decode_session(inst))
+		return 0;
+
+	capability = inst->capabilities;
+
+	adjusted_value = ctrl ? ctrl->val : capability->cap[DELIVERY_MODE].value;
+
+	if (msm_vidc_get_parent_value(inst, DELIVERY_MODE, SLICE_MODE,
+		&slice_mode, __func__))
+		return -EINVAL;
+
+	/* Slice encode delivery mode is only supported for Max MB slice mode */
+	if (slice_mode != V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB) {
+		if (inst->codec == MSM_VIDC_HEVC)
+			adjusted_value = V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED;
+		else if (inst->codec == MSM_VIDC_H264)
+			adjusted_value = V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED;
+	}
+
+	msm_vidc_update_cap_value(inst, DELIVERY_MODE,
+		adjusted_value, __func__);
+
+	return 0;
+}
+
 int msm_vidc_prepare_dependency_list(struct msm_vidc_inst *inst)
 {
 	struct list_head root_list, opt_list;
@@ -4350,6 +4409,32 @@ int msm_vidc_v4l2_menu_to_hfi(struct msm_vidc_inst *inst,
 			goto set_default;
 		}
 		return 0;
+	case V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE:
+		switch (capability->cap[cap_id].value) {
+		case V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED:
+			*value = 0;
+			break;
+		case V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED:
+			*value = 1;
+			break;
+		default:
+			*value = 0;
+			goto set_default;
+		}
+		return 0;
+	case V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE:
+		switch (capability->cap[cap_id].value) {
+		case V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED:
+			*value = 0;
+			break;
+		case V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED:
+			*value = 1;
+			break;
+		default:
+			*value = 0;
+			goto set_default;
+		}
+		return 0;
 	default:
 		i_vpr_e(inst,
 			"%s: mapping not specified for ctrl_id: %#x\n",

driver/vidc/src/msm_vidc_driver.c

@@ -216,6 +216,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = {
 	{OUTPUT_ORDER,                   "OUTPUT_ORDER"               },
 	{INPUT_BUF_HOST_MAX_COUNT,       "INPUT_BUF_HOST_MAX_COUNT"   },
 	{OUTPUT_BUF_HOST_MAX_COUNT,      "OUTPUT_BUF_HOST_MAX_COUNT"  },
+	{DELIVERY_MODE,                  "DELIVERY_MODE"              },
 	{INST_CAP_MAX,                   "INST_CAP_MAX"               },
 };
 

include/uapi/vidc/media/v4l2_vidc_extensions.h

@@ -237,6 +237,24 @@ enum v4l2_mpeg_video_av1_tier {
 #define V4L2_CID_MPEG_VIDC_METADATA_PICTURE_TYPE                             \
 	(V4L2_CID_MPEG_VIDC_BASE + 0x3B)
 
+/* Encoder Slice Delivery Mode
+ * set format has a dependency on this control
+ * and gets invoked when this control is updated.
+ */
+#define V4L2_CID_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE                          \
+	(V4L2_CID_MPEG_VIDC_BASE + 0x3C)
+enum v4l2_hevc_encode_delivery_mode {
+	V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_FRAME_BASED = 0,
+	V4L2_MPEG_VIDC_HEVC_ENCODE_DELIVERY_MODE_SLICE_BASED = 1,
+};
+
+#define V4L2_CID_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE                          \
+	(V4L2_CID_MPEG_VIDC_BASE + 0x3D)
+enum v4l2_h264_encode_delivery_mode {
+	V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_FRAME_BASED = 0,
+	V4L2_MPEG_VIDC_H264_ENCODE_DELIVERY_MODE_SLICE_BASED = 1,
+};
+
 /* add new controls above this line */
 /* Deprecate below controls once availble in gki and gsi bionic header */
 #ifndef V4L2_CID_MPEG_VIDEO_BASELAYER_PRIORITY_ID