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disp: msm: dp: issue peripheral flush on every DP commit

As per DP HPG recommendation, controller flush mode is
set to be synchronous with a vsync. This requires a
peripheral flush to be issued for HDR SDP to be processed.
Currently in a static HDR use case, since the peripheral
flush is not issued after queueing an HDR SDP, it never
gets sent to the sink and it stays in SDR mode. This change
issues a peripheral flush on every DP commit, so that
any pending SDPs are flushed.

Change-Id: I0ed82b6cd8df33539a3067c6ad9827f74de2ed51
Signed-off-by: Nisarg Bhavsar <[email protected]>
Nisarg Bhavsar 2 년 전
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1개의 변경된 파일3개의 추가작업 그리고 9개의 파일을 삭제
  1. 3 9
      msm/sde/sde_encoder.c

+ 3 - 9
msm/sde/sde_encoder.c

@@ -3864,16 +3864,10 @@ static inline void _sde_encoder_trigger_flush(struct drm_encoder *drm_enc,
 			ctl->ops.update_bitmask) {
 		/* perform peripheral flush on every frame update for dp dsc */
 		if (phys->comp_type == MSM_DISPLAY_COMPRESSION_DSC &&
-				phys->comp_ratio && c_conn->ops.update_pps) {
-			c_conn->ops.update_pps(phys->connector, NULL,
-					c_conn->display);
-			ctl->ops.update_bitmask(ctl, SDE_HW_FLUSH_PERIPH,
-					phys->hw_intf->idx, 1);
-		}
+				phys->comp_ratio && c_conn->ops.update_pps)
+			c_conn->ops.update_pps(phys->connector, NULL, c_conn->display);
 
-		if (sde_enc->dynamic_hdr_updated)
-			ctl->ops.update_bitmask(ctl, SDE_HW_FLUSH_PERIPH,
-					phys->hw_intf->idx, 1);
+		ctl->ops.update_bitmask(ctl, SDE_HW_FLUSH_PERIPH, phys->hw_intf->idx, 1);
 	}
 
 	if ((extra_flush && extra_flush->pending_flush_mask)