disp: msm: dp: issue peripheral flush on every DP commit
As per DP HPG recommendation, controller flush mode is set to be synchronous with a vsync. This requires a peripheral flush to be issued for HDR SDP to be processed. Currently in a static HDR use case, since the peripheral flush is not issued after queueing an HDR SDP, it never gets sent to the sink and it stays in SDR mode. This change issues a peripheral flush on every DP commit, so that any pending SDPs are flushed. Change-Id: I0ed82b6cd8df33539a3067c6ad9827f74de2ed51 Signed-off-by: Nisarg Bhavsar <quic_bhavsar@quicinc.com>
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vanhempi
f08f714919
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571d51727b
@@ -3864,16 +3864,10 @@ static inline void _sde_encoder_trigger_flush(struct drm_encoder *drm_enc,
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ctl->ops.update_bitmask) {
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/* perform peripheral flush on every frame update for dp dsc */
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if (phys->comp_type == MSM_DISPLAY_COMPRESSION_DSC &&
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phys->comp_ratio && c_conn->ops.update_pps) {
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c_conn->ops.update_pps(phys->connector, NULL,
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c_conn->display);
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ctl->ops.update_bitmask(ctl, SDE_HW_FLUSH_PERIPH,
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phys->hw_intf->idx, 1);
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}
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phys->comp_ratio && c_conn->ops.update_pps)
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c_conn->ops.update_pps(phys->connector, NULL, c_conn->display);
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if (sde_enc->dynamic_hdr_updated)
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ctl->ops.update_bitmask(ctl, SDE_HW_FLUSH_PERIPH,
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phys->hw_intf->idx, 1);
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ctl->ops.update_bitmask(ctl, SDE_HW_FLUSH_PERIPH, phys->hw_intf->idx, 1);
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}
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if ((extra_flush && extra_flush->pending_flush_mask)
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