disp: msm: dsi: add widebus support for DSI
From Lahaina onwards, for compressed DSI output, widebus should be enabled. In widebus mode, 6 bytes of data are transmitted per pclk. For uncompressed output, widebus must be disabled to transmit 3 bytes of uncompressed data per pclk. Change-Id: I7fc0bdb2e1678152d57b4cbb8295063a2ba8ae73 Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
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@@ -342,6 +342,16 @@ void dsi_ctrl_hw_cmn_set_video_timing(struct dsi_ctrl_hw *ctrl,
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reg |= eol_byte_num << 4;
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reg |= 1;
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DSI_W32(ctrl, DSI_VIDEO_COMPRESSION_MODE_CTRL, reg);
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if (ctrl->widebus_support) {
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reg = DSI_R32(ctrl, DSI_VIDEO_MODE_CTRL);
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reg |= BIT(25);
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DSI_W32(ctrl, DSI_VIDEO_MODE_CTRL, reg);
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}
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mode->h_active = DIV_ROUND_UP(mode->h_active *
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mode->pclk_scale.numer,
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mode->pclk_scale.denom);
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} else {
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width = mode->h_active;
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}
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@@ -388,14 +398,15 @@ void dsi_ctrl_hw_cmn_set_video_timing(struct dsi_ctrl_hw *ctrl,
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* setup_cmd_stream() - set up parameters for command pixel streams
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* @ctrl: Pointer to controller host hardware.
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* @mode: Pointer to mode information.
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* @h_stride: Horizontal stride in bytes.
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* @cfg: DSI host configuration that is common to both
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* video and command modes.
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* @vc_id: stream_id
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*
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* Setup parameters for command mode pixel stream size.
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*/
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void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl,
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struct dsi_mode_info *mode,
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u32 h_stride,
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struct dsi_host_common_cfg *cfg,
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u32 vc_id,
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struct dsi_rect *roi)
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{
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@@ -421,7 +432,7 @@ void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl,
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sde_dsc_populate_dsc_private_params(&dsc, intf_ip_w);
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width_final = dsc.pclk_per_line;
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width_final = dsc.bytes_per_pkt * dsc.pkt_per_line;
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stride_final = dsc.bytes_per_pkt;
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pkt_per_line = dsc.pkt_per_line;
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eol_byte_num = dsc.eol_byte_num;
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@@ -436,7 +447,7 @@ void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl,
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sde_vdc_intf_prog_params(&vdc, intf_ip_w);
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width_final = vdc.pclk_per_line;
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width_final = vdc.bytes_per_pkt * vdc.pkt_per_line;
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stride_final = vdc.bytes_per_pkt;
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pkt_per_line = vdc.pkt_per_line;
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eol_byte_num = vdc.eol_byte_num;
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@@ -447,13 +458,23 @@ void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl,
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height_final = roi->h;
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} else {
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width_final = mode->h_active;
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stride_final = h_stride;
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stride_final = mode->h_active * 3;
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height_final = mode->v_active;
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}
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if (dsi_compression_enabled(mode)) {
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pic_width = roi ? roi->w : mode->h_active;
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height_final = roi ? roi->h : mode->v_active;
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if (ctrl->widebus_support) {
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width_final = DIV_ROUND_UP(width_final, 6);
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reg = DSI_R32(ctrl, DSI_COMMAND_MODE_MDP_CTRL2);
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reg |= BIT(20);
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DSI_W32(ctrl, DSI_COMMAND_MODE_MDP_CTRL2, reg);
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} else {
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width_final = DIV_ROUND_UP(width_final, 3);
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}
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reg_ctrl = DSI_R32(ctrl, DSI_COMMAND_COMPRESSION_MODE_CTRL);
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reg_ctrl2 = DSI_R32(ctrl, DSI_COMMAND_COMPRESSION_MODE_CTRL2);
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