disp: msm: dsi: Update dsi byte interface clock calculation

Update dsi byte interface clock as per hardware recommendation.
For Phy ver 2.0 and below: byte intf clk equals to byte clk.
For Phy ver 3.0 and above: byte intf clk equals to byte clk / 2.

Change-Id: Ic3af2e4348403aeacb2e1c73c4dc133db63a51a4
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>

msm/dsi/dsi_defs.h

@@ -450,6 +450,7 @@ struct dsi_split_link_config {
  * @ext_bridge_mode:     External bridge is connected.
  * @force_hs_clk_lane:   Send continuous clock to the panel.
  * @dsi_split_link_config:  Split Link Configuration.
+ * @byte_intf_clk_div:   Determines the factor for calculating byte intf clock.
  */
 struct dsi_host_common_cfg {
 	enum dsi_pixel_format dst_format;
@@ -473,6 +474,7 @@ struct dsi_host_common_cfg {
 	bool ext_bridge_mode;
 	bool force_hs_clk_lane;
 	struct dsi_split_link_config split_link;
+	u32 byte_intf_clk_div;
 };
 
 /**