qcacmn: Add API to print UMAC reset stats

Add API to print UMAC reset and MLO UMAC reset related  stats.

Change-Id: I0925cb8df74a9d33633d180a4cbecd11856d67a5
CRs-Fixed: 3425706

dp/inc/cdp_txrx_cmn_struct.h

@@ -1690,6 +1690,7 @@ enum cdp_vdev_param_type {
  * @CDP_UMAC_RST_SKEL_ENABLE: Enable Umac reset skeleton code for debug
  * @CDP_PPEDS_ENABLE: PPEDS is enabled or not
  * @CDP_SAWF_STATS: set SAWF stats config
+ * @CDP_UMAC_RESET_STATS: UMAC reset stats
  */
 enum cdp_psoc_param_type {
 	CDP_ENABLE_RATE_STATS,
@@ -1702,6 +1703,7 @@ enum cdp_psoc_param_type {
 	CDP_UMAC_RST_SKEL_ENABLE,
 	CDP_PPEDS_ENABLE,
 	CDP_SAWF_STATS,
+	CDP_UMAC_RESET_STATS,
 };
 
 #define TXRX_FW_STATS_TXSTATS                     1

dp/wifi3.0/be/mlo/dp_mlo.c

@@ -1247,4 +1247,45 @@ bool dp_umac_reset_is_soc_ignored(struct dp_soc *soc)
 	return !qdf_atomic_test_bit(dp_mlo_get_chip_id(soc),
 				    &mlo_ctx->grp_umac_reset_ctx.partner_map);
 }
+
+QDF_STATUS dp_mlo_umac_reset_stats_print(struct dp_soc *soc)
+{
+	struct dp_mlo_ctxt *mlo_ctx;
+	struct dp_soc_be *be_soc;
+	struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx;
+
+	be_soc = dp_get_be_soc_from_dp_soc(soc);
+	if (!be_soc) {
+		dp_umac_reset_err("null be_soc");
+		return QDF_STATUS_E_NULL_VALUE;
+	}
+
+	mlo_ctx = be_soc->ml_ctxt;
+	if (!mlo_ctx) {
+		/* This API can be called for non-MLO SOC as well. Hence, return
+		 * the status as success when mlo_ctx is NULL.
+		 */
+		return QDF_STATUS_SUCCESS;
+	}
+
+	grp_umac_reset_ctx = &mlo_ctx->grp_umac_reset_ctx;
+
+	DP_UMAC_RESET_PRINT_STATS("MLO UMAC RESET stats\n"
+		  "\t\tPartner map                   :%x\n"
+		  "\t\tRequest map                   :%x\n"
+		  "\t\tResponse map                  :%x\n"
+		  "\t\tIs target recovery            :%d\n"
+		  "\t\tIs Umac reset inprogress      :%d\n"
+		  "\t\tNumber of UMAC reset triggered:%d\n"
+		  "\t\tInitiator chip ID             :%d\n",
+		  grp_umac_reset_ctx->partner_map,
+		  grp_umac_reset_ctx->request_map,
+		  grp_umac_reset_ctx->response_map,
+		  grp_umac_reset_ctx->is_target_recovery,
+		  grp_umac_reset_ctx->umac_reset_in_progress,
+		  grp_umac_reset_ctx->umac_reset_count,
+		  grp_umac_reset_ctx->initiator_chip_id);
+
+	return QDF_STATUS_SUCCESS;
+}
 #endif

dp/wifi3.0/dp_internal.h

@@ -2735,6 +2735,20 @@ bool dp_umac_reset_target_recovery_check(struct dp_soc *soc);
  * Return: true if the soc is ignored or false otherwise
  */
 bool dp_umac_reset_is_soc_ignored(struct dp_soc *soc);
+
+/**
+ * dp_mlo_umac_reset_stats_print() - API to print MLO umac reset stats
+ * @soc: dp soc handle
+ *
+ * Return: QDF_STATUS
+ */
+QDF_STATUS dp_mlo_umac_reset_stats_print(struct dp_soc *soc);
+#else
+static inline
+QDF_STATUS dp_mlo_umac_reset_stats_print(struct dp_soc *soc)
+{
+	return QDF_STATUS_SUCCESS;
+}
 #endif
 
 #endif

dp/wifi3.0/dp_main.c

@@ -11323,6 +11323,9 @@ dp_set_psoc_param(struct cdp_soc_t *cdp_soc,
 	case CDP_UMAC_RST_SKEL_ENABLE:
 		dp_umac_rst_skel_enable_update(soc, val.cdp_umac_rst_skel);
 		break;
+	case CDP_UMAC_RESET_STATS:
+		dp_umac_reset_stats_print(soc);
+		break;
 	case CDP_SAWF_STATS:
 		wlan_cfg_set_sawf_stats_config(wlan_cfg_ctx,
 					       val.cdp_sawf_stats);

dp/wifi3.0/dp_umac_reset.c

@@ -931,3 +931,84 @@ QDF_STATUS dp_soc_umac_reset_deinit(struct cdp_soc_t *txrx_soc)
 	return QDF_STATUS_SUCCESS;
 }
 
+static inline const char *dp_umac_reset_current_state_to_str(
+		enum umac_reset_state current_state)
+{
+	switch (current_state) {
+	case UMAC_RESET_STATE_WAIT_FOR_TRIGGER:
+		return "UMAC_RESET_STATE_WAIT_FOR_TRIGGER";
+	case UMAC_RESET_STATE_DO_TRIGGER_RECEIVED:
+		return "UMAC_RESET_STATE_DO_TRIGGER_RECEIVED";
+	case UMAC_RESET_STATE_HOST_TRIGGER_DONE:
+		return "UMAC_RESET_STATE_HOST_TRIGGER_DONE";
+	case UMAC_RESET_STATE_WAIT_FOR_DO_PRE_RESET:
+		return "UMAC_RESET_STATE_WAIT_FOR_DO_PRE_RESET";
+	case UMAC_RESET_STATE_DO_PRE_RESET_RECEIVED:
+		return "UMAC_RESET_STATE_DO_PRE_RESET_RECEIVED";
+	case UMAC_RESET_STATE_HOST_PRE_RESET_DONE:
+		return "UMAC_RESET_STATE_HOST_PRE_RESET_DONE";
+	case UMAC_RESET_STATE_WAIT_FOR_DO_POST_RESET_START:
+		return "UMAC_RESET_STATE_WAIT_FOR_DO_POST_RESET_START";
+	case UMAC_RESET_STATE_DO_POST_RESET_START_RECEIVED:
+		return "UMAC_RESET_STATE_DO_POST_RESET_START_RECEIVED";
+	case UMAC_RESET_STATE_HOST_POST_RESET_START_DONE:
+		return "UMAC_RESET_STATE_HOST_POST_RESET_START_DONE";
+	case UMAC_RESET_STATE_WAIT_FOR_DO_POST_RESET_COMPLETE:
+		return "UMAC_RESET_STATE_WAIT_FOR_DO_POST_RESET_COMPLETE";
+	case UMAC_RESET_STATE_DO_POST_RESET_COMPLETE_RECEIVED:
+		return "UMAC_RESET_STATE_DO_POST_RESET_COMPLETE_RECEIVED";
+	case UMAC_RESET_STATE_HOST_POST_RESET_COMPLETE_DONE:
+		return "UMAC_RESET_STATE_HOST_POST_RESET_COMPLETE_DONE";
+	default:
+		return "Invalid UMAC Reset state";
+	}
+}
+
+static inline const char *dp_umac_reset_pending_action_to_str(
+		enum umac_reset_rx_event pending_action)
+{
+	switch (pending_action) {
+	case UMAC_RESET_RX_EVENT_NONE:
+		return "UMAC_RESET_RX_EVENT_NONE";
+	case UMAC_RESET_RX_EVENT_DO_TRIGGER_RECOVERY:
+		return "UMAC_RESET_RX_EVENT_DO_TRIGGER_RECOVERY";
+	case UMAC_RESET_RX_EVENT_DO_PRE_RESET:
+		return "UMAC_RESET_RX_EVENT_DO_PRE_RESET";
+	case UMAC_RESET_RX_EVENT_DO_POST_RESET_START:
+		return "UMAC_RESET_RX_EVENT_DO_POST_RESET_START";
+	case UMAC_RESET_RX_EVENT_DO_POST_RESET_COMPELTE:
+		return "UMAC_RESET_RX_EVENT_DO_POST_RESET_COMPELTE";
+	default:
+		return "Invalid pending action";
+	}
+}
+
+QDF_STATUS dp_umac_reset_stats_print(struct dp_soc *soc)
+{
+	struct dp_soc_umac_reset_ctx *umac_reset_ctx;
+
+	umac_reset_ctx = &soc->umac_reset_ctx;
+
+	DP_UMAC_RESET_PRINT_STATS("UMAC reset stats for soc:%pK\n"
+		  "\t\ttrigger time                  :%u us\n"
+		  "\t\tPre_reset time                :%u us\n"
+		  "\t\tPost_reset time               :%u us\n"
+		  "\t\tPost_reset_complete time      :%u us\n"
+		  "\t\tCurrent state                 :%s\n"
+		  "\t\tPending action                :%s",
+		  soc,
+		  umac_reset_ctx->ts.trigger_done -
+		  umac_reset_ctx->ts.trigger_start,
+		  umac_reset_ctx->ts.pre_reset_done -
+		  umac_reset_ctx->ts.pre_reset_start,
+		  umac_reset_ctx->ts.post_reset_done -
+		  umac_reset_ctx->ts.post_reset_start,
+		  umac_reset_ctx->ts.post_reset_complete_done -
+		  umac_reset_ctx->ts.post_reset_complete_start,
+		  dp_umac_reset_current_state_to_str(
+			  umac_reset_ctx->current_state),
+		  dp_umac_reset_pending_action_to_str(
+			  umac_reset_ctx->pending_action));
+
+	return dp_mlo_umac_reset_stats_print(soc);
+}

dp/wifi3.0/dp_umac_reset.h

@@ -55,6 +55,10 @@ enum umac_reset_action {
 #define dp_umac_reset_debug(params...) \
 	QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_UMAC_RESET, params)
 
+#define DP_UMAC_RESET_PRINT_STATS(fmt, args ...)\
+	QDF_TRACE(QDF_MODULE_ID_DP_UMAC_RESET, QDF_TRACE_LEVEL_FATAL,\
+		  fmt, ## args)
+
 #define DP_UMAC_RESET_SHMEM_ALIGN 8
 #define DP_UMAC_RESET_SHMEM_MAGIC_NUM (0xDEADBEEF)
 
@@ -298,6 +302,14 @@ void dp_umac_reset_post_tx_cmd_via_shmem(struct dp_soc *soc, void *ctxt,
  * Return: true if Umac reset is in progress or false otherwise
  */
 bool dp_check_umac_reset_in_progress(struct dp_soc *soc);
+
+/**
+ * dp_umac_reset_stats_print - API to print UMAC reset stats
+ * @soc: dp soc handle
+ *
+ * Return: QDF_STATUS
+ */
+QDF_STATUS dp_umac_reset_stats_print(struct dp_soc *soc);
 #else
 static inline bool dp_check_umac_reset_in_progress(struct dp_soc *soc)
 {
@@ -332,5 +344,11 @@ QDF_STATUS dp_umac_reset_notify_action_completion(
 {
 	return QDF_STATUS_SUCCESS;
 }
+
+static inline
+QDF_STATUS dp_umac_reset_stats_print(struct dp_soc *soc)
+{
+	return QDF_STATUS_SUCCESS;
+}
 #endif /* DP_UMAC_HW_RESET_SUPPORT */
 #endif /* _DP_UMAC_RESET_H_ */