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disp: msm: sde: change INTF TE sync height based on 32-bit support

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Modify the default INTF TE sync threshold config in cmd-mode to
32-bit max based on the INTF TE 32-bit support.

Change-Id: I963ffa8ae37bce0e85deb335609857c17e32d6b0
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
This commit is contained in:
Veera Sundaram Sankaran
2023-01-23 14:47:23 -08:00
parent d3d044ec00
commit 55e80bfcf7
3 changed files with 19 additions and 3 deletions
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5
msm/sde/sde_encoder_phys_cmd.c
View File

@@ -1265,7 +1265,12 @@ static void sde_encoder_phys_cmd_tearcheck_config(
* disable sde hw generated TE signal, since hw TE will arrive first. * disable sde hw generated TE signal, since hw TE will arrive first.
* Only caveat is if due to error, we hit wrap-around. * Only caveat is if due to error, we hit wrap-around.
*/ */
if (phys_enc->hw_intf->ops.is_te_32bit_supported
&& phys_enc->hw_intf->ops.is_te_32bit_supported(phys_enc->hw_intf))
tc_cfg.sync_cfg_height = 0xFFFFFFF0;
else
tc_cfg.sync_cfg_height = 0xFFF0; tc_cfg.sync_cfg_height = 0xFFF0;
tc_cfg.vsync_init_val = mode->vdisplay; tc_cfg.vsync_init_val = mode->vdisplay;
tc_cfg.sync_threshold_start = _get_tearcheck_threshold(phys_enc); tc_cfg.sync_threshold_start = _get_tearcheck_threshold(phys_enc);
tc_cfg.sync_threshold_continue = DEFAULT_TEARCHECK_SYNC_THRESH_CONTINUE; tc_cfg.sync_threshold_continue = DEFAULT_TEARCHECK_SYNC_THRESH_CONTINUE;

8
msm/sde/sde_hw_intf.c
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only
/* /*
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
*/ */
@@ -1022,6 +1022,11 @@ static void sde_hw_intf_enable_wide_bus(struct sde_hw_intf *intf,
SDE_REG_WRITE(c, INTF_CONFIG2, intf_cfg2); SDE_REG_WRITE(c, INTF_CONFIG2, intf_cfg2);
} }
static bool sde_hw_intf_is_te_32bit_supported(struct sde_hw_intf *intf)
{
return (intf->cap->features & BIT(SDE_INTF_TE_32BIT));
}
static void _setup_intf_ops(struct sde_hw_intf_ops *ops, static void _setup_intf_ops(struct sde_hw_intf_ops *ops,
unsigned long cap) unsigned long cap)
{ {
@@ -1038,6 +1043,7 @@ static void _setup_intf_ops(struct sde_hw_intf_ops *ops,
ops->avr_ctrl = sde_hw_intf_avr_ctrl; ops->avr_ctrl = sde_hw_intf_avr_ctrl;
ops->enable_compressed_input = sde_hw_intf_enable_compressed_input; ops->enable_compressed_input = sde_hw_intf_enable_compressed_input;
ops->enable_wide_bus = sde_hw_intf_enable_wide_bus; ops->enable_wide_bus = sde_hw_intf_enable_wide_bus;
ops->is_te_32bit_supported = sde_hw_intf_is_te_32bit_supported;
if (cap & BIT(SDE_INTF_STATUS)) if (cap & BIT(SDE_INTF_STATUS))
ops->get_status = sde_hw_intf_v1_get_status; ops->get_status = sde_hw_intf_v1_get_status;

7
msm/sde/sde_hw_intf.h
View File

@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* /*
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2015-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
*/ */
@@ -267,6 +267,11 @@ struct sde_hw_intf_ops {
*/ */
void (*override_tear_rd_ptr_val)(struct sde_hw_intf *intf, void (*override_tear_rd_ptr_val)(struct sde_hw_intf *intf,
u32 adjusted_linecnt); u32 adjusted_linecnt);
/**
* Check if intf supports 32-bit registers for TE
*/
bool (*is_te_32bit_supported)(struct sde_hw_intf *intf);
}; };
struct sde_hw_intf { struct sde_hw_intf {