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disp: msm: sde: change INTF TE sync height based on 32-bit support

Modify the default INTF TE sync threshold config in cmd-mode to
32-bit max based on the INTF TE 32-bit support.

Change-Id: I963ffa8ae37bce0e85deb335609857c17e32d6b0
Signed-off-by: Veera Sundaram Sankaran <[email protected]>
Veera Sundaram Sankaran 2 年 前
コミット
55e80bfcf7
3 ファイル変更19 行追加3 行削除
  1. 6 1
      msm/sde/sde_encoder_phys_cmd.c
  2. 7 1
      msm/sde/sde_hw_intf.c
  3. 6 1
      msm/sde/sde_hw_intf.h

+ 6 - 1
msm/sde/sde_encoder_phys_cmd.c

@@ -1265,7 +1265,12 @@ static void sde_encoder_phys_cmd_tearcheck_config(
 	 * disable sde hw generated TE signal, since hw TE will arrive first.
 	 * Only caveat is if due to error, we hit wrap-around.
 	 */
-	tc_cfg.sync_cfg_height = 0xFFF0;
+	if (phys_enc->hw_intf->ops.is_te_32bit_supported
+			&& phys_enc->hw_intf->ops.is_te_32bit_supported(phys_enc->hw_intf))
+		tc_cfg.sync_cfg_height = 0xFFFFFFF0;
+	else
+		tc_cfg.sync_cfg_height = 0xFFF0;
+
 	tc_cfg.vsync_init_val = mode->vdisplay;
 	tc_cfg.sync_threshold_start = _get_tearcheck_threshold(phys_enc);
 	tc_cfg.sync_threshold_continue = DEFAULT_TEARCHECK_SYNC_THRESH_CONTINUE;

+ 7 - 1
msm/sde/sde_hw_intf.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  */
 
@@ -1022,6 +1022,11 @@ static void sde_hw_intf_enable_wide_bus(struct sde_hw_intf *intf,
 	SDE_REG_WRITE(c, INTF_CONFIG2, intf_cfg2);
 }
 
+static bool sde_hw_intf_is_te_32bit_supported(struct sde_hw_intf *intf)
+{
+	return (intf->cap->features & BIT(SDE_INTF_TE_32BIT));
+}
+
 static void _setup_intf_ops(struct sde_hw_intf_ops *ops,
 		unsigned long cap)
 {
@@ -1038,6 +1043,7 @@ static void _setup_intf_ops(struct sde_hw_intf_ops *ops,
 	ops->avr_ctrl = sde_hw_intf_avr_ctrl;
 	ops->enable_compressed_input = sde_hw_intf_enable_compressed_input;
 	ops->enable_wide_bus = sde_hw_intf_enable_wide_bus;
+	ops->is_te_32bit_supported = sde_hw_intf_is_te_32bit_supported;
 
 	if (cap & BIT(SDE_INTF_STATUS))
 		ops->get_status = sde_hw_intf_v1_get_status;

+ 6 - 1
msm/sde/sde_hw_intf.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  */
 
@@ -267,6 +267,11 @@ struct sde_hw_intf_ops {
 	 */
 	void (*override_tear_rd_ptr_val)(struct sde_hw_intf *intf,
 			u32 adjusted_linecnt);
+
+	/**
+	 * Check if intf supports 32-bit registers for TE
+	 */
+	bool (*is_te_32bit_supported)(struct sde_hw_intf *intf);
 };
 
 struct sde_hw_intf {