qcacld-3.0: update FW common interface files

FW common files needs to be in sync with host and fw.
Update host fw common interface files with latest version
of FW interface files.

Change-Id: Id4585fbbfaeba186075ecc54b35024315d6e0b68
CRs-Fixed: 1012542

target/inc/bmi_msg.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2014 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, 2016 The Linux Foundation. All rights reserved.
  *
  * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
  *
@@ -232,23 +232,37 @@ struct bmi_segmented_metadata {
  * Response format3 (newest firmware)
  *    struct bmi_target_info;
  */
-#ifdef FEATURE_BMI_2
 PREPACK struct bmi_target_info {
 	/* size of this structure */
 	A_UINT32 target_info_byte_count;
 	A_UINT32 target_ver;
 	A_UINT32 target_type;
-	A_UINT32 flags;
 } POSTPACK;
-#else
-PREPACK struct bmi_target_info {
-	/* size of this structure */
-	A_UINT32 target_info_byte_count;
-	A_UINT32 target_ver;
-	A_UINT32 target_type;
-} POSTPACK;
-#endif
+
 #define TARGET_VERSION_SENTINAL 0xffffffff
+#define TARGET_TYPE_UNKNOWN   0
+#define TARGET_TYPE_AR6001    1
+#define TARGET_TYPE_AR6002    2
+#define TARGET_TYPE_AR6003    3
+#define TARGET_TYPE_AR6004    5
+#define TARGET_TYPE_AR6006    6
+#define TARGET_TYPE_AR9888    7
+#define TARGET_TYPE_AR6320    8
+#define TARGET_TYPE_AR900B    9
+/* For attach Peregrine 2.0 board target_reg_tbl only */
+#define TARGET_TYPE_AR9888V2  10
+/* For attach Rome1.0 target_reg_tbl only*/
+#define TARGET_TYPE_AR6320V1    11
+/* For Rome2.0/2.1 target_reg_tbl ID*/
+#define TARGET_TYPE_AR6320V2    12
+/* For Rome3.0 target_reg_tbl ID*/
+#define TARGET_TYPE_AR6320V3    13
+/* For Tufello1.0 target_reg_tbl ID*/
+#define TARGET_TYPE_QCA9377V1   14
+
+
+extern void target_register_tbl_attach(A_UINT32 target_type);
+
 #define BMI_ROMPATCH_INSTALL               9
 /*
  * Semantics: Install a ROM Patch.

target/inc/cepci.h

@@ -83,9 +83,15 @@ struct pcie_state_s {
 /*
  * PCIE_CONFIG_FLAG definitions
  */
-#define PCIE_CONFIG_FLAG_ENABLE_L1          0x0000001
+#if defined(AR900B)
+#define PCIE_CONFIG_FLAG_ENABLE_L1  0x0000001
+#define CE_PKTLOG_PIPE   8      /* used by both host and target side */
+#endif
+
+#define PCIE_CONFIG_FLAG_CLK_GATING_L1      0x0000001
 #define PCIE_CONFIG_FLAG_CLK_SWITCH_WAIT    0x0000002
 #define PCIE_CONFIG_FLAG_AXI_CLK_GATE       0x0000004
+#define PCIE_CONFIG_FLAG_CLK_REQ_L1         0x0000008
 
 #define PIPE_TO_CE_MAP_CNT 32   /* simple implementation constant */
 

target/inc/dbglog.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012, 2015 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012, 2016 The Linux Foundation. All rights reserved.
  *
  * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
  *
@@ -77,48 +77,6 @@ extern "C" {
 #define DBGLOG_GET_TIME_STAMP(arg) \
 	((arg & DBGLOG_TIMESTAMP_MASK) >> DBGLOG_TIMESTAMP_OFFSET)
 
-#define DIAG_FWID_OFFSET            24
-#define DIAG_FWID_MASK              0xFF000000  /* Bit 24-31 */
-
-#define DIAG_TIMESTAMP_OFFSET       0
-#define DIAG_TIMESTAMP_MASK         0x00FFFFFF  /* Bit 0-23 */
-
-#define DIAG_ID_OFFSET              16
-#define DIAG_ID_MASK                0xFFFF0000  /* Bit 16-31 */
-
-#define DIAG_VDEVID_OFFSET          11
-#define DIAG_VDEVID_MASK            0x0000F800  /* Bit 11-15 */
-#define DIAG_VDEVID_NUM_MAX         16
-
-#define DIAG_VDEVLEVEL_OFFSET       8
-#define DIAG_VDEVLEVEL_MASK         0x00000700  /* Bit 8-10 */
-
-#define DIAG_PAYLEN_OFFSET          0
-#define DIAG_PAYLEN_MASK            0x000000FF  /* Bit 0-7 */
-
-#define DIAG_PAYLEN_OFFSET16        0
-#define DIAG_PAYLEN_MASK16          0x0000FFFF  /* Bit 0-16 */
-
-#define DIAG_GET_TYPE(arg) \
-	((arg & DIAG_FWID_MASK) >> DIAG_FWID_OFFSET)
-
-#define DIAG_GET_TIME_STAMP(arg) \
-	((arg & DIAG_TIMESTAMP_MASK) >> DIAG_TIMESTAMP_OFFSET)
-
-#define DIAG_GET_ID(arg) \
-	((arg & DIAG_ID_MASK) >> DIAG_ID_OFFSET)
-
-#define DIAG_GET_VDEVID(arg) \
-	((arg & DIAG_VDEVID_MASK) >> DIAG_VDEVID_OFFSET)
-
-#define DIAG_GET_VDEVLEVEL(arg)	\
-	((arg & DIAG_VDEVLEVEL_MASK) >> DIAG_VDEVLEVEL_OFFSET)
-
-#define DIAG_GET_PAYLEN(arg) \
-	((arg & DIAG_PAYLEN_MASK) >> DIAG_PAYLEN_OFFSET)
-
-#define DIAG_GET_PAYLEN16(arg) \
-	((arg & DIAG_PAYLEN_MASK16) >> DIAG_PAYLEN_OFFSET16)
 
 /* Debug Log levels*/
 
@@ -146,19 +104,6 @@ PREPACK struct dbglog_hdr_s {
 	A_UINT32 dropped;
 } POSTPACK;
 
-PREPACK struct dbglog_buf_host {
-	A_UINT32 next;
-	A_UINT32 buffer;
-	A_UINT32 bufsize;
-	A_UINT32 length;
-	A_UINT32 count;
-	A_UINT32 free;
-} POSTPACK;
-
-PREPACK struct dbglog_hdr_host {
-	A_UINT32 dbuf;
-	A_UINT32 dropped;
-} POSTPACK;
 
 #define DBGLOG_MAX_VDEVID 15    /* 0-15 */
 

target/inc/dbglog_id.h

@@ -574,11 +574,11 @@ extern "C" {
 #define SCAN_ENGINE_CANCEL_COMMAND                  4
 #define SCAN_ENGINE_STOP_DUE_TO_TIMEOUT             5
 #define SCAN_EVENT_SEND_TO_HOST                     6
-#define SCAN_FWLOG_EVENT_ADD                        7
-#define SCAN_FWLOG_EVENT_REM                        8
-#define SCAN_FWLOG_EVENT_PREEMPTED                  9
-#define SCAN_FWLOG_EVENT_RESTARTED                  10
-#define SCAN_FWLOG_EVENT_COMPLETED                  11
+#define SCAN_EVENT_ADD                              7
+#define SCAN_EVENT_REM                              8
+#define SCAN_EVENT_PREEMPTED                        9
+#define SCAN_EVENT_RESTARTED                        10
+#define SCAN_EVENT_COMPLETED                        11
 #define SCAN_SM_REQ_NEXT_CH                         12
 #define SCAN_ENG_START                              13
 #define SCAN_ENG_CANCEL                             14
@@ -1031,7 +1031,8 @@ extern "C" {
 #define ROAM_SCAN_HIRSSI_CHECK          83
 #define ROAM_SCAN_HIRSSI_TIMER_EXPIRED  84
 #define ROAM_SCAN_EXTSCAN_CHECK         85
-#define ROAM_DBGID_DEFINITION_END   86
+#define ROAM_STA_KICKOUT_RECV           86
+#define ROAM_DBGID_DEFINITION_END       87
 
 /* DATA_TXRX module DBGIDs*/
 #define DATA_TXRX_DBGID_DEFINITION_START         0
@@ -1197,22 +1198,23 @@ extern "C" {
 
 /* RMC DBGIDs */
 #define RMC_DBGID_DEFINITION_START             0
-#define RMC_SM_INIT_ERR                        1
-#define RMC_VDEV_ALLOC_ERR                     2
-#define RMC_CREATE_INSTANCE                    3
-#define RMC_DELETE_INSTANCE                    4
-#define RMC_NEW_PRI_LEADER                     5
-#define RMC_NEW_SEC_LEADER                     6
-#define RMC_NO_LDR_CHANGE                      7
-#define RMC_LDR_INFORM_SENT                    8
-#define RMC_PEER_ADD                           9
-#define RMC_PEER_DELETE                        10
-#define RMC_PEER_UNKNOWN                       11
-#define RMC_PRI_LDR_RSSI_UPDATE                12
-#define RMC_SEC_LDR_RSSI_UPDATE                13
-#define RMC_SET_MODE                           14
-#define RMC_SET_ACTION_PERIOD                  15
-#define RMC_DBGID_DEFINITION_END               16
+#define RMC_CREATE_INSTANCE                    1
+#define RMC_DELETE_INSTANCE                    2
+#define RMC_LDR_SEL                            3
+#define RMC_NO_LDR                             4
+#define RMC_LDR_NOT_SEL                        5
+#define RMC_LDR_INF_SENT                       6
+#define RMC_PEER_ADD                           7
+#define RMC_PEER_DELETE                        8
+#define RMC_PEER_UNKNOWN                       9
+#define RMC_SET_MODE                           10
+#define RMC_SET_ACTION_PERIOD                  11
+#define RMC_ACTION_FRAME_RX                    12
+#define RMC_WAL_EVENT_HANDLER                  13
+#define RMC_BLACKLIST_PEER                     14
+#define RMC_WHITELIST_PEER                     15
+#define RMC_PEER_BCN_INFO                      16
+#define RMC_DBGID_DEFINITION_END               17
 
 /* UNIT_TEST module DBGIDs */
 #define UNIT_TEST_GEN                 0

target/inc/enet.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012, 2014 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012, 2014, 2016 The Linux Foundation. All rights reserved.
  *
  * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
  *
@@ -48,7 +48,8 @@ struct ethernet_hdr_t {
 #define ETHERNET_CRC_LEN  4     /* bytes - length of the Ethernet CRC */
 #define ETHERNET_MAX_LEN  1518  /* bytes */
 
-#define ETHERNET_MTU          (ETHERNET_MAX_LEN - (ETHERNET_HDR_LEN + ETHER_CRC_LEN))
+#define ETHERNET_MTU (ETHERNET_MAX_LEN - (ETHERNET_HDR_LEN + ETHERNET_CRC_LEN))
+
 
 struct llc_snap_hdr_t {
 	A_UINT8 dsap;

target/inc/htc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2014 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2014, 2016 The Linux Foundation. All rights reserved.
  *
  * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
  *
@@ -31,6 +31,9 @@
 #ifndef ATH_TARGET
 #include "athstartpack.h"
 #endif
+#ifdef ATHR_WIN_NWF
+#pragma warning(disable:4214)
+#endif
 #undef MS
 #define MS(_v, _f) (((_v) & _f ## _MASK) >> _f ## _LSB)
 #undef SM
@@ -114,15 +117,26 @@ typedef PREPACK struct _HTC_FRAME_HDR {
 #define HTC_FLAGS_NEED_CREDIT_UPDATE (1 << 0)
 #define HTC_FLAGS_SEND_BUNDLE        (1 << 1)   /* start or part of bundle */
 #define HTC_FLAGS_SEQ_CHECK          (1 << 2) /* seq check on rx side */
-#define HTC_FLAGS_CRC CHECK          (1 << 3) /* CRC check on rx side */
-
+#define HTC_FLAGS_CRC_CHECK          (1 << 3) /* CRC check on rx side */
 /* receive direction */
-#define HTC_FLAGS_RECV_UNUSED_0      (1 << 0)   /* bit 0 unused */
-#define HTC_FLAGS_RECV_TRAILER       (1 << 1)   /* bit 1 trailer data present */
-#define HTC_FLAGS_RECV_UNUSED_2      (1 << 0)   /* bit 2 unused */
-#define HTC_FLAGS_RECV_UNUSED_3      (1 << 0)   /* bit 3 unused */
-#define HTC_FLAGS_RECV_BUNDLE_CNT_MASK (0xF0)   /* bits 7..4  */
-#define HTC_FLAGS_RECV_BUNDLE_CNT_SHIFT 4
+#define HTC_FLAGS_RECV_1MORE_BLOCK   (1 << 0) /* bit 0 bundle trailer present */
+#define HTC_FLAGS_RECV_TRAILER       (1 << 1) /* bit 1 trailer data present */
+#define HTC_FLAGS_RECV_BUNDLE_CNT_MASK   (0xFC)    /* bits 7..2  */
+#define HTC_FLAGS_RECV_BUNDLE_CNT_SHIFT  2
+/*
+ * To be compatible with an older definition of a smaller (4-bit)
+ * bundle count field, the bundle count is stored in a segmented
+ * format - the 4 LSbs of the bundle count value are stored in bits 5:2
+ * of the BUNDLE_CNT field, which is bits 7:4 of the HTC_FLAGS word;
+ * the next 2 bits of the bundle count value are stored in bits 1:0 of
+ * the BUNDLE_CNT field, which is bits 3:2 of the HTC_FLAGS word.
+ */
+#define HTC_FLAGS_RECV_BUNDLE_CNT_SET(x)  \
+	((((x) << 2) | ((x) >> 4)) << HTC_FLAGS_RECV_BUNDLE_CNT_SHIFT)
+#define HTC_FLAGS_RECV_BUNDLE_CNT_GET(x)  \
+	((((x) & HTC_FLAGS_RECV_BUNDLE_CNT_MASK) >> \
+	(HTC_FLAGS_RECV_BUNDLE_CNT_SHIFT + 2)) | \
+	((((x) >> HTC_FLAGS_RECV_BUNDLE_CNT_SHIFT) & 0x3) << 4))
 
 #define HTC_HDR_LENGTH  (sizeof(HTC_FRAME_HDR))
 #define HTC_HDR_ALIGNMENT_PADDING	    \

target/inc/htc_services.h

@@ -59,9 +59,6 @@ typedef enum {
 
 #define HTT_DATA_MSG_SVC  MAKE_SERVICE_ID(HTT_SERVICE_GROUP,0)
 #define HTT_DATA2_MSG_SVC MAKE_SERVICE_ID(HTT_SERVICE_GROUP,1)
-#define HTT_DATA3_MSG_SVC MAKE_SERVICE_ID(HTT_SERVICE_GROUP, 2)
-
-#define PACKET_LOG_SVC    MAKE_SERVICE_ID(PACKET_LOG_SERVICE_GROUP, 0)
 
 /* raw stream service (i.e. flash, tcmd, calibration apps) */
 #define HTC_RAW_STREAMS_SVC MAKE_SERVICE_ID(HTC_TEST_GROUP,0)
@@ -69,6 +66,8 @@ typedef enum {
 #define CFG_NV_SVC  MAKE_SERVICE_ID(CFG_NV_SERVICE_GROUP,0)
 #define WDI_IPA_TX_SVC MAKE_SERVICE_ID(WDI_IPA_SERVICE_GROUP,0)
 
+#define PACKET_LOG_SVC MAKE_SERVICE_ID(PACKET_LOG_SERVICE_GROUP, 0)
+
 /*
  * Directions for interconnect pipe configuration.
  * These definitions may be used during configuration and are shared
@@ -82,11 +81,12 @@ typedef enum {
  * over the interconnect.
  */
 typedef A_UINT32 PIPEDIR;
-#define PIPEDIR_NONE		0
-#define PIPEDIR_IN		1   /* Target-->Host, WiFi Rx direction */
-#define PIPEDIR_OUT		2   /* Host->Target, WiFi Tx direction */
-#define PIPEDIR_INOUT 		3   /* bidirectional - target to target */
-#define PIPEDIR_INOUT_H2H	4   /* bidirectional - host to host */
+#define PIPEDIR_NONE      0
+#define PIPEDIR_IN        1  /* Target-->Host, WiFi Rx direction */
+#define PIPEDIR_OUT       2  /* Host->Target, WiFi Tx direction */
+#define PIPEDIR_INOUT     3  /* bidirectional, target to target */
+#define PIPEDIR_INOUT_T2T PIPEDIR_INOUT
+#define PIPEDIR_INOUT_H2H 4  /* bidirectional, host to host */
 #define PIPEDIR_MATCH(d1, d2) (((PIPEDIR)(d1) & (PIPEDIR)(d2)) != 0)
 
 /* Establish a mapping between a service/direction and a pipe. */

target/inc/htt_isoc.h

@@ -37,7 +37,8 @@
 #ifndef _HTT_ISOC_H_
 #define _HTT_ISOC_H_
 
-#include <a_types.h>            /* A_UINT32, A_UINT8 */
+#include <a_types.h>    /* A_UINT32, A_UINT8 */
+#include <a_osapi.h>          /* A_COMPILE_TIME_ASSERT */
 
 #ifdef ATHR_WIN_NWF
 #pragma warning(disable:4214) /* bit field types other than int */
@@ -74,6 +75,11 @@ typedef enum htt_isoc_t2h_msg_type {
 	/* RX_ERR - notification that an rx frame was discarded due to errors */
 	HTT_ISOC_T2H_MSG_TYPE_RX_ERR = 0x8,
 
+	/* NLO_MATCH - notification that target found NLO match */
+	HTT_ISOC_T2H_MSG_TYPE_NLO_MATCH     = 0x9,
+
+	/* NLO_SCAN_END - notification that target NLO SCAN END 1:1 map with  NLO_MATCH */
+	HTT_ISOC_T2H_MSG_TYPE_NLO_SCAN_END  = 0xA,
 	/* keep this last */
 	HTT_ISOC_T2H_NUM_MSGS
 } htt_isoc_t2h_msg_type;
@@ -90,16 +96,24 @@ typedef enum htt_isoc_t2h_msg_type {
 #define HTT_ISOC_T2H_MSG_TYPE_GET(msg_addr) \
 	(*((A_UINT8 *) msg_addr))
 
-#ifndef inline
+#ifndef INLINE
+#ifdef QCA_SUPPORT_INTEGRATED_SOC
+/* host SW */
+#define INLINE inline
+#else
 /* target FW */
-#define inline __inline
+#define INLINE __inline
+#endif
 #define HTT_ISOC_INLINE_DEF
-#endif /* inline */
-
-static inline void
-htt_isoc_t2h_field_set(A_UINT32 *msg_addr32,
-		       unsigned offset32,
-		       unsigned mask, unsigned shift, unsigned value)
+#endif /* INLINE */
+
+static INLINE void
+htt_isoc_t2h_field_set(
+	A_UINT32 *msg_addr32,
+	unsigned offset32,
+	unsigned mask,
+	unsigned shift,
+	unsigned value)
 {
 	/* sanity check: make sure the value fits within the field */
 	/* qdf_assert(value << shift == (value << shift) | mask); */
@@ -113,7 +127,7 @@ htt_isoc_t2h_field_set(A_UINT32 *msg_addr32,
 
 #ifdef HTT_ISOC_INLINE_DEF
 #undef HTT_ISOC_INLINE_DEF
-#undef inline
+#undef INLINE
 #endif
 
 #define HTT_ISOC_T2H_FIELD_GET(msg_addr32, offset32, mask, shift) \
@@ -332,30 +346,42 @@ typedef struct htt_isoc_t2h_peer_info_s {
 #define HTT_ISOC_T2H_PEER_INFO_DPU_IDX_GET(msg_addr) \
 	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(DPU_IDX, msg_addr)
 
+A_COMPILE_TIME_ASSERT(HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_IDX_M_Size_Check,
+	(HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_IDX_M >> HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_IDX_S) \
+		<= ((A_UINT8)~((A_UINT8)0)));
 #define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_IDX_SET(msg_addr, value) \
 	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(BCAST_DPU_IDX, msg_addr, value)
 #define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_IDX_GET(msg_addr) \
-	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(BCAST_DPU_IDX, msg_addr)
+	(A_UINT8)(HTT_ISOC_T2H_PEER_INFO_FIELD_GET(BCAST_DPU_IDX, msg_addr))
 
+A_COMPILE_TIME_ASSERT(HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_IDX_M_Size_Check,
+	(HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_IDX_M >> HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_IDX_S) \
+		<= ((A_UINT8)~((A_UINT8)0)));
 #define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_IDX_SET(msg_addr, value) \
 	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(MGMT_DPU_IDX, msg_addr, value)
 #define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_IDX_GET(msg_addr) \
-	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(MGMT_DPU_IDX, msg_addr)
+	(A_UINT8)(HTT_ISOC_T2H_PEER_INFO_FIELD_GET(MGMT_DPU_IDX, msg_addr))
 
 #define HTT_ISOC_T2H_PEER_INFO_PEER_ID_SET(msg_addr, value) \
 	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(PEER_ID, msg_addr, value)
 #define HTT_ISOC_T2H_PEER_INFO_PEER_ID_GET(msg_addr) \
 	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(PEER_ID, msg_addr)
 
+A_COMPILE_TIME_ASSERT(HTT_ISOC_T2H_PEER_INFO_DPU_SIG_M_Size_Check,
+	(HTT_ISOC_T2H_PEER_INFO_DPU_SIG_M >> HTT_ISOC_T2H_PEER_INFO_DPU_SIG_S)\
+		<= ((A_UINT8)~((A_UINT8)0)));
 #define HTT_ISOC_T2H_PEER_INFO_DPU_SIG_SET(msg_addr, value) \
 	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(DPU_SIG, msg_addr, value)
 #define HTT_ISOC_T2H_PEER_INFO_DPU_SIG_GET(msg_addr) \
-	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(DPU_SIG, msg_addr)
+	(A_UINT8)(HTT_ISOC_T2H_PEER_INFO_FIELD_GET(DPU_SIG, msg_addr))
 
+A_COMPILE_TIME_ASSERT(HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_SIG_M_Size_Check,
+	(HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_SIG_M >> HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_SIG_S)\
+		<= ((A_UINT8)~((A_UINT8)0)));
 #define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_SIG_SET(msg_addr, value) \
 	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(BCAST_DPU_SIG, msg_addr, value)
 #define HTT_ISOC_T2H_PEER_INFO_BCAST_DPU_SIG_GET(msg_addr) \
-	HTT_ISOC_T2H_PEER_INFO_FIELD_GET(BCAST_DPU_SIG, msg_addr)
+	(A_UINT8)(HTT_ISOC_T2H_PEER_INFO_FIELD_GET(BCAST_DPU_SIG, msg_addr))
 
 #define HTT_ISOC_T2H_PEER_INFO_MGMT_DPU_SIG_SET(msg_addr, value) \
 	HTT_ISOC_T2H_PEER_INFO_FIELD_SET(MGMT_DPU_SIG, msg_addr, value)
@@ -450,10 +476,13 @@ typedef struct htt_isoc_t2h_peer_unmap_s {
 
 /* access macros for specific fields */
 
+A_COMPILE_TIME_ASSERT(HTT_ISOC_T2H_PEER_UNMAP_PEER_ID_M_Size_Check,
+	(HTT_ISOC_T2H_PEER_UNMAP_PEER_ID_M >> HTT_ISOC_T2H_PEER_UNMAP_PEER_ID_S) \
+		< ((A_UINT16)~((A_UINT16)0)));
 #define HTT_ISOC_T2H_PEER_UNMAP_PEER_ID_SET(msg_addr, value) \
 	HTT_ISOC_T2H_PEER_UNMAP_FIELD_SET(PEER_ID, msg_addr, value)
 #define HTT_ISOC_T2H_PEER_UNMAP_PEER_ID_GET(msg_addr) \
-	HTT_ISOC_T2H_PEER_UNMAP_FIELD_GET(PEER_ID, msg_addr)
+	(A_UINT16)(HTT_ISOC_T2H_PEER_UNMAP_FIELD_GET(PEER_ID, msg_addr))
 
 /*=== ADDBA message ===*/
 enum {
@@ -563,10 +592,13 @@ typedef struct htt_isoc_t2h_addba_s {
 #define HTT_ISOC_T2H_ADDBA_WIN_SIZE_GET(msg_addr) \
 	HTT_ISOC_T2H_ADDBA_FIELD_GET(WIN_SIZE, msg_addr)
 
+A_COMPILE_TIME_ASSERT(HTT_ISOC_T2H_ADDBA_TID_M_Size_Check,
+	(HTT_ISOC_T2H_ADDBA_TID_M >> HTT_ISOC_T2H_ADDBA_TID_S) \
+		< ((A_UINT8)~((A_UINT8)0)));
 #define HTT_ISOC_T2H_ADDBA_TID_SET(msg_addr, value) \
 	HTT_ISOC_T2H_ADDBA_FIELD_SET(TID, msg_addr, value)
 #define HTT_ISOC_T2H_ADDBA_TID_GET(msg_addr) \
-	HTT_ISOC_T2H_ADDBA_FIELD_GET(TID, msg_addr)
+	(A_UINT8)(HTT_ISOC_T2H_ADDBA_FIELD_GET(TID, msg_addr))
 
 #define HTT_ISOC_T2H_ADDBA_PEER_ID_SET(msg_addr, value)	\
 	HTT_ISOC_T2H_ADDBA_FIELD_SET(PEER_ID, msg_addr, value)
@@ -659,10 +691,13 @@ typedef struct htt_isoc_t2h_delba_s {
 
 /* access macros for specific fields */
 
+A_COMPILE_TIME_ASSERT(HTT_ISOC_T2H_DELBA_TID_M_Size_Check,
+	(HTT_ISOC_T2H_DELBA_TID_M >> HTT_ISOC_T2H_DELBA_TID_S) \
+		< ((A_UINT8)~((A_UINT8)0)));
 #define HTT_ISOC_T2H_DELBA_TID_SET(msg_addr, value) \
 	HTT_ISOC_T2H_DELBA_FIELD_SET(TID, msg_addr, value)
 #define HTT_ISOC_T2H_DELBA_TID_GET(msg_addr) \
-	HTT_ISOC_T2H_DELBA_FIELD_GET(TID, msg_addr)
+	(A_UINT8)HTT_ISOC_T2H_DELBA_FIELD_GET(TID, msg_addr)
 
 #define HTT_ISOC_T2H_DELBA_PEER_ID_SET(msg_addr, value)	\
 	HTT_ISOC_T2H_DELBA_FIELD_SET(PEER_ID, msg_addr, value)
@@ -858,10 +893,15 @@ typedef struct htt_isoc_t2h_peer_tx_ready_s {
 
 /* access macros for specific fields */
 
-#define HTT_ISOC_T2H_PEER_TX_READY_PEER_ID_SET(msg_addr, value)	\
+A_COMPILE_TIME_ASSERT(HTT_ISOC_T2H_PEER_TX_READY_PEER_ID_M_Size_Check,
+	(HTT_ISOC_T2H_PEER_TX_READY_PEER_ID_M >> \
+	HTT_ISOC_T2H_PEER_TX_READY_PEER_ID_S) < ((A_UINT16)~((A_UINT16)0)));
+
+#define HTT_ISOC_T2H_PEER_TX_READY_PEER_ID_SET(msg_addr, value) \
 	HTT_ISOC_T2H_PEER_TX_READY_FIELD_SET(PEER_ID, msg_addr, value)
 #define HTT_ISOC_T2H_PEER_TX_READY_PEER_ID_GET(msg_addr) \
-	HTT_ISOC_T2H_PEER_TX_READY_FIELD_GET(PEER_ID, msg_addr)
+	((A_UINT16)(HTT_ISOC_T2H_PEER_TX_READY_FIELD_GET(PEER_ID, msg_addr)))
+
 
 /*=== RX_ERR message ===*/
 
@@ -962,6 +1002,11 @@ typedef struct htt_isoc_t2h_rx_err_s {
 	/* words M - N: security header */
 } htt_isoc_t2h_rx_err_t;
 
+/* This needs to be exact bytes for structure htt_isoc_t2h_rx_err_t
+ *  * Since it is shared between host and FW, sizeof may not be used.
+ *  * */
+#define HTT_ISOC_T2H_RX_ERR_BASE_BYTES                20
+
 /* word 0 */
 #define HTT_ISOC_T2H_RX_ERR_TYPE_OFFSET32             0
 #define HTT_ISOC_T2H_RX_ERR_TYPE_M                    0x0000ff00
@@ -974,27 +1019,28 @@ typedef struct htt_isoc_t2h_rx_err_s {
 /* word 1 */
 #define HTT_ISOC_T2H_RX_ERR_EXT_TID_OFFSET32          1
 #define HTT_ISOC_T2H_RX_ERR_EXT_TID_M                 0x0000001f
-#define HTT_ISOC_T2H_RX_ERR_EXT_TID_ID_S              0
+#define HTT_ISOC_T2H_RX_ERR_EXT_TID_S                 0
 
 #define HTT_ISOC_T2H_RX_ERR_MCAST_OFFSET32            1
 #define HTT_ISOC_T2H_RX_ERR_MCAST_M                   0x00000040
-#define HTT_ISOC_T2H_RX_ERR_MCAST_ID_S                6
+#define HTT_ISOC_T2H_RX_ERR_MCAST_S                   6
 
 #define HTT_ISOC_T2H_RX_ERR_L2_HDR_IS_80211_OFFSET32  1
 #define HTT_ISOC_T2H_RX_ERR_L2_HDR_IS_80211_M         0x00000080
-#define HTT_ISOC_T2H_RX_ERR_L2_HDR_IS_80211_ID_S      7
+#define HTT_ISOC_T2H_RX_ERR_L2_HDR_IS_80211_S         7
 
-#define HTT_ISOC_T2H_RX_L2_HDR_BYTES_OFFSET32         1
-#define HTT_ISOC_T2H_RX_L2_HDR_BYTES_M                0x0000ff00
-#define HTT_ISOC_T2H_RX_L2_HDR_BYTES_ID_S             8
+#define HTT_ISOC_T2H_RX_ERR_L2_HDR_BYTES_OFFSET32     1
+#define HTT_ISOC_T2H_RX_ERR_L2_HDR_BYTES_M            0x0000ff00
+#define HTT_ISOC_T2H_RX_ERR_L2_HDR_BYTES_S            8
 
-#define HTT_ISOC_T2H_RX_SEC_HDR_BYTES_OFFSET32        1
-#define HTT_ISOC_T2H_RX_SEC_HDR_BYTES_M               0x00ff0000
-#define HTT_ISOC_T2H_RX_SEC_HDR_BYTES_ID_S            16
+#define HTT_ISOC_T2H_RX_ERR_SEC_HDR_BYTES_OFFSET32    1
+#define HTT_ISOC_T2H_RX_ERR_SEC_HDR_BYTES_M           0x00ff0000
+#define HTT_ISOC_T2H_RX_ERR_SEC_HDR_BYTES_S           16
 
 #define HTT_ISOC_T2H_RX_ERR_CNT_OFFSET32              1
 #define HTT_ISOC_T2H_RX_ERR_CNT_M                     0xff000000
-#define HTT_ISOC_T2H_RX_ERR_CNT_ID_S                  24
+#define HTT_ISOC_T2H_RX_ERR_CNT_S                     24
+
 
 /* general field access macros */
 
@@ -1020,10 +1066,13 @@ typedef struct htt_isoc_t2h_rx_err_s {
 #define HTT_ISOC_T2H_RX_ERR_TYPE_GET(msg_addr) \
 	HTT_ISOC_T2H_RX_ERR_FIELD_GET(TYPE, msg_addr)
 
+A_COMPILE_TIME_ASSERT(HTT_ISOC_T2H_RX_ERR_PEER_ID_M_Size_Check,
+	(HTT_ISOC_T2H_RX_ERR_PEER_ID_M >> HTT_ISOC_T2H_RX_ERR_PEER_ID_S) \
+		<= ((A_UINT16)~((A_UINT16)0)));
 #define HTT_ISOC_T2H_RX_ERR_PEER_ID_SET(msg_addr, value) \
 	HTT_ISOC_T2H_RX_ERR_FIELD_SET(PEER_ID, msg_addr, value)
 #define HTT_ISOC_T2H_RX_ERR_PEER_ID_GET(msg_addr) \
-	HTT_ISOC_T2H_RX_ERR_FIELD_GET(PEER_ID, msg_addr)
+	((A_UINT16)HTT_ISOC_T2H_RX_ERR_FIELD_GET(PEER_ID, msg_addr))
 
 #define HTT_ISOC_T2H_RX_ERR_EXT_TID_SET(msg_addr, value) \
 	HTT_ISOC_T2H_RX_ERR_FIELD_SET(EXT_TID, msg_addr, value)
@@ -1055,4 +1104,141 @@ typedef struct htt_isoc_t2h_rx_err_s {
 #define HTT_ISOC_T2H_RX_ERR_CNT_GET(msg_addr) \
 	HTT_ISOC_T2H_RX_ERR_FIELD_GET(CNT, msg_addr)
 
+/*=== TX OTA complete indication message ===*/
+
+/**
+ * @brief target -> tx complete indicate message
+ *
+ * @details
+ * The following diagram shows the format of the tx complete indication message sent
+ * from the target to the host.  This layout assumes the target operates
+ * as little-endian.
+ *
+ * |31                      19|18                       8|7               0|
+ * |-----------------------------------------------------------------------|
+ * |         reserved         |          status          |     msg type    |
+ * |-----------------------------------------------------------------------|
+ *
+ *
+ * The following field definitions describe the format of the peer info
+ * message sent from the target to the host.
+ *
+ * WORD 0:
+ *   - MSG_TYPE
+ *     Bits 7:0
+ *     Purpose: identifies this as tx complete indication message
+ *     Value: 0x7
+ *   - status
+ *     Bits 18:8
+ *     Purpose: TX completion status
+ */
+typedef struct htt_isoc_t2h_tx_compl_s {
+	/* word 0 */
+	A_UINT32
+	/* HTT_ISOC_T2H_MSG_TYPE_TX_COMPL_IND */
+	qmsg_type:8,
+	status:11,
+	reserved0:13;
+} htt_isoc_t2h_tx_compl_t;
+
+/* word 0 */
+#define HTT_ISOC_T2H_TX_COMPL_IND_STATUS_OFFSET32        0
+#define HTT_ISOC_T2H_TX_COMPL_IND_STATUS_M               0x0007ff00
+#define HTT_ISOC_T2H_TX_COMPL_IND_STATUS_S               8
+
+
+/* general field access macros */
+
+#define HTT_ISOC_T2H_TX_COMPL_IND_FIELD_SET(field, msg_addr, value) \
+	htt_isoc_t2h_field_set(                                       \
+	((A_UINT32 *) msg_addr),                                  \
+	HTT_ISOC_T2H_TX_COMPL_IND_ ## field ## _OFFSET32,           \
+	HTT_ISOC_T2H_TX_COMPL_IND_ ## field ## _M,                  \
+	HTT_ISOC_T2H_TX_COMPL_IND_ ## field ## _S,                  \
+	value)
+
+#define HTT_ISOC_T2H_TX_COMPL_IND_FIELD_GET(field, msg_addr) \
+	HTT_ISOC_T2H_FIELD_GET(                                \
+	((A_UINT32 *) msg_addr),                           \
+	HTT_ISOC_T2H_TX_COMPL_IND_ ## field ## _OFFSET32,    \
+	HTT_ISOC_T2H_TX_COMPL_IND_ ## field ## _M,           \
+	HTT_ISOC_T2H_TX_COMPL_IND_ ## field ## _S)
+
+/* access macros for specific fields */
+
+#define HTT_ISOC_T2H_TX_COMPL_IND_STATUS_SET(msg_addr, value) \
+	HTT_ISOC_T2H_TX_COMPL_IND_FIELD_SET(STATUS, msg_addr, value)
+#define HTT_ISOC_T2H_TX_COMPL_IND_STATUS_GET(msg_addr) \
+	HTT_ISOC_T2H_TX_COMPL_IND_FIELD_GET(STATUS, msg_addr)
+
+#define HTT_TX_COMPL_IND_STAT_OK          0
+#define HTT_TX_COMPL_IND_STAT_DISCARD     1
+#define HTT_TX_COMPL_IND_STAT_NO_ACK      2
+#define HTT_TX_COMPL_IND_STAT_POSTPONE    3
+
+/*=== NLO indication message ===*/
+
+/**
+* @brief target -> NLO indicate message
+*
+* @details
+* The following diagram shows the format of the NLO indication message sent
+* from the target to the host.  This layout assumes the target operates
+* as little-endian.
+*
+* |31                                                  8|7               0|
+* |-----------------------------------------------------------------------|
+* |                      reserved                       |     msg type    |
+* |-----------------------------------------------------------------------|
+*
+*
+* The following field definitions describe the format of NLO MATCH indication
+* message sent from the target to the host.
+*
+* WORD 0:
+*   - MSG_TYPE
+*     Bits 7:0
+*     Purpose: identifies this as NLO indication message
+*     Value: 0x9 - HTT_ISOC_T2H_MSG_TYPE_NLO_MATCH
+*     Value: 0xA - HTT_ISOC_T2H_MSG_TYPE_NLO_SCAN_END
+*/
+typedef struct htt_isoc_t2h_nlo_ind_s {
+	/* word 0 */
+	A_UINT32
+	msg_type:8,
+	vdev_id:8,
+	reserved0:16;
+} htt_isoc_t2h_nlo_ind_t;
+
+/* word 0 */
+#define HTT_ISOC_T2H_NLO_IND_VDEVID_OFFSET32            0
+#define HTT_ISOC_T2H_NLO_IND_VDEVID_M                   0x0000ff00
+#define HTT_ISOC_T2H_NLO_IND_VDEVID_S                   8
+
+
+/* general field access macros */
+
+#define HTT_ISOC_T2H_NLO_IND_FIELD_SET(field, msg_addr, value)  \
+	htt_isoc_t2h_field_set(                                     \
+	((A_UINT32 *) msg_addr),                                \
+	HTT_ISOC_T2H_NLO_IND_ ## field ## _OFFSET32,            \
+	HTT_ISOC_T2H_NLO_IND_ ## field ## _M,                   \
+	HTT_ISOC_T2H_NLO_IND_ ## field ## _S,                   \
+	value)
+
+#define HTT_ISOC_T2H_NLO_IND_FIELD_GET(field, msg_addr)     \
+	HTT_ISOC_T2H_FIELD_GET(                                 \
+	((A_UINT32 *) msg_addr),                            \
+	HTT_ISOC_T2H_NLO_IND_ ## field ## _OFFSET32,        \
+	HTT_ISOC_T2H_NLO_IND_ ## field ## _M,               \
+	HTT_ISOC_T2H_NLO_IND_ ## field ## _S)
+
+/* access macros for specific fields */
+
+#define HTT_ISOC_T2H_NLO_IND_VDEVID_SET(msg_addr, value) \
+	HTT_ISOC_T2H_NLO_IND_FIELD_SET(VDEVID, msg_addr, value)
+#define HTT_ISOC_T2H_NLO_IND_VDEVID_GET(msg_addr) \
+	HTT_ISOC_T2H_NLO_IND_FIELD_GET(VDEVID, msg_addr)
+
+
 #endif /* _HTT_ISOC_H_ */

target/inc/ol_fw_tx_dbg.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012, 2014-2015 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012, 2014-2016 The Linux Foundation. All rights reserved.
  *
  * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
  *
@@ -49,8 +49,8 @@
 #if defined(ATH_TARGET)
 #include <osapi.h>              /* A_UINT32 */
 #else
-#include <a_types.h>            /* A_UINT32 */
-#include <osdep.h>              /* PREPACK, POSTPACK */
+#include <a_types.h>    /* A_UINT32 */
+#include <a_osapi.h>    /* PREPACK, POSTPACK */
 #endif
 
 enum ol_fw_tx_dbg_log_mode {
@@ -92,90 +92,90 @@ struct ol_fw_tx_dbg_ppdu_msg_hdr {
  */
 struct ol_fw_tx_dbg_ppdu_base {
 	/* word 0 - filled in during tx enqueue */
-#define OL_FW_TX_DBG_PPDU_START_SEQ_NUM_16    0
+#define OL_FW_TX_DBG_PPDU_START_SEQ_NUM_WORD    0
 #define OL_FW_TX_DBG_PPDU_START_SEQ_NUM_S     0
 #define OL_FW_TX_DBG_PPDU_START_SEQ_NUM_M     0x0000ffff
 	A_UINT16 start_seq_num;
-#define OL_FW_TX_DBG_PPDU_START_PN_LSBS_16    0
+#define OL_FW_TX_DBG_PPDU_START_PN_LSBS_WORD    0
 #define OL_FW_TX_DBG_PPDU_START_PN_LSBS_S     16
 #define OL_FW_TX_DBG_PPDU_START_PN_LSBS_M     0xffff0000
 	A_UINT16 start_pn_lsbs;
 
 	/* word 1 - filled in during tx enqueue */
-#define OL_FW_TX_DBG_PPDU_NUM_BYTES_16        1
+#define OL_FW_TX_DBG_PPDU_NUM_BYTES_WORD        1
 #define OL_FW_TX_DBG_PPDU_NUM_BYTES_S         0
 #define OL_FW_TX_DBG_PPDU_NUM_BYTES_M         0xffffffff
 	A_UINT32 num_bytes;
 
 	/* word 2 - filled in during tx enqueue */
-#define OL_FW_TX_DBG_PPDU_NUM_MSDUS_16        2
+#define OL_FW_TX_DBG_PPDU_NUM_MSDUS_WORD        2
 #define OL_FW_TX_DBG_PPDU_NUM_MSDUS_S         0
 #define OL_FW_TX_DBG_PPDU_NUM_MSDUS_M         0x000000ff
 	A_UINT8 num_msdus;
-#define OL_FW_TX_DBG_PPDU_NUM_MPDUS_16        2
+#define OL_FW_TX_DBG_PPDU_NUM_MPDUS_WORD        2
 #define OL_FW_TX_DBG_PPDU_NUM_MPDUS_S         8
 #define OL_FW_TX_DBG_PPDU_NUM_MPDUS_M         0x0000ff00
 	A_UINT8 num_mpdus;
 	A_UINT16
-#define OL_FW_TX_DBG_PPDU_EXT_TID_16          2
+#define OL_FW_TX_DBG_PPDU_EXT_TID_WORD          2
 #define OL_FW_TX_DBG_PPDU_EXT_TID_S           16
 #define OL_FW_TX_DBG_PPDU_EXT_TID_M           0x001f0000
 	ext_tid : 5,
-#define OL_FW_TX_DBG_PPDU_PEER_ID_16          2
+#define OL_FW_TX_DBG_PPDU_PEER_ID_WORD          2
 #define OL_FW_TX_DBG_PPDU_PEER_ID_S           21
 #define OL_FW_TX_DBG_PPDU_PEER_ID_M           0xffe00000
 	peer_id : 11;
 
 	/* word 3 - filled in during tx enqueue */
-#define OL_FW_TX_DBG_PPDU_TIME_ENQUEUE_16     3
+#define OL_FW_TX_DBG_PPDU_TIME_ENQUEUE_WORD     3
 #define OL_FW_TX_DBG_PPDU_TIME_ENQUEUE_S      0
 #define OL_FW_TX_DBG_PPDU_TIME_ENQUEUE_M      0xffffffff
 	A_UINT32 timestamp_enqueue;
 
 	/* word 4 - filled in during tx completion */
-#define OL_FW_TX_DBG_PPDU_TIME_COMPL_16       4
+#define OL_FW_TX_DBG_PPDU_TIME_COMPL_WORD       4
 #define OL_FW_TX_DBG_PPDU_TIME_COMPL_S        0
 #define OL_FW_TX_DBG_PPDU_TIME_COMPL_M        0xffffffff
 	A_UINT32 timestamp_completion;
 
 	/* word 5 - filled in during tx completion */
-#define OL_FW_TX_DBG_PPDU_BLOCK_ACK_LSBS_16   5
+#define OL_FW_TX_DBG_PPDU_BLOCK_ACK_LSBS_WORD   5
 #define OL_FW_TX_DBG_PPDU_BLOCK_ACK_LSBS_S    0
 #define OL_FW_TX_DBG_PPDU_BLOCK_ACK_LSBS_M    0xffffffff
 	A_UINT32 block_ack_bitmap_lsbs;
 
 	/* word 6 - filled in during tx completion */
-#define OL_FW_TX_DBG_PPDU_BLOCK_ACK_MSBS_16   6
+#define OL_FW_TX_DBG_PPDU_BLOCK_ACK_MSBS_WORD   6
 #define OL_FW_TX_DBG_PPDU_BLOCK_ACK_MSBS_S    0
 #define OL_FW_TX_DBG_PPDU_BLOCK_ACK_MSBS_M    0xffffffff
 	A_UINT32 block_ack_bitmap_msbs;
 
 	/* word 7 - filled in during tx completion (enqueue would work too) */
-#define OL_FW_TX_DBG_PPDU_ENQUEUED_LSBS_16    7
+#define OL_FW_TX_DBG_PPDU_ENQUEUED_LSBS_WORD    7
 #define OL_FW_TX_DBG_PPDU_ENQUEUED_LSBS_S     0
 #define OL_FW_TX_DBG_PPDU_ENQUEUED_LSBS_M     0xffffffff
 	A_UINT32 enqueued_bitmap_lsbs;
 
 	/* word 8 - filled in during tx completion (enqueue would work too) */
-#define OL_FW_TX_DBG_PPDU_ENQUEUED_MSBS_16    8
+#define OL_FW_TX_DBG_PPDU_ENQUEUED_MSBS_WORD    8
 #define OL_FW_TX_DBG_PPDU_ENQUEUED_MSBS_S     0
 #define OL_FW_TX_DBG_PPDU_ENQUEUED_MSBS_M     0xffffffff
 	A_UINT32 enqueued_bitmap_msbs;
 
 	/* word 9 - filled in during tx completion */
-#define OL_FW_TX_DBG_PPDU_RATE_CODE_16        9
+#define OL_FW_TX_DBG_PPDU_RATE_CODE_WORD        9
 #define OL_FW_TX_DBG_PPDU_RATE_CODE_S         0
 #define OL_FW_TX_DBG_PPDU_RATE_CODE_M         0x000000ff
 	A_UINT8 rate_code;
-#define OL_FW_TX_DBG_PPDU_RATEFLAGS_16        9
+#define OL_FW_TX_DBG_PPDU_RATE_FLAGS_WORD        9
 #define OL_FW_TX_DBG_PPDU_RATE_FLAGS_S        8
 #define OL_FW_TX_DBG_PPDU_RATE_FLAGS_M        0x0000ff00
 	A_UINT8 rate_flags;     /* includes dynamic bandwidth info */
-#define OL_FW_TX_DBG_PPDU_TRIES_16            9
+#define OL_FW_TX_DBG_PPDU_TRIES_WORD            9
 #define OL_FW_TX_DBG_PPDU_TRIES_S             16
 #define OL_FW_TX_DBG_PPDU_TRIES_M             0x00ff0000
 	A_UINT8 tries;
-#define OL_FW_TX_DBG_PPDU_COMPLETE_16         9
+#define OL_FW_TX_DBG_PPDU_COMPLETE_WORD         9
 #define OL_FW_TX_DBG_PPDU_COMPLETE_S          24
 #define OL_FW_TX_DBG_PPDU_COMPLETE_M          0xff000000
 	A_UINT8 complete;

target/inc/targaddrs.h

@@ -70,7 +70,7 @@
 #define AR9888_HOST_INTEREST_ADDRESS    0x00400800
 #define AR900B_HOST_INTEREST_ADDRESS    0x00400800
 #define AR6320_HOST_INTEREST_ADDRESS    0x00400800
-#define QCA6180_HOST_INTEREST_ADDRESS   0x005d96a0
+#define QCA9377_HOST_INTEREST_ADDRESS   0x00400800
 #define AR6004_SOC_RESET_ADDRESS        0X00004000
 #define AR6004_SOC_RESET_CPU_INIT_RESET_MASK        0X00000800
 #if defined(AR6006_MEMORY_NEW_ARCH)
@@ -114,11 +114,11 @@ PREPACK64 struct host_interest_s {
 	/* Save SW ROM version */
 	A_UINT32 hi_sw_rom_version;     /* 0x0c */
 
-	/*
-	 * General-purpose flag bits, similar to SOC_OPTION_* flags.
-	 * Can be used by application rather than by OS.
-	 */
-	A_UINT32 hi_option_flag;        /* 0x10 */
+    /*
+     * General-purpose flag bits, similar to SOC_OPTION_* flags.
+     * Can be used by application rather than by OS.
+     */
+    volatile A_UINT32      hi_option_flag;                            /* 0x10 */
 
 	/*
 	 * Boolean that determines whether or not to
@@ -212,7 +212,7 @@ PREPACK64 struct host_interest_s {
 	A_UINT32 hi_acs_flags;  /* 0xc0 */
 	A_UINT32 hi_console_flags;      /* 0xc4 */
 	A_UINT32 hi_nvram_state;        /* 0xc8 */
-	A_UINT32 hi_option_flag2;       /* 0xcc */
+	volatile A_UINT32 hi_option_flag2;       /* 0xcc */
 
 	/* If non-zero, override values sent to Host in WMI_READY event. */
 	A_UINT32 hi_sw_version_override;        /* 0xd0 */
@@ -229,8 +229,8 @@ PREPACK64 struct host_interest_s {
 	/* location of CAL data */
 	A_UINT32 hi_cal_data;   /* 0xe4 */
 
-	/* Number of packet log buffers */
-	A_UINT32 hi_pktlog_num_buffers; /* 0xe8 */
+    /* Number of packet log buffers */
+    volatile A_UINT32      hi_pktlog_num_buffers;                     /* 0xe8 */
 
 	/* wow extension configuration */
 	A_UINT32 hi_wow_ext_config;     /* 0xec */
@@ -351,13 +351,21 @@ PREPACK64 struct host_interest_s {
 #define HI_OPTION_RF_KILL_SHIFT     0x2
 #define HI_OPTION_RF_KILL_MASK      0x1
 
+#define HI_OPTION_HTT_TGT_DEBUG_TX_COMPL_IDX 0x20
+
+#define HTT_TGT_DEBUG_TX_COMPL_IDX_VALUE()    \
+	((HOST_INTEREST->hi_option_flag2 & HI_OPTION_HTT_TGT_DEBUG_TX_COMPL_IDX))
+
 /* AR9888 1.0 only. Enable/disable CDC max perf support from host */
 #define HI_OPTION_DISABLE_CDC_MAX_PERF_WAR  0x20
 #define CDC_MAX_PERF_WAR_ENABLED()    \
 	(!(HOST_INTEREST->hi_option_flag2 & HI_OPTION_DISABLE_CDC_MAX_PERF_WAR))
-
-#define HI_OPTION_USE_EXT_LDO       0x40        /* use LDO27 for 1.1V instead of PMU */
-#define HI_OPTION_DBUART_SUPPORT    0x80        /* Enable uart debug support */
+#define HI_OPTION_USE_EXT_LDO       0x40 /* use LDO27 for 1.1V instead of PMU. */
+#define HI_OPTION_DBUART_SUPPORT    0x80 /* Enable uart debug support */
+/* This bit is to enable BE low latency for some customers.
+ * The side effect is TCP DL will be 8Mbps decreased (673Mbps -> 665Mbps).
+ */
+#define HI_OPTION_BE_LATENCY_OPTIMIZE    0x100
 #define HT_OPTION_GPIO_WAKEUP_SUPPORT    0x200 /* GPIO wake up support */
 #define GPIO_WAKEUP_ENABLED() \
 			 (HOST_INTEREST->hi_option_flag2 & HT_OPTION_GPIO_WAKEUP_SUPPORT)
@@ -406,20 +414,38 @@ PREPACK64 struct host_interest_s {
 #define HOST_ON_BE_CPU() \
 	(HOST_INTEREST->hi_be)
 
-/* AP nart no swap descriptor flag. Decsriptors are created on the target processor. */
+/* AP nart no swap descriptor flag. Decsriptors are created
+ * on the target processor.
+ */
 #define DESC_IN_FW() \
 	(HOST_INTEREST->hi_fw_swap & HI_DESC_IN_FW_BIT)
 
-#define HI_ACS_FLAGS_ENABLED        (1 << 0)    /* ACS is enabled */
-#define HI_ACS_FLAGS_USE_WWAN       (1 << 1)    /* Use physical WWAN device */
-#define HI_ACS_FLAGS_TEST_VAP       (1 << 2)    /* Use test VAP */
 
-#define HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET          (1 << 0)
-#define HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET       (1 << 1)
-#define HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE           (1 << 2)
-
-#define HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_FW_ACK       (1 << 16)
-#define HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_FW_ACK    (1 << 17)
+/* redefine for hi_acs_flags since no product ever use it
+ * NOTE:
+ *     This flag was only used in AR6004 for a customer project that has
+ *     been canceled, we are reusing it to avoid extending the Host interest
+ *     area.
+ * BIT Range  Meaning
+ * --------- ----------------------------------
+ *     0      HOST wants to swap MBOX usage
+ *     1      HOST supports HTT reduced tx completion
+ *     2      HOST supports HTT alternate credit size for data frames
+ *   15..3    reserved for HOST
+ *    16      FW set it before sending HTC_Ready to indicate MBOX swap is done
+ *    17      same as above but to indicate HTT reduced tx completion capability
+ *  31..18    reserved for FW
+ */
+/* HOST require to swap MBOX */
+#define HI_ACS_FLAGS_HOST_SWAP_MBOX     (1 << 0)
+/* HOST supports HTT reduced tx completion */
+#define HI_ACS_FLAGS_HOST_REDUCE_TX_COMPL (1 << 1)
+/* HOST supports alternate credit size for data frames */
+#define HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE (1 << 2)
+/* FW swapped MBOX */
+#define HI_ACS_FLAGS_FW_SWAPPED_MBOX    (1 << 16)
+/* FW support HTT reduced tx completion */
+#define HI_ACS_FLAGS_FW_REDUCE_TX_COMPL (1 << 17)
 
 /* CONSOLE FLAGS
  *
@@ -554,25 +580,25 @@ PREPACK64 struct host_interest_s {
 	(A_UINT32)((size_t)&((((struct host_interest_s *)(AR900B_HOST_INTEREST_ADDRESS))->item)))
 
 #define HOST_INTEREST_DBGLOG_IS_ENABLED() \
-	(!((volatile A_UINT32)HOST_INTEREST->hi_option_flag & HI_OPTION_DISABLE_DBGLOG))
+	(!(HOST_INTEREST->hi_option_flag & HI_OPTION_DISABLE_DBGLOG))
 
 #define HOST_INTEREST_PKTLOG_IS_ENABLED() \
-	(((volatile A_UINT32)HOST_INTEREST->hi_pktlog_num_buffers))
+	((HOST_INTEREST->hi_pktlog_num_buffers))
 
 #define HOST_INTEREST_PROFILE_IS_ENABLED() \
-	((volatile A_UINT32)HOST_INTEREST->hi_option_flag & HI_OPTION_ENABLE_PROFILE)
+	(HOST_INTEREST->hi_option_flag & HI_OPTION_ENABLE_PROFILE)
 
 #define LF_TIMER_STABILIZATION_IS_ENABLED() \
-	(!((volatile A_UINT32)HOST_INTEREST->hi_option_flag & HI_OPTION_NO_LFT_STBL))
+	(!(HOST_INTEREST->hi_option_flag & HI_OPTION_NO_LFT_STBL))
 
 #define IS_AMSDU_OFFLAOD_ENABLED() \
-	(((volatile A_UINT32)HOST_INTEREST->hi_option_flag2 & HI_OPTION_OFFLOAD_AMSDU))
+	((HOST_INTEREST->hi_option_flag2 & HI_OPTION_OFFLOAD_AMSDU))
 
 #define HOST_INTEREST_DFS_IS_ENABLED() \
-	(((volatile A_UINT32)HOST_INTEREST->hi_option_flag2 & HI_OPTION_DFS_SUPPORT))
+	((HOST_INTEREST->hi_option_flag2 & HI_OPTION_DFS_SUPPORT))
 
 #define HOST_INTEREST_EARLY_CFG_DONE() \
-	(((volatile A_UINT32)HOST_INTEREST->hi_option_flag2 & HI_OPTION_EARLY_CFG_DONE))
+	((HOST_INTEREST->hi_option_flag2 & HI_OPTION_EARLY_CFG_DONE))
 
 /*power save flag bit definitions*/
 #define HI_PWR_SAVE_LPL_ENABLED   0x1
@@ -615,14 +641,13 @@ PREPACK64 struct host_interest_s {
 
 #define HOST_INTEREST_ITEM_ADDRESS(TargetType, item) \
 	(((TargetType) == TARGET_TYPE_AR6002) ? AR6002_HOST_INTEREST_ITEM_ADDRESS(item) : \
-	 (((TargetType) == TARGET_TYPE_AR6003) ? AR6003_HOST_INTEREST_ITEM_ADDRESS(item) : \
-	  (((TargetType) == TARGET_TYPE_AR6004) ? AR6004_HOST_INTEREST_ITEM_ADDRESS(item) : \
-	   (((TargetType) == TARGET_TYPE_AR6006) ? AR6006_HOST_INTEREST_ITEM_ADDRESS(item) : \
-	    (((TargetType) == TARGET_TYPE_AR9888) ? AR9888_HOST_INTEREST_ITEM_ADDRESS(item) : \
-	    (((TargetType) == TARGET_TYPE_AR6320) ? AR6320_HOST_INTEREST_ITEM_ADDRESS(item) : \
-	    (((TargetType) == TARGET_TYPE_AR6320V2) ? AR6320_HOST_INTEREST_ITEM_ADDRESS(item) :	\
-	    (((TargetType) == TARGET_TYPE_AR900B) ? AR900B_HOST_INTEREST_ITEM_ADDRESS(item) : \
-	    0))))))))
+	(((TargetType) == TARGET_TYPE_AR6003) ? AR6003_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	(((TargetType) == TARGET_TYPE_AR6004) ? AR6004_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	(((TargetType) == TARGET_TYPE_AR6006) ? AR6006_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	(((TargetType) == TARGET_TYPE_AR9888) ? AR9888_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	(((TargetType) == TARGET_TYPE_AR6320) ? AR6320_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	(((TargetType) == TARGET_TYPE_AR900B) ? AR900B_HOST_INTEREST_ITEM_ADDRESS(item) : \
+	0)))))))
 
 #define AR6002_BOARD_DATA_SZ 768
 #define AR6002_BOARD_EXT_DATA_SZ 0
@@ -639,6 +664,8 @@ PREPACK64 struct host_interest_s {
 #define AR9888_BOARD_EXT_DATA_SZ 0
 #define AR6320_BOARD_DATA_SZ     8192
 #define AR6320_BOARD_EXT_DATA_SZ 0
+#define QCA9377_BOARD_DATA_SZ     8192
+#define QCA9377_BOARD_EXT_DATA_SZ 0
 #define AR900B_BOARD_DATA_SZ     7168
 #define AR900B_BOARD_EXT_DATA_SZ 0
 

target/inc/wal_rx_desc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2012, 2014 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2011-2012, 2014, 2016 The Linux Foundation. All rights reserved.
  *
  * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
  *
@@ -41,15 +41,31 @@
  *
  */
 #if !defined(ATH_PERF_PWR_OFFLOAD)
+#if defined(CONFIG_AR900B_SUPPORT) || defined(AR900B)
+#include <hw/interface/rx_location_info.h>
+#include <hw/interface/rx_pkt_end.h>
+#include <hw/interface/rx_phy_ppdu_end.h>
+#include <hw/interface/rx_timing_offset.h>
+#include <hw/interface/rx_location_info.h>
+#include <hw/tlv/rx_attention.h>
+#include <hw/tlv/rx_frag_info.h>
+#include <hw/tlv/rx_msdu_start.h>
+#include <hw/tlv/rx_msdu_end.h>
+#include <hw/tlv/rx_mpdu_start.h>
+#include <hw/tlv/rx_mpdu_end.h>
+#include <hw/tlv/rx_ppdu_start.h>
+#include <hw/tlv/rx_ppdu_end.h>
+#else
 /* HW rx descriptor definitions */
-#include <hw/mac_descriptors/rx_attention.h>
-#include <hw/mac_descriptors/rx_frag_info.h>
-#include <hw/mac_descriptors/rx_msdu_start.h>
-#include <hw/mac_descriptors/rx_msdu_end.h>
-#include <hw/mac_descriptors/rx_mpdu_start.h>
-#include <hw/mac_descriptors/rx_mpdu_end.h>
-#include <hw/mac_descriptors/rx_ppdu_start.h>
-#include <hw/mac_descriptors/rx_ppdu_end.h>
+#include <mac_descriptors/rx_attention.h>
+#include <mac_descriptors/rx_frag_info.h>
+#include <mac_descriptors/rx_msdu_start.h>
+#include <mac_descriptors/rx_msdu_end.h>
+#include <mac_descriptors/rx_mpdu_start.h>
+#include <mac_descriptors/rx_mpdu_end.h>
+#include <mac_descriptors/rx_ppdu_start.h>
+#include <mac_descriptors/rx_ppdu_end.h>
+#endif
 /*
  * This struct defines the basic descriptor information, which is
  * written by the 11ac HW MAC into the WAL's rx status descriptor
@@ -73,10 +89,13 @@ struct hw_rx_desc_base {
 struct fw_rx_desc_base {
 	union {
 		struct {
-			A_UINT8 discard : 1,
-				forward : 1,
-				any_err : 1,
-				dup_err : 1, reserved : 1, inspect : 1, extension : 2;
+			A_UINT8 discard:1,
+				forward:1,
+				any_err:1,
+				dup_err:1,
+				ipa_ind:1,
+				inspect:1,
+				extension:2;
 		} bits;
 		A_UINT8 val;
 	} u;
@@ -86,8 +105,8 @@ struct fw_rx_desc_base {
 #define FW_RX_DESC_DISCARD_S 0
 #define FW_RX_DESC_FORWARD_M 0x2
 #define FW_RX_DESC_FORWARD_S 1
-#define FW_RX_DESC_MIC_ERR_M 0x4
-#define FW_RX_DESC_MIC_ERR_S 2
+#define FW_RX_DESC_ANY_ERR_M 0x4
+#define FW_RX_DESC_ANY_ERR_S 2
 #define FW_RX_DESC_DUP_ERR_M 0x8
 #define FW_RX_DESC_DUP_ERR_S 3
 #define FW_RX_DESC_INSPECT_M 0x20
@@ -124,4 +143,98 @@ enum {
 #define FW_RX_DESC_EXT_SET(_var, _val) \
 	((_var) |= ((_val) << FW_RX_DESC_EXT_S))
 
+/*
+ * This struct defines TCP_CHKSUM_OFFLOAD bit fields which are needed by host.
+ */
+struct fw_rx_msdu_info {
+	union {
+	/*
+	* The "bits" struct defines the flags in fw_rx_msdu_info used
+	* during regular operation.
+	*/
+	struct {
+	A_UINT8 tcp_udp_chksum_fail:1, /* for tcp checksum offload use */
+		ip_chksum_fail:1,
+		ipv6_proto:1,
+		tcp_proto:1,
+		udp_proto:1,
+		ip_frag:1,
+		first_wakeup:1,
+		reserved:1;
+	} bits;
+	/*
+	 * The "mon" struct defines the flags in fw_rx_msdu_info used
+	 * during monitor mode.
+	 */
+	struct {
+		A_UINT8 last_frag:1,
+		reserved:7;
+	} mon;
+	A_UINT8     val;
+	} u;
+};
+
+/* regular operation flags */
+
+#define FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_M 0x1
+#define FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_S 0
+#define FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_M      0x2
+#define FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_S      1
+#define FW_RX_MSDU_INFO_IPV6_PROTO_M          0x4
+#define FW_RX_MSDU_INFO_IPV6_PROTO_S          2
+#define FW_RX_MSDU_INFO_TCP_PROTO_M           0x8
+#define FW_RX_MSDU_INFO_TCP_PROTO_S           3
+#define FW_RX_MSDU_INFO_UDP_PROTO_M           0x10
+#define FW_RX_MSDU_INFO_UDP_PROTO_S           4
+#define FW_RX_MSDU_INFO_IP_FRAG_M             0x20
+#define FW_RX_MSDU_INFO_IP_FRAG_S             5
+#define FW_RX_MSDU_INFO_FIRST_WAKEUP_M        0x40
+#define FW_RX_MSDU_INFO_FIRST_WAKEUP_S        6
+
+#define FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_GET(_var) \
+	(((_var) & FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_M) >> FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_S)
+#define FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_SET(_var, _val) \
+	((_var) |= ((_val) << FW_RX_MSDU_INFO_TCP_UDP_CHKSUM_FAIL_S))
+
+#define FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_GET(_var) \
+	(((_var) & FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_M) >> FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_S)
+#define FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_SET(_var, _val) \
+	((_var) |= ((_val) << FW_RX_MSDU_INFO_IP_CHKSUM_FAIL_S))
+
+#define FW_RX_MSDU_INFO_IPV6_PROTO_GET(_var) \
+	(((_var) & FW_RX_MSDU_INFO_IPV6_PROTO_M) >> FW_RX_MSDU_INFO_IPV6_PROTO_S)
+#define FW_RX_MSDU_INFO_IPV6_PROTO_SET(_var, _val) \
+	((_var) |= ((_val) << FW_RX_MSDU_INFO_IPV6_PROTO_S))
+
+#define FW_RX_MSDU_INFO_TCP_PROTO_GET(_var) \
+	(((_var) & FW_RX_MSDU_INFO_TCP_PROTO_M) >> FW_RX_MSDU_INFO_TCP_PROTO_S)
+#define FW_RX_MSDU_INFO_TCP_PROTO_SET(_var, _val) \
+	((_var) |= ((_val) << FW_RX_MSDU_INFO_TCP_PROTO_S))
+
+#define FW_RX_MSDU_INFO_UDP_PROTO_GET(_var) \
+	(((_var) & FW_RX_MSDU_INFO_UDP_PROTO_M) >> FW_RX_MSDU_INFO_UDP_PROTO_S)
+#define FW_RX_MSDU_INFO_UDP_PROTO_SET(_var, _val) \
+	((_var) |= ((_val) << FW_RX_MSDU_INFO_UDP_PROTO_S))
+
+#define FW_RX_MSDU_INFO_IP_FRAG_GET(_var) \
+	(((_var) & FW_RX_MSDU_INFO_IP_FRAG_M) >> FW_RX_MSDU_INFO_IP_FRAG_S)
+#define FW_RX_MSDU_INFO_IP_FRAG_SET(_var, _val) \
+	((_var) |= ((_val) << FW_RX_MSDU_INFO_IP_FRAG_S))
+
+#define FW_RX_MSDU_INFO_FIRST_WAKEUP_GET(_var) \
+	(((_var) & FW_RX_MSDU_INFO_FIRST_WAKEUP_M) >> FW_RX_MSDU_INFO_FIRST_WAKEUP_S)
+#define FW_RX_MSDU_INFO_FIRST_WAKEUP_SET(_var, _val) \
+	((_var) |= ((_val) << FW_RX_MSDU_INFO_FIRST_WAKEUP_S))
+
+
+/* monitor mode flags */
+
+#define FW_RX_MSDU_INFO_MON_LAST_FRAG_M       0x1
+#define FW_RX_MSDU_INFO_MON_LAST_FRAG_S       0
+
+
+#define FW_RX_MSDU_INFO_MON_LAST_FRAG_GET(_var) \
+	(((_var) & FW_RX_MSDU_INFO_MON_LAST_FRAG_M) >> FW_RX_MSDU_INFO_MON_LAST_FRAG_S)
+#define FW_RX_MSDU_INFO_MON_LAST_FRAG_SET(_var, _val) \
+	((_var) |= ((_val) << FW_RX_MSDU_INFO_MON_LAST_FRAG_S))
 #endif /* _WAL_RX_DESC__H_ */

target/inc/wlan_defs.h

@@ -25,12 +25,11 @@
  * to the Linux Foundation.
  */
 
-#ifndef __WLANDEFS_H__
-#define __WLANDEFS_H__
+#ifndef __WLAN_DEFS_H__
+#define __WLAN_DEFS_H__
 
 /* A_COMPILE_TIME_ASSERT */
 #include <a_osapi.h>
-#include <osdep.h>
 
 /*
  * This file contains WLAN definitions that may be used across both
@@ -74,7 +73,7 @@ typedef enum {
 	MODE_11AC_VHT20_2G = 11,
 	MODE_11AC_VHT40_2G = 12,
 	MODE_11AC_VHT80_2G = 13,
-#if CONFIG_160MHZ_SUPPORT != 0
+#if CONFIG_160MHZ_SUPPORT
 	MODE_11AC_VHT80_80 = 14,
 	MODE_11AC_VHT160   = 15,
 #endif
@@ -102,9 +101,15 @@ typedef enum {
 	/* MODE_UNKNOWN_11AX_SUPPORT = 24,*/ /* not needed? */
 	MODE_UNKNOWN_160MHZ_SUPPORT = MODE_UNKNOWN, /* not needed? */
 
+#ifdef ATHR_WIN_NWF
+	PHY_MODE_MAX    = MODE_UNKNOWN,
+	PHY_MODE_MAX_NO_160_MHZ_SUPPORT = MODE_UNKNOWN_NO_160MHZ_SUPPORT,
+	PHY_MODE_MAX_160_MHZ_SUPPORT    = MODE_UNKNOWN_160MHZ_SUPPORT,
+#else
 	MODE_MAX        = MODE_UNKNOWN,
 	MODE_MAX_NO_160_MHZ_SUPPORT = MODE_UNKNOWN_NO_160MHZ_SUPPORT,
 	MODE_MAX_160_MHZ_SUPPORT    = MODE_UNKNOWN_160MHZ_SUPPORT,
+#endif
 } WLAN_PHY_MODE;
 
 #if CONFIG_160MHZ_SUPPORT == 0
@@ -131,7 +136,7 @@ typedef enum {
 	WLAN_11AG_CAPABILITY = 3,
 } WLAN_CAPABILITY;
 
-#if defined(CONFIG_AR900B_SUPPORT) || defined(AR900B)
+#if (NUM_SPATIAL_STREAM > 3)
 #define A_RATEMASK A_UINT64
 #else
 #define A_RATEMASK A_UINT32
@@ -262,15 +267,6 @@ typedef struct {
 	A_UINT32 high_5ghz_chan;
 } HAL_REG_CAPABILITIES;
 
-typedef enum {
-	WHAL_REG_EXT_FCC_MIDBAND = 0,
-	WHAL_REG_EXT_JAPAN_MIDBAND = 1,
-	WHAL_REG_EXT_FCC_DFS_HT40 = 2,
-	WHAL_REG_EXT_JAPAN_NONDFS_HT40 = 3,
-	WHAL_REG_EXT_JAPAN_DFS_HT40 = 4,
-	WHAL_REG_EXT_FCC_CH_144 = 5,
-} WHAL_REG_EXT_BITMAP;
-
 /*
  * Used to update rate-control logic with the status of the tx-completion.
  * In host-based implementation of the rate-control feature, this struture is used to

target/inc/wmi_unified.h

@@ -122,7 +122,7 @@ extern "C" {
 	(((num_entries) / (32 / (bits_per_entry))) +            \
 	(((num_entries) % (32 / (bits_per_entry))) ? 1 : 0))
 
-static inline A_UINT32 wmi_packed_arr_get_bits(A_UINT32 *arr,
+static INLINE A_UINT32 wmi_packed_arr_get_bits(A_UINT32 *arr,
 			A_UINT32 entry_index, A_UINT32 bits_per_entry)
 {
 	A_UINT32 entries_per_uint = (32 / bits_per_entry);
@@ -134,7 +134,7 @@ static inline A_UINT32 wmi_packed_arr_get_bits(A_UINT32 *arr,
 		((1 << bits_per_entry) - 1);
 }
 
-static inline void wmi_packed_arr_set_bits(A_UINT32 *arr, A_UINT32 entry_index,
+static INLINE void wmi_packed_arr_set_bits(A_UINT32 *arr, A_UINT32 entry_index,
 			A_UINT32 bits_per_entry, A_UINT32 val)
 {
 	A_UINT32 entries_per_uint = (32 / bits_per_entry);