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disp: msm: sde: avoid pp-done wait during autorefresh disable case

From MDSS 9.x, the pp-done wait requirement as part of autorefresh
sequence is not required. Add a catalog flag to avoid the wait for
mdss 9.x+ and to support backward compatibility.

Change-Id: Ieca008d3d6ef0f7326b65433ef42ed9f49a94f87
Signed-off-by: Veera Sundaram Sankaran <[email protected]>
Veera Sundaram Sankaran il y a 4 ans
Parent
commit
5464d726ba
3 fichiers modifiés avec 26 ajouts et 14 suppressions
  1. 12 14
      msm/sde/sde_encoder_phys_cmd.c
  2. 1 0
      msm/sde/sde_hw_catalog.c
  3. 13 0
      msm/sde/sde_hw_catalog.h

+ 12 - 14
msm/sde/sde_encoder_phys_cmd.c

@@ -1708,13 +1708,10 @@ static void _sde_encoder_autorefresh_disable_seq1(
 	/*
 	 * If autorefresh is enabled, disable it and make sure it is safe to
 	 * proceed with current frame commit/push. Sequence fallowed is,
-	 * 1. Disable TE - caller will take care of it
-	 * 2. Disable autorefresh config
-	 * 4. Poll for frame transfer ongoing to be false
-	 * 5. Enable TE back - caller will take care of it
+	 * 1. Disable TE & autorefresh - caller will take care of it
+	 * 2. Poll for frame transfer ongoing to be false
+	 * 3. Enable TE back - caller will take care of it
 	 */
-	_sde_encoder_phys_cmd_config_autorefresh(phys_enc, 0);
-
 	do {
 		udelay(AUTOREFRESH_SEQ1_POLL_TIME);
 		if ((trial * AUTOREFRESH_SEQ1_POLL_TIME)
@@ -1806,13 +1803,10 @@ static void _sde_encoder_autorefresh_disable_seq2(
 static void sde_encoder_phys_cmd_prepare_commit(
 		struct sde_encoder_phys *phys_enc)
 {
-	struct sde_encoder_phys_cmd *cmd_enc =
-		to_sde_encoder_phys_cmd(phys_enc);
-
-	if (!phys_enc)
-		return;
+	struct sde_encoder_phys_cmd *cmd_enc = to_sde_encoder_phys_cmd(phys_enc);
+	struct sde_kms *sde_kms = phys_enc->sde_kms;
 
-	if (!sde_encoder_phys_cmd_is_master(phys_enc))
+	if (!phys_enc || !sde_encoder_phys_cmd_is_master(phys_enc))
 		return;
 
 	SDE_EVT32(DRMID(phys_enc->parent), phys_enc->intf_idx - INTF_0,
@@ -1822,8 +1816,12 @@ static void sde_encoder_phys_cmd_prepare_commit(
 		return;
 
 	sde_encoder_phys_cmd_connect_te(phys_enc, false);
-	_sde_encoder_autorefresh_disable_seq1(phys_enc);
-	_sde_encoder_autorefresh_disable_seq2(phys_enc);
+	_sde_encoder_phys_cmd_config_autorefresh(phys_enc, 0);
+	if (sde_kms && sde_kms->catalog &&
+			(sde_kms->catalog->autorefresh_disable_seq == AUTOREFRESH_DISABLE_SEQ1)) {
+		_sde_encoder_autorefresh_disable_seq1(phys_enc);
+		_sde_encoder_autorefresh_disable_seq2(phys_enc);
+	}
 	sde_encoder_phys_cmd_connect_te(phys_enc, true);
 
 	SDE_DEBUG_CMDENC(cmd_enc, "autorefresh disabled successfully\n");

+ 1 - 0
msm/sde/sde_hw_catalog.c

@@ -5114,6 +5114,7 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
 		set_bit(SDE_FEATURE_AVR_STEP, sde_cfg->features);
 		set_bit(SDE_FEATURE_VBIF_CLK_SPLIT, sde_cfg->features);
 		sde_cfg->allowed_dsc_reservation_switch = SDE_DP_DSC_RESERVATION_SWITCH;
+		sde_cfg->autorefresh_disable_seq = AUTOREFRESH_DISABLE_SEQ2;
 		sde_cfg->perf.min_prefill_lines = 40;
 		sde_cfg->vbif_qos_nlvl = 8;
 		sde_cfg->ts_prefill_rev = 2;

+ 13 - 0
msm/sde/sde_hw_catalog.h

@@ -1518,6 +1518,17 @@ struct sde_sc_cfg {
 	size_t llcc_slice_size;
 };
 
+/**
+ * autorefresh_disable_sequence - defines autorefresh disable sequences
+ * followed during bootup with continuous splash
+ * @AUTOREFRESH_DISABLE_SEQ1 - disable TE / disable autorefresh / Wait for tx-complete / enable TE
+ * @AUTOREFRESH_DISABLE_SEQ2 - disable TE / Disable autorefresh / enable TE
+ */
+enum autorefresh_disable_sequence {
+	AUTOREFRESH_DISABLE_SEQ1,
+	AUTOREFRESH_DISABLE_SEQ2,
+};
+
 /**
  * struct sde_perf_cfg - performance control settings
  * @max_bw_low         low threshold of maximum bandwidth (kbps)
@@ -1675,6 +1686,7 @@ struct sde_perf_cfg {
  * @pipe_order_type     indicates if it is required to specify pipe order
  * @csc_type            csc or csc_10bit support
  * @allowed_dsc_reservation_switch      intf to which dsc reservation switch is supported
+ * @autorefresh_disable_seq    indicates the autorefresh disable sequence; default is seq1
  * @sc_cfg              system cache configuration
  * @perf                performance control settings
  * @uidle_cfg           settings for uidle feature
@@ -1778,6 +1790,7 @@ struct sde_mdss_cfg {
 	u32 pipe_order_type;
 	u32 csc_type;
 	u32 allowed_dsc_reservation_switch;
+	enum autorefresh_disable_sequence autorefresh_disable_seq;
 	struct sde_sc_cfg sc_cfg[SDE_SYS_CACHE_MAX];
 	struct sde_perf_cfg perf;
 	struct sde_uidle_cfg uidle_cfg;