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qcacmn: Fix DSCP to TID map table

Add below fixes:
1. wifi3.0 only supports 2 HW DSCP to TID map tables.
   Check for supported number of tables before
   updating registers.
2. Do not overwrite previous DSCP TID config for
   different DSCP values while updating TID map
   for new DSCP value.

Change-Id: Icd8af1053fa48d3f1e2db317290f806cd41cd797
CRs-Fixed: 2091195
Om Prakash Tripathi 7 年之前
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5425c52aa0
共有 2 個文件被更改,包括 12 次插入2 次删除
  1. 2 1
      dp/wifi3.0/dp_main.c
  2. 10 1
      hal/wifi3.0/hal_tx.h

+ 2 - 1
dp/wifi3.0/dp_main.c

@@ -4428,7 +4428,8 @@ static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
 	struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
 	dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
 	pdev->dscp_tid_map[map_id][dscp] = tid;
-	hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
+	if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
+		hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
 			map_id, dscp);
 	return;
 }

+ 10 - 1
hal/wifi3.0/hal_tx.h

@@ -75,6 +75,7 @@ do {                                            \
 #define HAL_TX_COMPLETION_DESC_LEN_DWORDS (NUM_OF_DWORDS_WBM_RELEASE_RING)
 #define HAL_TX_COMPLETION_DESC_LEN_BYTES (NUM_OF_DWORDS_WBM_RELEASE_RING*4)
 #define HAL_TX_BITS_PER_TID 3
+#define HAL_TX_TID_BITS_MASK ((1 << HAL_TX_BITS_PER_TID) - 1)
 #define HAL_TX_NUM_DSCP_PER_REGISTER 10
 #define HAL_MAX_HW_DSCP_TID_MAPS 2
 
@@ -1033,6 +1034,7 @@ static inline void hal_tx_update_dscp_tid(void *hal_soc, uint8_t tid,
 	int index;
 	uint32_t addr;
 	uint32_t value;
+	uint32_t regval;
 
 	struct hal_soc *soc = (struct hal_soc *)hal_soc;
 
@@ -1049,8 +1051,15 @@ static inline void hal_tx_update_dscp_tid(void *hal_soc, uint8_t tid,
 	addr += 4 * (dscp/HAL_TX_NUM_DSCP_PER_REGISTER);
 	value = tid << (HAL_TX_BITS_PER_TID * index);
 
+	/* Read back previous DSCP TID config and update
+	 * with new config.
+	 */
+	regval = HAL_REG_READ(soc, addr);
+	regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index));
+	regval |= value;
+
 	HAL_REG_WRITE(soc, addr,
-			(value & HWIO_TCL_R0_DSCP_TID1_MAP_1_RMSK));
+			(regval & HWIO_TCL_R0_DSCP_TID1_MAP_1_RMSK));
 }
 
 /**