Merge "qcacmn: limit tx completion process count to napi quota"

dp/wifi3.0/dp_tx.c

@@ -5785,6 +5785,7 @@ uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
 	struct dp_srng *tx_comp_ring = &soc->tx_comp_ring[ring_id];
 	int max_reap_limit, ring_near_full;
 	uint32_t num_entries;
+	uint32_t rquota = quota;
 
 	DP_HIST_INIT();
 
@@ -5811,8 +5812,8 @@ more_data:
 		num_avail_for_reap = hal_srng_dst_num_valid(hal_soc,
 							    hal_ring_hdl, 0);
 
-	if (num_avail_for_reap >= quota)
-		num_avail_for_reap = quota;
+	if (num_avail_for_reap >= rquota)
+		num_avail_for_reap = rquota;
 
 	dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_avail_for_reap);
 	last_prefetched_hw_desc = dp_srng_dst_prefetch_32_byte_desc(hal_soc,
@@ -6000,8 +6001,10 @@ next_desc:
 	 *
 	 * One more loop will move the state to normal processing and yield
 	 */
-	if (ring_near_full)
+	if (ring_near_full && rquota) {
+		rquota -= num_processed;
 		goto more_data;
+	}
 
 	if (dp_tx_comp_enable_eol_data_check(soc)) {
 
@@ -6013,8 +6016,10 @@ next_desc:
 						  hal_ring_hdl)) {
 			DP_STATS_INC(soc, tx.hp_oos2, 1);
 			if (!hif_exec_should_yield(soc->hif_handle,
-						   int_ctx->dp_intr_id))
+						   int_ctx->dp_intr_id)) {
+				rquota -= num_processed;
 				goto more_data;
+			}
 
 			num_avail_for_reap =
 				hal_srng_dst_num_valid_locked(soc->hal_soc,
@@ -6024,6 +6029,7 @@ next_desc:
 					 (num_avail_for_reap >=
 					  num_entries >> 1))) {
 				DP_STATS_INC(soc, tx.near_full, 1);
+				rquota -= num_processed;
 				goto more_data;
 			}
 		}

wlan_cfg/wlan_init_cfg.h

@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -41,7 +41,7 @@
  * This mask defines how many transmit frames account for 1 NAPI work unit
  * 0 means each tx completion is 1 unit
  */
-#define DP_TX_NAPI_BUDGET_DIV_MASK 0
+#define DP_TX_NAPI_BUDGET_DIV_MASK 0xffff
 
 /* PPDU Stats Configuration - Configure bitmask for enabling tx ppdu tlv's */
 #define DP_PPDU_TXLITE_STATS_BITMASK_CFG 0x3FFF