disp: msm: sde: disable dest scaler on suspend event

Destination scaler hw can be enabled and disabled runtime for
sharpness only case through QDCM.

Customer is using shared DSI solution and issue scenario is:

1) DS0 configured and enabled for INTF1 display1.
2) Suspend commit is triggered with DS0 disable configuration but
   driver programming doesn't happen as crtc is not enabled.
   for customer case, GDSC is not turned off due to extra vote.
3) On resume commit on INTF1 display2 with different resolution,
   DS0 is not configured from userspace, but in HW,
   DS0 programming is retained.
4) Due to this retained programming, DSI underflow is seen in
   resume commit.

Add changes to disable dest scaler qseed opmode and merge ctrl
as part of cp crtc disable sequence.

Change-Id: Ibb39814e02870394da4c7c7318e6e2780fed9081
Signed-off-by: Jayaprakash Madisetty <[email protected]>

msm/sde/sde_crtc.c

@@ -2670,6 +2670,31 @@ static void _sde_crtc_dest_scaler_setup(struct drm_crtc *crtc)
 	}
 }
 
+static void sde_crtc_disable_dest_scaler(struct drm_crtc *crtc)
+{
+	struct sde_crtc *sde_crtc;
+	struct sde_crtc_state *cstate;
+	struct sde_hw_mixer *hw_lm;
+	struct sde_hw_ctl *hw_ctl;
+	struct sde_hw_ds *hw_ds;
+	int lm_idx;
+
+	sde_crtc = to_sde_crtc(crtc);
+	cstate = to_sde_crtc_state(crtc->state);
+
+	for (lm_idx = 0; lm_idx < sde_crtc->num_mixers; lm_idx++) {
+		hw_lm  = sde_crtc->mixers[lm_idx].hw_lm;
+		hw_ctl = sde_crtc->mixers[lm_idx].hw_ctl;
+		hw_ds  = sde_crtc->mixers[lm_idx].hw_ds;
+		if (hw_ds && hw_ds->ops.disable_dest_scl)
+			hw_ds->ops.disable_dest_scl(hw_ds);
+
+		if (hw_lm && hw_ctl && hw_ctl->ops.update_bitmask_mixer)
+			hw_ctl->ops.update_bitmask_mixer(
+					hw_ctl, hw_lm->idx, 1);
+	}
+}
+
 static void _sde_crtc_put_frame_data_buffer(struct sde_frame_data_buffer *buf)
 {
 	if (!buf)
@@ -8733,6 +8758,9 @@ static void sde_cp_crtc_apply_noise(struct drm_crtc *crtc,
 void sde_crtc_disable_cp_features(struct drm_crtc *crtc)
 {
 	sde_cp_disable_features(crtc);
+
+	if (!crtc->state->active)
+		sde_crtc_disable_dest_scaler(crtc);
 }
 
 void _sde_crtc_vm_release_notify(struct drm_crtc *crtc)

msm/sde/sde_hw_ds.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
@@ -14,6 +14,7 @@
 #define DEST_SCALER_OP_MODE     0x00
 #define DEST_SCALER_HW_VERSION  0x10
 #define DEST_SCALER_MERGE_CTRL  0x0C
+#define DEST_SCALER_QSEED3_OP_MODE  0x04
 
 #define DEST_SCALER_DUAL_PIPE   1
 #define DEST_SCALER_QUAD_PIPE   3
@@ -42,6 +43,8 @@ static void sde_hw_ds_setup_opmode_v1(struct sde_hw_ds *hw_ds, u32 op_mode)
 	if (op_mode & SDE_DS_OP_MODE_DUAL) {
 		op_mode = DEST_SCALER_DUAL_PIPE;
 		SDE_REG_WRITE(hw, DEST_SCALER_MERGE_CTRL + hw_ds->scl->base, op_mode);
+	} else if (!op_mode) {
+		SDE_REG_WRITE(hw, DEST_SCALER_MERGE_CTRL + hw_ds->scl->base, op_mode);
 	}
 }
 
@@ -76,13 +79,23 @@ static void sde_hw_ds_setup_scaler3(struct sde_hw_ds *hw_ds,
 			 sde_get_sde_format(DRM_FORMAT_XBGR2101010), de_lpf_en);
 }
 
+static void sde_hw_ds_disable_dest_scaler(struct sde_hw_ds *hw_ds)
+{
+	struct sde_hw_blk_reg_map *hw = &hw_ds->hw;
+
+	SDE_REG_WRITE(hw, hw_ds->scl->base + DEST_SCALER_MERGE_CTRL, 0x0);
+	SDE_REG_WRITE(hw, hw_ds->scl->base + DEST_SCALER_QSEED3_OP_MODE, 0x0);
+}
+
 static void _setup_ds_ops(struct sde_hw_ds_ops *ops, unsigned long features)
 {
 
-	if (test_bit(SDE_DS_MERGE_CTRL, &features))
+	if (test_bit(SDE_DS_MERGE_CTRL, &features)) {
 		ops->setup_opmode = sde_hw_ds_setup_opmode_v1;
-	else
+		ops->disable_dest_scl = sde_hw_ds_disable_dest_scaler;
+	} else {
 		ops->setup_opmode = sde_hw_ds_setup_opmode;
+	}
 
 	if (test_bit(SDE_SSPP_SCALER_QSEED3, &features) ||
 			test_bit(SDE_SSPP_SCALER_QSEED3LITE, &features))

msm/sde/sde_hw_ds.h

@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
@@ -57,6 +58,12 @@ struct sde_hw_ds_ops {
 	void (*setup_scaler)(struct sde_hw_ds *hw_ds,
 				void *scaler_cfg,
 				void *scaler_lut_cfg);
+
+	/**
+	 * disable_dest_scl - disable destination scaler hw block
+	 * @hw_ds          : Pointer to ds context
+	 */
+	void (*disable_dest_scl)(struct sde_hw_ds *hw_ds);
 };
 
 /**