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@@ -1068,21 +1068,21 @@ static struct cam_camnoc_specific
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.value = 1,
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},
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.qosgen_mainctl = {
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- .enable = true,
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+ .enable = false,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0x6008, /* IPE0_RD_QOSGEN_MAINCTL */
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.value = 0x2,
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},
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.qosgen_shaping_low = {
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- .enable = true,
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+ .enable = false,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0x6020, /* IPE0_RD_QOSGEN_SHAPING_LOW */
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.value = 0x29292929,
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},
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.qosgen_shaping_high = {
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- .enable = true,
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+ .enable = false,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0x6024, /* IPE0_RD_QOSGEN_SHAPING_HIGH */
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@@ -1132,21 +1132,21 @@ static struct cam_camnoc_specific
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.enable = false,
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},
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.qosgen_mainctl = {
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- .enable = true,
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+ .enable = false,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0x6608, /* IPE1_RD_QOSGEN_MAINCTL */
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.value = 0x2,
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},
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.qosgen_shaping_low = {
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- .enable = true,
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+ .enable = false,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0x6620, /* IPE1_RD_QOSGEN_SHAPING_LOW */
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.value = 0x29292929,
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},
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.qosgen_shaping_high = {
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- .enable = true,
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+ .enable = false,
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.access_type = CAM_REG_TYPE_READ_WRITE,
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.masked_value = 0,
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.offset = 0x6624, /* IPE1_RD_QOSGEN_SHAPING_HIGH */
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