msm: camera: csiphy: Enhance csiphy logs

Add csiphy_type in csiphy logs for better
debugging.

CRs-fixed: 3065435
Change-Id: I19c8154351e44946c14a4c94dd90d3b507a69cc8
Signed-off-by: Jigar Agrawal <[email protected]>

drivers/cam_sensor_module/cam_csiphy/cam_csiphy_core.c

@@ -124,8 +124,9 @@ static inline int cam_csiphy_release_from_reset_state(struct csiphy_device *csip
 	bool                                                 config_found = false;
 
 	if (!csiphy_dev || !csiphybase) {
-		CAM_ERR(CAM_CSIPHY, "Invalid input params: csiphy_dev: %p, csiphybase: %p",
-			csiphy_dev, csiphybase);
+		CAM_ERR(CAM_CSIPHY, "Invalid input params: csiphy_dev: %s, csiphybase: %s",
+			CAM_IS_NULL_TO_STR(csiphy_dev),
+			CAM_IS_NULL_TO_STR(csiphybase));
 		return -EINVAL;
 	}
 
@@ -1927,33 +1928,35 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
 		}
 
 		if (!csiphy_dev->acquire_count) {
-			g_phy_data[csiphy_dev->soc_info.index].is_3phase =
-					csiphy_acq_params.csiphy_3phase;
+			g_phy_data[soc_info->index].is_3phase = csiphy_acq_params.csiphy_3phase;
 			CAM_DBG(CAM_CSIPHY,
 					"g_csiphy data is updated for index: %d is_3phase: %u",
-					csiphy_dev->soc_info.index,
-					g_phy_data[csiphy_dev->soc_info.index].is_3phase);
+					soc_info->index,
+					g_phy_data[soc_info->index].is_3phase);
 		}
 
-		if (g_phy_data[csiphy_dev->soc_info.index].enable_aon_support) {
-			rc = cam_csiphy_util_update_aon_ops(true, csiphy_dev->soc_info.index);
+		if (g_phy_data[soc_info->index].enable_aon_support) {
+			rc = cam_csiphy_util_update_aon_ops(true, soc_info->index);
 			if (rc) {
 				CAM_ERR(CAM_CSIPHY,
 					"Error in setting up AON operation for phy_idx: %d, rc: %d",
-					csiphy_dev->soc_info.index, rc);
+					soc_info->index, rc);
 				goto release_mutex;
 			}
 		}
 
 		csiphy_dev->acquire_count++;
-		CAM_DBG(CAM_CSIPHY, "ACQUIRE_CNT: %d",
-			csiphy_dev->acquire_count);
 
 		if (csiphy_dev->csiphy_state == CAM_CSIPHY_INIT)
 			csiphy_dev->csiphy_state = CAM_CSIPHY_ACQUIRE;
 
 		CAM_INFO(CAM_CSIPHY,
-			"CAM_ACQUIRE_DEV: CSIPHY_IDX: %d", csiphy_dev->soc_info.index);
+			"CAM_ACQUIRE_DEV: %u Type: %s acquire_count: %d combo: %u cphy+dphy combo: %u",
+			soc_info->index,
+			g_phy_data[soc_info->index].is_3phase ? "CPHY" : "DPHY",
+			csiphy_dev->acquire_count,
+			csiphy_dev->combo_mode,
+			csiphy_dev->cphy_dphy_combo_mode);
 	}
 		break;
 	case CAM_QUERY_CAP: {
@@ -1972,7 +1975,6 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
 		int32_t offset, rc = 0;
 		struct cam_start_stop_dev_cmd config;
 
-		CAM_DBG(CAM_CSIPHY, "STOP_DEV CALLED");
 		rc = copy_from_user(&config, (void __user *)cmd->handle,
 					sizeof(config));
 		if (rc < 0) {
@@ -1982,7 +1984,7 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
 
 		if (csiphy_dev->csiphy_state != CAM_CSIPHY_START) {
 			CAM_ERR(CAM_CSIPHY, "Csiphy:%d Not in right state to stop : %d",
-				csiphy_dev->soc_info.index, csiphy_dev->csiphy_state);
+				soc_info->index, csiphy_dev->csiphy_state);
 			goto release_mutex;
 		}
 
@@ -1995,8 +1997,6 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
 		}
 
 		if (--csiphy_dev->start_dev_count) {
-			CAM_DBG(CAM_CSIPHY, "Stop Dev ref Cnt: %d",
-				csiphy_dev->start_dev_count);
 			if (csiphy_dev->csiphy_info[offset].secure_mode)
 				cam_csiphy_notify_secure_mode(
 					csiphy_dev,
@@ -2008,6 +2008,16 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
 				= 0;
 
 			cam_csiphy_update_lane(csiphy_dev, offset, false);
+
+			CAM_INFO(CAM_CSIPHY,
+				"CAM_STOP_PHYDEV: %d, Type: %s, dev_cnt: %u, slot: %d, Datarate: %llu, Settletime: %llu",
+				soc_info->index,
+				g_phy_data[soc_info->index].is_3phase ? "CPHY" : "DPHY",
+				csiphy_dev->start_dev_count,
+				offset,
+				csiphy_dev->csiphy_info[offset].data_rate,
+				csiphy_dev->csiphy_info[offset].settle_time);
+
 			goto release_mutex;
 		}
 
@@ -2041,12 +2051,13 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
 			rc = -EFAULT;
 		}
 
-		CAM_DBG(CAM_CSIPHY, "All PHY devices stopped");
 		csiphy_dev->csiphy_state = CAM_CSIPHY_ACQUIRE;
 
 		CAM_INFO(CAM_CSIPHY,
-			"CAM_STOP_PHYDEV: CSIPHY_IDX: %d, Device_slot: %d, Datarate: %llu, Settletime: %llu",
-			csiphy_dev->soc_info.index, offset,
+			"CAM_STOP_PHYDEV: %u, Type: %s, slot: %d, Datarate: %llu, Settletime: %llu",
+			soc_info->index,
+			g_phy_data[soc_info->index].is_3phase ? "CPHY" : "DPHY",
+			offset,
 			csiphy_dev->csiphy_info[offset].data_rate,
 			csiphy_dev->csiphy_info[offset].settle_time);
 	}
@@ -2055,8 +2066,6 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
 		int32_t offset;
 		struct cam_release_dev_cmd release;
 
-		CAM_DBG(CAM_CSIPHY, "RELEASE_DEV Called");
-
 		if (!csiphy_dev->acquire_count) {
 			CAM_ERR(CAM_CSIPHY, "No valid devices to release");
 			rc = -EINVAL;
@@ -2105,8 +2114,8 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
 
 		if (csiphy_dev->acquire_count == 0) {
 			CAM_DBG(CAM_CSIPHY, "All PHY devices released");
-			if (g_phy_data[csiphy_dev->soc_info.index].enable_aon_support) {
-				rc = cam_csiphy_util_update_aon_ops(false, csiphy_dev->soc_info.index);
+			if (g_phy_data[soc_info->index].enable_aon_support) {
+				rc = cam_csiphy_util_update_aon_ops(false, soc_info->index);
 				if (rc) {
 					CAM_WARN(CAM_CSIPHY,
 						"Error in releasing AON operation for phy_idx: %d, rc: %d",
@@ -2118,6 +2127,10 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
 			csiphy_dev->csiphy_state = CAM_CSIPHY_INIT;
 		}
 
+		CAM_DBG(CAM_CSIPHY, "CAM_RELEASE_PHYDEV: %u Type: %s",
+			soc_info->index,
+			g_phy_data[soc_info->index].is_3phase ? "CPHY" : "DPHY");
+
 		break;
 	}
 	case CAM_CONFIG_DEV: {
@@ -2226,6 +2239,19 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
 				cam_csiphy_reg_dump(&csiphy_dev->soc_info);
 
 			csiphy_dev->start_dev_count++;
+
+			CAM_INFO(CAM_CSIPHY,
+				"CAM_START_PHYDEV: %d, Type: %s, dev_cnt: %u, slot: %d, combo: %u, cphy+dphy: %u, sec_mode: %d, Datarate: %llu, Settletime: %llu",
+				soc_info->index,
+				g_phy_data[soc_info->index].is_3phase ? "CPHY" : "DPHY",
+				csiphy_dev->start_dev_count,
+				offset,
+				csiphy_dev->combo_mode,
+				csiphy_dev->cphy_dphy_combo_mode,
+				csiphy_dev->csiphy_info[offset].secure_mode,
+				csiphy_dev->csiphy_info[offset].data_rate,
+				csiphy_dev->csiphy_info[offset].settle_time);
+
 			goto release_mutex;
 		}
 
@@ -2281,7 +2307,7 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
 
 		cam_csiphy_release_from_reset_state(csiphy_dev, csiphybase, offset);
 
-		if (g_phy_data[csiphy_dev->soc_info.index].is_3phase && status_reg_ptr) {
+		if (g_phy_data[soc_info->index].is_3phase && status_reg_ptr) {
 			for (i = 0; i < CAM_CSIPHY_MAX_CPHY_LANES; i++) {
 				if (status_reg_ptr->cphy_lane_status[i]) {
 					cphy_trio_status = cam_io_r_mb(csiphybase +
@@ -2313,17 +2339,18 @@ int32_t cam_csiphy_core_cfg(void *phy_dev,
 		}
 
 		csiphy_dev->start_dev_count++;
-
-		CAM_DBG(CAM_CSIPHY, "START DEV CNT: %d",
-			csiphy_dev->start_dev_count);
 		csiphy_dev->csiphy_state = CAM_CSIPHY_START;
 
 		CAM_INFO(CAM_CSIPHY,
-			"CAM_START_PHYDEV: CSIPHY_IDX: %d, Device_slot: %d, cp_mode: %d, Datarate: %llu, Settletime: %llu",
-			csiphy_dev->soc_info.index, offset,
+			"CAM_START_PHYDEV: %d, Type: %s, slot: %d, sec_mode: %d, Datarate: %llu, Settletime: %llu, combo: %u, cphy+dphy: %u",
+			soc_info->index,
+			g_phy_data[soc_info->index].is_3phase ? "CPHY" : "DPHY",
+			offset,
 			csiphy_dev->csiphy_info[offset].secure_mode,
 			csiphy_dev->csiphy_info[offset].data_rate,
-			csiphy_dev->csiphy_info[offset].settle_time);
+			csiphy_dev->csiphy_info[offset].settle_time,
+			csiphy_dev->combo_mode,
+			csiphy_dev->cphy_dphy_combo_mode);
 	}
 		break;
 	case CAM_CONFIG_DEV_EXTERNAL: {

drivers/cam_utils/cam_debug_util.h

@@ -14,6 +14,8 @@ extern unsigned long long debug_mdl;
 extern unsigned int debug_type;
 extern unsigned int debug_priority;
 
+#define CAM_IS_NULL_TO_STR(ptr) ((ptr) ? "Non-NULL" : "NULL")
+
 /* Module IDs used for debug logging */
 enum cam_debug_module_id {
 	CAM_CDM,                 /* bit 0 */