disp: msm: dsi: update PHY configuration to support cphy
Add support to read cphy boolean flag from panel dtsi and configure DSI PHY registers accordingly. Update the bit/byte clock calculation according to cphy specifications. Update clock parents so that the relevant divider blocks are configured to support cphy. Change-Id: Iaca61eec01a488657b086f59910c52f8c79e26a4 Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org> Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
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@@ -1043,6 +1043,7 @@ static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
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{
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u32 val = 0;
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int rc = 0;
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bool panel_cphy_mode = false;
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rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
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if (!rc) {
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@@ -1068,6 +1069,11 @@ static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
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host->force_hs_clk_lane = utils->read_bool(utils->data,
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"qcom,mdss-dsi-force-clock-lane-hs");
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panel_cphy_mode = utils->read_bool(utils->data,
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"qcom,panel-cphy-mode");
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host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
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: DSI_PHY_TYPE_DPHY;
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return 0;
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}
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