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video: driver: handle static and dynamic properties for decoder

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Added change at decoder side to use adjust/set functions for
static(streamon) and dynamic(s_ctrl) cases.

Change-Id: I3d8c32baaf2fa2c3a077cc936a8ff2159ababfe3
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
This commit is contained in:
Govindaraj Rajagopal
2022-03-07 17:47:16 +05:30
parent c3bdea095b
commit 4f1180f1a6
9 changed files with 478 additions and 387 deletions
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228
driver/platform/diwali/src/msm_vidc_diwali.c
View File

@@ -425,8 +425,11 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = {
{SUPER_FRAME, ENC, H264|HEVC,
0, 32, 1, 0,
V4L2_CID_MPEG_VIDC_SUPERFRAME,
0},
V4L2_CID_MPEG_VIDC_SUPERFRAME, 0,
CAP_FLAG_NONE,
{0},
{INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT},
NULL, NULL},
{SLICE_INTERFACE, DEC, CODECS_ALL,
0, 0, 0, 0,
@@ -1405,26 +1408,80 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = {
1, V4L2_MPEG_MSM_VIDC_DISABLE,
V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, NULL},
{DISPLAY_DELAY, DEC, H264|HEVC|VP9,
0, 1, 1, 0,
V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, NULL},
{OUTPUT_ORDER, DEC, H264|HEVC|VP9,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
1, V4L2_MPEG_MSM_VIDC_DISABLE,
0,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT,
{THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE},
{0},
msm_vidc_adjust_output_order, msm_vidc_set_u32},
{INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_INPUT_PORT,
{0}, {0},
msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32},
{INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_INPUT_PORT,
{SUPER_FRAME}, {0},
msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32},
{OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_OUTPUT_PORT,
{0}, {0},
msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32},
{OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_OUTPUT_PORT,
{SUPER_FRAME}, {0},
msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32},
/* conceal color */
{CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1,
DEFAULT_VIDEO_CONCEAL_COLOR_BLACK,
V4L2_CID_MPEG_VIDEO_MUTE_YUV,
HFI_PROP_CONCEAL_COLOR_8BIT,
CAP_FLAG_OUTPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32_packed},
{CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1,
DEFAULT_VIDEO_CONCEAL_COLOR_BLACK,
V4L2_CID_MPEG_VIDEO_MUTE_YUV,
HFI_PROP_CONCEAL_COLOR_10BIT,
CAP_FLAG_OUTPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32_packed},
// TODO
{STAGE, DEC|ENC, CODECS_ALL,
@@ -1483,7 +1540,10 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = {
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
1, V4L2_MPEG_MSM_VIDC_DISABLE,
V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE,
HFI_PROP_THUMBNAIL_MODE},
HFI_PROP_THUMBNAIL_MODE,
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, msm_vidc_set_u32},
{DEFAULT_HEADER, DEC, CODECS_ALL,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
@@ -1498,7 +1558,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v0[] = {
HFI_PROP_DEC_START_FROM_RAP_FRAME,
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, NULL},
NULL, msm_vidc_set_u32},
{SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
@@ -1962,8 +2022,11 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = {
{SUPER_FRAME, ENC, H264|HEVC,
0, 32, 1, 0,
V4L2_CID_MPEG_VIDC_SUPERFRAME,
0},
V4L2_CID_MPEG_VIDC_SUPERFRAME, 0,
CAP_FLAG_NONE,
{0},
{INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT},
NULL, NULL},
{SLICE_INTERFACE, DEC, CODECS_ALL,
0, 0, 0, 0,
@@ -2941,26 +3004,80 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = {
1, V4L2_MPEG_MSM_VIDC_DISABLE,
V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, NULL},
{DISPLAY_DELAY, DEC, H264|HEVC|VP9,
0, 1, 1, 0,
V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, NULL},
{OUTPUT_ORDER, DEC, H264|HEVC|VP9,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
1, V4L2_MPEG_MSM_VIDC_DISABLE,
0,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT,
{THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE},
{0},
msm_vidc_adjust_output_order, msm_vidc_set_u32},
{INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_INPUT_PORT,
{0}, {0},
msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32},
{INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_INPUT_PORT,
{SUPER_FRAME}, {0},
msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32},
{OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_OUTPUT_PORT,
{0}, {0},
msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32},
{OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_OUTPUT_PORT,
{SUPER_FRAME}, {0},
msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32},
/* conceal color */
{CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1,
DEFAULT_VIDEO_CONCEAL_COLOR_BLACK,
V4L2_CID_MPEG_VIDEO_MUTE_YUV,
HFI_PROP_CONCEAL_COLOR_8BIT,
CAP_FLAG_OUTPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32_packed},
{CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1,
DEFAULT_VIDEO_CONCEAL_COLOR_BLACK,
V4L2_CID_MPEG_VIDEO_MUTE_YUV,
HFI_PROP_CONCEAL_COLOR_10BIT,
CAP_FLAG_OUTPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32_packed},
// TODO
{STAGE, DEC|ENC, CODECS_ALL,
@@ -3019,7 +3136,10 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = {
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
1, V4L2_MPEG_MSM_VIDC_DISABLE,
V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE,
HFI_PROP_THUMBNAIL_MODE},
HFI_PROP_THUMBNAIL_MODE,
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, msm_vidc_set_u32},
{DEFAULT_HEADER, DEC, CODECS_ALL,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
@@ -3034,7 +3154,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v1[] = {
HFI_PROP_DEC_START_FROM_RAP_FRAME,
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, NULL},
NULL, msm_vidc_set_u32},
{SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
@@ -3494,8 +3614,11 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = {
{SUPER_FRAME, ENC, H264|HEVC,
0, 32, 1, 0,
V4L2_CID_MPEG_VIDC_SUPERFRAME,
0},
V4L2_CID_MPEG_VIDC_SUPERFRAME, 0,
CAP_FLAG_NONE,
{0},
{INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT},
NULL, NULL},
{SLICE_INTERFACE, DEC, CODECS_ALL,
0, 0, 0, 0,
@@ -4468,26 +4591,80 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = {
1, V4L2_MPEG_MSM_VIDC_DISABLE,
V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, NULL},
{DISPLAY_DELAY, DEC, H264|HEVC|VP9,
0, 1, 1, 0,
V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, NULL},
{OUTPUT_ORDER, DEC, H264|HEVC|VP9,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
1, V4L2_MPEG_MSM_VIDC_DISABLE,
0,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT,
{THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE},
{0},
msm_vidc_adjust_output_order, msm_vidc_set_u32},
{INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_INPUT_PORT,
{0}, {0},
msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32},
{INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_INPUT_PORT,
{SUPER_FRAME}, {0},
msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32},
{OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_OUTPUT_PORT,
{0}, {0},
msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32},
{OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_OUTPUT_PORT,
{SUPER_FRAME}, {0},
msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32},
/* conceal color */
{CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1,
DEFAULT_VIDEO_CONCEAL_COLOR_BLACK,
V4L2_CID_MPEG_VIDEO_MUTE_YUV,
HFI_PROP_CONCEAL_COLOR_8BIT,
CAP_FLAG_OUTPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32_packed},
{CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1,
DEFAULT_VIDEO_CONCEAL_COLOR_BLACK,
V4L2_CID_MPEG_VIDEO_MUTE_YUV,
HFI_PROP_CONCEAL_COLOR_10BIT,
CAP_FLAG_OUTPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32_packed},
// TODO
{STAGE, DEC|ENC, CODECS_ALL,
@@ -4546,7 +4723,10 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = {
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
1, V4L2_MPEG_MSM_VIDC_DISABLE,
V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE,
HFI_PROP_THUMBNAIL_MODE},
HFI_PROP_THUMBNAIL_MODE,
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, msm_vidc_set_u32},
{DEFAULT_HEADER, DEC, CODECS_ALL,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
@@ -4561,7 +4741,7 @@ static struct msm_platform_inst_capability instance_data_diwali_v2[] = {
HFI_PROP_DEC_START_FROM_RAP_FRAME,
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, NULL},
NULL, msm_vidc_set_u32},
{SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,

92
driver/platform/kalama/src/msm_vidc_kalama.c
View File

@@ -343,8 +343,11 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
{SUPER_FRAME, ENC, H264|HEVC,
0, 32, 1, 0,
V4L2_CID_MPEG_VIDC_SUPERFRAME,
0},
V4L2_CID_MPEG_VIDC_SUPERFRAME, 0,
CAP_FLAG_NONE,
{0},
{INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT},
NULL, NULL},
{SLICE_INTERFACE, DEC, CODECS_ALL,
0, 0, 0, 0,
@@ -389,7 +392,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_DISABLE,
1, V4L2_MPEG_MSM_VIDC_DISABLE,
V4L2_CID_MPEG_VIDEO_HEVC_WITHOUT_STARTCODE,
HFI_PROP_NAL_LENGTH_FIELD},
HFI_PROP_NAL_LENGTH_FIELD,
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32},
{NAL_LENGTH_FIELD, ENC, CODECS_ALL,
V4L2_MPEG_VIDEO_HEVC_SIZE_0,
@@ -875,8 +881,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
{ENH_LAYER_COUNT, DEC, AV1,
0, MAX_OP_POINT, 1, 0,
0,
HFI_PROP_AV1_OP_POINT},
HFI_PROP_AV1_OP_POINT,
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32},
/*
* layer bitrate is treated as BIT_RATE cap sibling and
* is handled in bitrate adjust and set functions
@@ -1382,26 +1390,80 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
1, V4L2_MPEG_MSM_VIDC_DISABLE,
V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, NULL},
{DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1,
0, 1, 1, 0,
V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, NULL},
{OUTPUT_ORDER, DEC, H264|HEVC|VP9|AV1,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
1, V4L2_MPEG_MSM_VIDC_DISABLE,
0,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT,
{THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE},
{0},
msm_vidc_adjust_output_order, msm_vidc_set_u32},
{INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_INPUT_PORT,
{0}, {0},
msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32},
{INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_INPUT_PORT,
{SUPER_FRAME}, {0},
msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32},
{OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_OUTPUT_PORT,
{0}, {0},
msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32},
{OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_OUTPUT_PORT,
{SUPER_FRAME}, {0},
msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32},
/* conceal color */
{CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1,
DEFAULT_VIDEO_CONCEAL_COLOR_BLACK,
V4L2_CID_MPEG_VIDEO_MUTE_YUV,
HFI_PROP_CONCEAL_COLOR_8BIT,
CAP_FLAG_OUTPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32_packed},
{CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1,
DEFAULT_VIDEO_CONCEAL_COLOR_BLACK,
V4L2_CID_MPEG_VIDEO_MUTE_YUV,
HFI_PROP_CONCEAL_COLOR_10BIT,
CAP_FLAG_OUTPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32_packed},
// TODO
{STAGE, DEC|ENC, CODECS_ALL,
@@ -1460,7 +1522,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
1, V4L2_MPEG_MSM_VIDC_DISABLE,
V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE,
HFI_PROP_THUMBNAIL_MODE},
HFI_PROP_THUMBNAIL_MODE,
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, msm_vidc_set_u32},
{DEFAULT_HEADER, DEC, CODECS_ALL,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
@@ -1475,7 +1540,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
HFI_PROP_DEC_START_FROM_RAP_FRAME,
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, NULL},
NULL, msm_vidc_set_u32},
{SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
@@ -1521,7 +1586,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
{DRAP, DEC, AV1,
0, S32_MAX, 1, 0,
0,
HFI_PROP_AV1_DRAP_CONFIG},
HFI_PROP_AV1_DRAP_CONFIG,
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32},
{META_BITSTREAM_RESOLUTION, DEC, AV1,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,

76
driver/platform/waipio/src/msm_vidc_waipio.c
View File

@@ -303,8 +303,11 @@ static struct msm_platform_inst_capability instance_data_waipio[] = {
{SUPER_FRAME, ENC, H264|HEVC,
0, 32, 1, 0,
V4L2_CID_MPEG_VIDC_SUPERFRAME,
0},
V4L2_CID_MPEG_VIDC_SUPERFRAME, 0,
CAP_FLAG_NONE,
{0},
{INPUT_BUF_HOST_MAX_COUNT, OUTPUT_BUF_HOST_MAX_COUNT},
NULL, NULL},
{SLICE_INTERFACE, DEC, CODECS_ALL,
0, 0, 0, 0,
@@ -1277,26 +1280,80 @@ static struct msm_platform_inst_capability instance_data_waipio[] = {
1, V4L2_MPEG_MSM_VIDC_DISABLE,
V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, NULL},
{DISPLAY_DELAY, DEC, H264|HEVC|VP9,
0, 1, 1, 0,
V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, NULL},
{OUTPUT_ORDER, DEC, H264|HEVC|VP9,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
1, V4L2_MPEG_MSM_VIDC_DISABLE,
0,
HFI_PROP_DECODE_ORDER_OUTPUT,
CAP_FLAG_INPUT_PORT,
{THUMBNAIL_MODE, DISPLAY_DELAY, DISPLAY_DELAY_ENABLE},
{0},
msm_vidc_adjust_output_order, msm_vidc_set_u32},
{INPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_INPUT_PORT,
{0}, {0},
msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32},
{INPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_INPUT_PORT,
{SUPER_FRAME}, {0},
msm_vidc_adjust_input_buf_host_max_count, msm_vidc_set_u32},
{OUTPUT_BUF_HOST_MAX_COUNT, ENC|DEC, CODECS_ALL,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_OUTPUT_PORT,
{0}, {0},
msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32},
{OUTPUT_BUF_HOST_MAX_COUNT, ENC, H264|HEVC,
DEFAULT_MAX_HOST_BUF_COUNT, DEFAULT_MAX_HOST_BURST_BUF_COUNT,
1, DEFAULT_MAX_HOST_BUF_COUNT,
0,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
CAP_FLAG_OUTPUT_PORT,
{SUPER_FRAME}, {0},
msm_vidc_adjust_output_buf_host_max_count, msm_vidc_set_u32},
/* conceal color */
{CONCEAL_COLOR_8BIT, DEC, CODECS_ALL, 0x0, 0xff3fcff, 1,
DEFAULT_VIDEO_CONCEAL_COLOR_BLACK,
V4L2_CID_MPEG_VIDEO_MUTE_YUV,
HFI_PROP_CONCEAL_COLOR_8BIT,
CAP_FLAG_OUTPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32_packed},
{CONCEAL_COLOR_10BIT, DEC, CODECS_ALL, 0x0, 0x3fffffff, 1,
DEFAULT_VIDEO_CONCEAL_COLOR_BLACK,
V4L2_CID_MPEG_VIDEO_MUTE_YUV,
HFI_PROP_CONCEAL_COLOR_10BIT,
CAP_FLAG_OUTPUT_PORT},
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32_packed},
// TODO
{STAGE, DEC|ENC, CODECS_ALL,
@@ -1355,7 +1412,10 @@ static struct msm_platform_inst_capability instance_data_waipio[] = {
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
1, V4L2_MPEG_MSM_VIDC_DISABLE,
V4L2_CID_MPEG_VIDC_THUMBNAIL_MODE,
HFI_PROP_THUMBNAIL_MODE},
HFI_PROP_THUMBNAIL_MODE,
CAP_FLAG_INPUT_PORT,
{0}, {OUTPUT_ORDER},
NULL, msm_vidc_set_u32},
{DEFAULT_HEADER, DEC, CODECS_ALL,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
@@ -1370,7 +1430,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = {
HFI_PROP_DEC_START_FROM_RAP_FRAME,
CAP_FLAG_INPUT_PORT,
{0}, {0},
NULL, NULL},
NULL, msm_vidc_set_u32},
{SEQ_CHANGE_AT_SYNC_FRAME, DEC, CODECS_ALL,
V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,

5
driver/vidc/inc/msm_vidc_control.h
View File

@@ -25,6 +25,9 @@ int msm_vidc_adjust_use_ltr(void *instance, struct v4l2_ctrl *ctrl);
int msm_vidc_adjust_mark_ltr(void *instance, struct v4l2_ctrl *ctrl);
int msm_vidc_adjust_ir_random(void *instance, struct v4l2_ctrl *ctrl);
int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl);
int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl);
int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl);
int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl);
int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl);
int msm_vidc_adjust_chroma_qp_index_offset(void *instance,
struct v4l2_ctrl *ctrl);
@@ -76,6 +79,8 @@ int msm_vidc_set_dynamic_layer_bitrate(void *instance,
enum msm_vidc_inst_capability_type cap_id);
int msm_vidc_set_u32(void *instance,
enum msm_vidc_inst_capability_type cap_id);
int msm_vidc_set_u32_packed(void *instance,
enum msm_vidc_inst_capability_type cap_id);
int msm_vidc_set_u32_enum(void *instance,
enum msm_vidc_inst_capability_type cap_id);
int msm_vidc_set_constant_quality(void *instance,

3
driver/vidc/inc/msm_vidc_internal.h
View File

@@ -502,6 +502,9 @@ enum msm_vidc_inst_capability_type {
BITRATE_BOOST,
SLICE_MODE,
BLUR_RESOLUTION,
OUTPUT_ORDER,
INPUT_BUF_HOST_MAX_COUNT,
OUTPUT_BUF_HOST_MAX_COUNT,
/* place all leaf(no child) enums before this line */
INST_CAP_MAX,

317
driver/vidc/src/msm_vdec.c
View File

@@ -659,317 +659,6 @@ static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst)
return rc;
}
static int msm_vdec_set_output_order(struct msm_vidc_inst *inst,
enum msm_vidc_port_type port)
{
int rc = 0;
u32 output_order = 0;
if (port != INPUT_PORT) {
i_vpr_e(inst, "%s: invalid port %d\n", __func__, port);
return -EINVAL;
}
if (inst->capabilities->cap[THUMBNAIL_MODE].value ||
(inst->capabilities->cap[DISPLAY_DELAY_ENABLE].value &&
!inst->capabilities->cap[DISPLAY_DELAY].value))
output_order = 1;
i_vpr_h(inst, "%s: output order: %d", __func__, output_order);
rc = venus_hfi_session_property(inst,
HFI_PROP_DECODE_ORDER_OUTPUT,
HFI_HOST_FLAGS_NONE,
get_hfi_port(inst, port),
HFI_PAYLOAD_U32,
&output_order,
sizeof(u32));
if (rc) {
i_vpr_e(inst, "%s: set property failed\n", __func__);
return rc;
}
return rc;
}
static int msm_vdec_set_rap_frame(struct msm_vidc_inst *inst,
enum msm_vidc_port_type port)
{
int rc = 0;
u32 rap_frame = true;
if (port != INPUT_PORT) {
i_vpr_e(inst, "%s: invalid port %d\n", __func__, port);
return -EINVAL;
}
rap_frame = inst->capabilities->cap[RAP_FRAME].value;
i_vpr_h(inst, "%s: start from rap frame: %d", __func__, rap_frame);
rc = venus_hfi_session_property(inst,
HFI_PROP_DEC_START_FROM_RAP_FRAME,
HFI_HOST_FLAGS_NONE,
get_hfi_port(inst, port),
HFI_PAYLOAD_U32,
&rap_frame,
sizeof(u32));
if (rc) {
i_vpr_e(inst, "%s: set property failed\n", __func__);
return rc;
}
return rc;
}
static int msm_vdec_set_thumbnail_mode(struct msm_vidc_inst *inst,
enum msm_vidc_port_type port)
{
int rc = 0;
u32 thumbnail_mode = 0;
if (port != INPUT_PORT) {
i_vpr_e(inst, "%s: invalid port %d\n", __func__, port);
return -EINVAL;
}
thumbnail_mode = inst->capabilities->cap[THUMBNAIL_MODE].value;
i_vpr_h(inst, "%s: thumbnail mode: %d", __func__, thumbnail_mode);
rc = venus_hfi_session_property(inst,
HFI_PROP_THUMBNAIL_MODE,
HFI_HOST_FLAGS_NONE,
get_hfi_port(inst, port),
HFI_PAYLOAD_U32,
&thumbnail_mode,
sizeof(u32));
if (rc) {
i_vpr_e(inst, "%s: set property failed\n", __func__);
return rc;
}
return rc;
}
static int msm_vdec_set_conceal_color_8bit(struct msm_vidc_inst *inst,
enum msm_vidc_port_type port)
{
int rc = 0;
u32 conceal_color_8bit;
if (port != INPUT_PORT) {
i_vpr_e(inst, "%s: invalid port %d\n", __func__, port);
return -EINVAL;
}
conceal_color_8bit = inst->capabilities->cap[CONCEAL_COLOR_8BIT].value;
i_vpr_h(inst, "%s: conceal color 8bit: %#x",
__func__, conceal_color_8bit);
rc = venus_hfi_session_property(inst,
HFI_PROP_CONCEAL_COLOR_8BIT,
HFI_HOST_FLAGS_NONE,
get_hfi_port(inst, port),
HFI_PAYLOAD_32_PACKED,
&conceal_color_8bit,
sizeof(u32));
if (rc) {
i_vpr_e(inst, "%s: set property failed\n", __func__);
return rc;
}
return rc;
}
static int msm_vdec_set_conceal_color_10bit(struct msm_vidc_inst *inst,
enum msm_vidc_port_type port)
{
int rc = 0;
u32 conceal_color_10bit;
if (port != INPUT_PORT) {
i_vpr_e(inst, "%s: invalid port %d\n", __func__, port);
return -EINVAL;
}
conceal_color_10bit = inst->capabilities->cap[CONCEAL_COLOR_10BIT].value;
i_vpr_h(inst, "%s: conceal color 10bit: %#x",
__func__, conceal_color_10bit);
rc = venus_hfi_session_property(inst,
HFI_PROP_CONCEAL_COLOR_10BIT,
HFI_HOST_FLAGS_NONE,
get_hfi_port(inst, port),
HFI_PAYLOAD_32_PACKED,
&conceal_color_10bit,
sizeof(u32));
if (rc) {
i_vpr_e(inst, "%s: set property failed\n", __func__);
return rc;
}
return rc;
}
static int msm_vdec_set_host_max_buf_count(struct msm_vidc_inst *inst,
enum msm_vidc_port_type port)
{
int rc = 0;
u32 count = DEFAULT_MAX_HOST_BUF_COUNT;
if (is_image_session(inst))
count = DEFAULT_MAX_HOST_BURST_BUF_COUNT;
i_vpr_h(inst, "%s: count: %u port: %u\n", __func__, count, port);
rc = venus_hfi_session_property(inst,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
HFI_HOST_FLAGS_NONE,
get_hfi_port(inst, port),
HFI_PAYLOAD_U32,
&count,
sizeof(u32));
if (rc) {
i_vpr_e(inst, "%s: set property failed\n", __func__);
return rc;
}
return 0;
}
static int msm_vdec_set_av1_bitstream_format(struct msm_vidc_inst *inst,
enum msm_vidc_port_type port)
{
int rc = 0;
u32 annex_b;
if (inst->codec != MSM_VIDC_AV1)
return 0;
if (inst->capabilities->cap[WITHOUT_STARTCODE].value) {
i_vpr_e(inst,
"%s: Annex-B format is not supported\n", __func__);
return -EINVAL;
}
annex_b = 0;
i_vpr_h(inst, "%s: annex_b: %u\n", __func__, annex_b);
rc = venus_hfi_session_property(inst,
HFI_PROP_NAL_LENGTH_FIELD,
HFI_HOST_FLAGS_NONE,
get_hfi_port(inst, port),
HFI_PAYLOAD_U32,
&annex_b,
sizeof(u32));
if (rc) {
i_vpr_e(inst, "%s: set property failed\n", __func__);
return rc;
}
return rc;
}
static int msm_vdec_set_av1_operating_point(struct msm_vidc_inst *inst,
enum msm_vidc_port_type port)
{
int rc = 0;
u32 op_point;
if (inst->codec != MSM_VIDC_AV1)
return 0;
op_point = inst->capabilities->cap[ENH_LAYER_COUNT].value;
i_vpr_h(inst, "%s: op_point: %u\n", __func__, op_point);
rc = venus_hfi_session_property(inst,
HFI_PROP_AV1_OP_POINT,
HFI_HOST_FLAGS_NONE,
get_hfi_port(inst, port),
HFI_PAYLOAD_U32,
&op_point,
sizeof(u32));
if (rc) {
i_vpr_e(inst, "%s: set property failed\n", __func__);
return rc;
}
return rc;
}
static int msm_vdec_set_av1_drap_config(struct msm_vidc_inst *inst,
enum msm_vidc_port_type port)
{
int rc = 0;
u32 drap_config;
if (inst->codec != MSM_VIDC_AV1)
return 0;
drap_config = inst->capabilities->cap[DRAP].value;
i_vpr_h(inst, "%s: drap_config: %u\n", __func__, drap_config);
rc = venus_hfi_session_property(inst,
HFI_PROP_AV1_DRAP_CONFIG,
HFI_HOST_FLAGS_NONE,
get_hfi_port(inst, port),
HFI_PAYLOAD_U32,
&drap_config,
sizeof(u32));
if (rc) {
i_vpr_e(inst, "%s: set property failed\n", __func__);
return rc;
}
return rc;
}
static int msm_vdec_set_input_properties(struct msm_vidc_inst *inst)
{
int rc = 0;
if (!inst) {
d_vpr_e("%s: invalid params\n", __func__);
return -EINVAL;
}
rc = msm_vidc_set_stage(inst, STAGE);
if (rc)
return rc;
rc = msm_vidc_set_pipe(inst, PIPE);
if (rc)
return rc;
rc = msm_vdec_set_output_order(inst, INPUT_PORT);
if (rc)
return rc;
rc = msm_vdec_set_thumbnail_mode(inst, INPUT_PORT);
if (rc)
return rc;
rc = msm_vdec_set_rap_frame(inst, INPUT_PORT);
if (rc)
return rc;
rc = msm_vdec_set_conceal_color_8bit(inst, INPUT_PORT);
if (rc)
return rc;
rc = msm_vdec_set_conceal_color_10bit(inst, INPUT_PORT);
if (rc)
return rc;
rc = msm_vdec_set_host_max_buf_count(inst, INPUT_PORT);
if (rc)
return rc;
rc = msm_vdec_set_av1_bitstream_format(inst, INPUT_PORT);
if (rc)
return rc;
rc = msm_vdec_set_av1_operating_point(inst, INPUT_PORT);
if (rc)
return rc;
rc = msm_vdec_set_av1_drap_config(inst, INPUT_PORT);
if (rc)
return rc;
return rc;
}
static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst)
{
int rc = 0;
@@ -991,10 +680,6 @@ static int msm_vdec_set_output_properties(struct msm_vidc_inst *inst)
if (rc)
return rc;
rc = msm_vdec_set_host_max_buf_count(inst, OUTPUT_PORT);
if (rc)
return rc;
rc = msm_vidc_set_session_priority(inst, PRIORITY);
if (rc)
return rc;
@@ -1730,7 +1415,7 @@ int msm_vdec_streamon_input(struct msm_vidc_inst *inst)
if (rc)
goto error;
rc = msm_vdec_set_input_properties(inst);
rc = msm_vidc_adjust_set_v4l2_properties(inst);
if (rc)
goto error;

26
driver/vidc/src/msm_venc.c
View File

@@ -22,14 +22,12 @@ static const u32 msm_venc_input_set_prop[] = {
HFI_PROP_COLOR_FORMAT,
HFI_PROP_RAW_RESOLUTION,
HFI_PROP_LINEAR_STRIDE_SCANLINE,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
HFI_PROP_SIGNAL_COLOR_INFO,
};
static const u32 msm_venc_output_set_prop[] = {
HFI_PROP_BITSTREAM_RESOLUTION,
HFI_PROP_CROP_OFFSETS,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
HFI_PROP_CSC,
};
@@ -287,28 +285,6 @@ static int msm_venc_set_crop_offsets(struct msm_vidc_inst *inst,
return 0;
}
static int msm_venc_set_host_max_buf_count(struct msm_vidc_inst *inst,
enum msm_vidc_port_type port)
{
int rc = 0;
u32 count = DEFAULT_MAX_HOST_BUF_COUNT;
if (msm_vidc_is_super_buffer(inst) || is_image_session(inst))
count = DEFAULT_MAX_HOST_BURST_BUF_COUNT;
i_vpr_h(inst, "%s: count: %u port: %u\n", __func__, count, port);
rc = venus_hfi_session_property(inst,
HFI_PROP_BUFFER_HOST_MAX_COUNT,
HFI_HOST_FLAGS_NONE,
get_hfi_port(inst, port),
HFI_PAYLOAD_U32,
&count,
sizeof(u32));
if (rc)
return rc;
return 0;
}
static int msm_venc_set_colorspace(struct msm_vidc_inst* inst,
enum msm_vidc_port_type port)
{
@@ -456,7 +432,6 @@ static int msm_venc_set_input_properties(struct msm_vidc_inst *inst)
{HFI_PROP_COLOR_FORMAT, msm_venc_set_colorformat },
{HFI_PROP_RAW_RESOLUTION, msm_venc_set_raw_resolution },
{HFI_PROP_LINEAR_STRIDE_SCANLINE, msm_venc_set_stride_scanline },
{HFI_PROP_BUFFER_HOST_MAX_COUNT, msm_venc_set_host_max_buf_count },
{HFI_PROP_SIGNAL_COLOR_INFO, msm_venc_set_colorspace },
};
@@ -493,7 +468,6 @@ static int msm_venc_set_output_properties(struct msm_vidc_inst *inst)
static const struct msm_venc_prop_type_handle prop_type_handle_arr[] = {
{HFI_PROP_BITSTREAM_RESOLUTION, msm_venc_set_bitstream_resolution },
{HFI_PROP_CROP_OFFSETS, msm_venc_set_crop_offsets },
{HFI_PROP_BUFFER_HOST_MAX_COUNT, msm_venc_set_host_max_buf_count },
{HFI_PROP_CSC, msm_venc_set_csc },
};

115
driver/vidc/src/msm_vidc_control.c
View File

@@ -1071,6 +1071,7 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl)
struct msm_vidc_inst *inst;
enum msm_vidc_inst_capability_type cap_id;
struct msm_vidc_inst_capability *capability;
u32 port;
if (!ctrl) {
d_vpr_e("%s: invalid ctrl parameter\n", __func__);
@@ -1113,7 +1114,9 @@ int msm_v4l2_op_s_ctrl(struct v4l2_ctrl *ctrl)
/* mark client set flag */
capability->cap[cap_id].flags |= CAP_FLAG_CLIENT_SET;
if (!inst->bufq[OUTPUT_PORT].vb2q->streaming) {
port = is_encode_session(inst) ? OUTPUT_PORT : INPUT_PORT;
if (!inst->bufq[port].vb2q->streaming) {
/* static case */
rc = msm_vidc_update_static_property(inst, cap_id, ctrl);
if (rc)
@@ -1449,6 +1452,87 @@ int msm_vidc_adjust_delta_based_rc(void *instance, struct v4l2_ctrl *ctrl)
return 0;
}
int msm_vidc_adjust_output_order(void *instance, struct v4l2_ctrl *ctrl)
{
struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance;
struct msm_vidc_inst_capability *capability;
s32 tn_mode = -1, display_delay = -1, display_delay_enable = -1;
u32 adjusted_value;
if (!inst || !inst->capabilities) {
d_vpr_e("%s: invalid params\n", __func__);
return -EINVAL;
}
capability = inst->capabilities;
adjusted_value = ctrl ? ctrl->val :
capability->cap[OUTPUT_ORDER].value;
if (msm_vidc_get_parent_value(inst, OUTPUT_ORDER, THUMBNAIL_MODE,
&tn_mode, __func__) ||
msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY,
&display_delay, __func__) ||
msm_vidc_get_parent_value(inst, OUTPUT_ORDER, DISPLAY_DELAY_ENABLE,
&display_delay_enable, __func__))
return -EINVAL;
if (tn_mode || (display_delay_enable && !display_delay))
adjusted_value = 1;
msm_vidc_update_cap_value(inst, OUTPUT_ORDER,
adjusted_value, __func__);
return 0;
}
int msm_vidc_adjust_input_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl)
{
struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance;
struct msm_vidc_inst_capability *capability;
u32 adjusted_value;
if (!inst || !inst->capabilities) {
d_vpr_e("%s: invalid params\n", __func__);
return -EINVAL;
}
capability = inst->capabilities;
adjusted_value = ctrl ? ctrl->val :
capability->cap[INPUT_BUF_HOST_MAX_COUNT].value;
if (msm_vidc_is_super_buffer(inst) || is_image_session(inst))
adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT;
msm_vidc_update_cap_value(inst, INPUT_BUF_HOST_MAX_COUNT,
adjusted_value, __func__);
return 0;
}
int msm_vidc_adjust_output_buf_host_max_count(void *instance, struct v4l2_ctrl *ctrl)
{
struct msm_vidc_inst *inst = (struct msm_vidc_inst *) instance;
struct msm_vidc_inst_capability *capability;
u32 adjusted_value;
if (!inst || !inst->capabilities) {
d_vpr_e("%s: invalid params\n", __func__);
return -EINVAL;
}
capability = inst->capabilities;
adjusted_value = ctrl ? ctrl->val :
capability->cap[OUTPUT_BUF_HOST_MAX_COUNT].value;
if (msm_vidc_is_super_buffer(inst) || is_image_session(inst))
adjusted_value = DEFAULT_MAX_HOST_BURST_BUF_COUNT;
msm_vidc_update_cap_value(inst, OUTPUT_BUF_HOST_MAX_COUNT,
adjusted_value, __func__);
return 0;
}
int msm_vidc_adjust_transform_8x8(void *instance, struct v4l2_ctrl *ctrl)
{
struct msm_vidc_inst_capability *capability;
@@ -3887,6 +3971,34 @@ int msm_vidc_set_u32(void *instance,
return rc;
}
int msm_vidc_set_u32_packed(void *instance,
enum msm_vidc_inst_capability_type cap_id)
{
int rc = 0;
struct msm_vidc_inst *inst = (struct msm_vidc_inst *)instance;
u32 hfi_value;
if (!inst || !inst->capabilities) {
d_vpr_e("%s: invalid params\n", __func__);
return -EINVAL;
}
if (inst->capabilities->cap[cap_id].flags & CAP_FLAG_MENU) {
rc = msm_vidc_v4l2_menu_to_hfi(inst, cap_id, &hfi_value);
if (rc)
return -EINVAL;
} else {
hfi_value = inst->capabilities->cap[cap_id].value;
}
rc = msm_vidc_packetize_control(inst, cap_id, HFI_PAYLOAD_32_PACKED,
&hfi_value, sizeof(u32), __func__);
if (rc)
return rc;
return rc;
}
int msm_vidc_set_u32_enum(void *instance,
enum msm_vidc_inst_capability_type cap_id)
{
@@ -3981,6 +4093,7 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst,
case V4L2_CID_MPEG_VIDEO_AV1_PROFILE:
case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
case V4L2_CID_MPEG_VIDEO_H264_LEVEL:
case V4L2_CID_MPEG_VIDEO_VP9_LEVEL:
case V4L2_CID_MPEG_VIDEO_AV1_LEVEL:
case V4L2_CID_MPEG_VIDEO_HEVC_TIER:
case V4L2_CID_MPEG_VIDEO_AV1_TIER:

3
driver/vidc/src/msm_vidc_driver.c
View File

@@ -205,6 +205,9 @@ static const struct msm_vidc_cap_name cap_name_arr[] = {
{BITRATE_BOOST, "BITRATE_BOOST" },
{SLICE_MODE, "SLICE_MODE" },
{BLUR_RESOLUTION, "BLUR_RESOLUTION" },
{OUTPUT_ORDER, "OUTPUT_ORDER" },
{INPUT_BUF_HOST_MAX_COUNT, "INPUT_BUF_HOST_MAX_COUNT" },
{OUTPUT_BUF_HOST_MAX_COUNT, "OUTPUT_BUF_HOST_MAX_COUNT" },
{INST_CAP_MAX, "INST_CAP_MAX" },
};