disp: msm: sde: right only pu support

This change add right only pu support by allowing the dsc to be
flushed when one of the dsc is getting disabled. Since the crtc
swaps the mixers in case of right only partial update, this change
fixes the active display mask passed to encoder so that always the
left only dsc gets programmed. This change also fixes layer mixer
configuration where only one layer mixer is driving the partial
update, the other mixer's configuration is disabled.

Change-Id: I2dd2e9a347797bfe07c90e0ca7f999d151fba933
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>

msm/sde/sde_hw_dsc_1_2.c

@@ -115,8 +115,11 @@ static void sde_hw_dsc_disable(struct sde_hw_dsc *hw_dsc)
 	dsc_c = &hw_dsc->hw;
 	SDE_REG_WRITE(dsc_c, DSC_CFG + idx, 0);
 
-	/* common register */
-	SDE_REG_WRITE(dsc_c, DSC_CMN_MAIN_CNF, 0);
+	if (_dsc_subblk_offset(hw_dsc, SDE_DSC_ENC, &idx))
+		return;
+
+	SDE_REG_WRITE(dsc_c, ENC_DF_CTRL + idx, 0);
+	SDE_REG_WRITE(dsc_c, DSC_MAIN_CONF + idx, 0);
 }
 
 static void sde_hw_dsc_config(struct sde_hw_dsc *hw_dsc,
@@ -140,14 +143,13 @@ static void sde_hw_dsc_config(struct sde_hw_dsc *hw_dsc,
 	if (mode & DSC_MODE_SPLIT_PANEL)
 		data |= BIT(0);
 
-	if (mode & DSC_MODE_MULTIPLEX) {
-		if (dsc->dsc_4hsmerge_en)
-			slice_count_per_enc = dsc->config.slice_count >> 2;
-		else
-			slice_count_per_enc = dsc->config.slice_count >> 1;
-
+	if (mode & DSC_MODE_MULTIPLEX)
 		data |= BIT(1);
-	}
+
+	if (dsc->dsc_4hsmerge_en)
+		slice_count_per_enc = dsc->config.slice_count >> 2;
+	else if ((mode & DSC_MODE_MULTIPLEX) || (dsc->half_panel_pu))
+		slice_count_per_enc = dsc->config.slice_count >> 1;
 
 	data |= (slice_count_per_enc & 0x3) << 7;
 	SDE_REG_WRITE(dsc_c, DSC_CMN_MAIN_CNF, data);