msm: camera: cdm: Clear IRQ before reading userdata
CDM driver read the user_data reg to inform CDM's clients about the request status being served. If before clearing the IRQ, the value of userdata register gets updated, then CDM will not receive another INLINE_IRQ for the updated userdata. This change will make sure that another interrupt is fired by clearing the IRQ first and reading the userdata later. CRs-Fixed: 2581559 Change-Id: I74edf1b8439ae2f88f30b6c2fdbf9ac9f3742503 Signed-off-by: Abhilash Kumar <krabhi@codeaurora.org> Signed-off-by: Venkat Chinta <vchinta@codeaurora.org>
Цей коміт міститься в:
зафіксовано
Venkat Chinta
джерело
b08e2b4099
коміт
4e30068212
@@ -1108,19 +1108,25 @@ irqreturn_t cam_hw_cdm_irq(int irq_num, void *data)
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for (i = 0; i < cdm_core->offsets->reg_data->num_bl_fifo_irq; i++) {
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if (cam_cdm_read_hw_reg(cdm_hw,
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cdm_core->offsets->irq_reg[i]->irq_status,
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&irq_status[i])) {
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cdm_core->offsets->irq_reg[i]->irq_status,
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&irq_status[i])) {
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CAM_ERR(CAM_CDM, "Failed to read CDM HW IRQ status");
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}
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if (cam_cdm_write_hw_reg(cdm_hw,
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cdm_core->offsets->irq_reg[i]->irq_clear,
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irq_status[i])) {
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CAM_ERR(CAM_CDM,
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"Failed to Write CDM HW IRQ Clear");
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}
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}
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if (cam_cdm_write_hw_reg(cdm_hw,
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cdm_core->offsets->irq_reg[0]->irq_clear_cmd, 0x01))
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CAM_ERR(CAM_CDM, "Failed to Write CDM HW IRQ cmd 0");
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for (i = 0; i < cdm_core->offsets->reg_data->num_bl_fifo_irq; i++) {
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if (!irq_status[i]) {
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cam_cdm_write_hw_reg(cdm_hw,
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cdm_core->offsets->irq_reg[i]->irq_clear,
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irq_status[i]);
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if (!irq_status[i])
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continue;
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}
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payload[i] = kzalloc(sizeof(struct cam_cdm_work_payload),
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GFP_ATOMIC);
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@@ -1128,11 +1134,10 @@ irqreturn_t cam_hw_cdm_irq(int irq_num, void *data)
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if (!payload[i])
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continue;
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if (irq_status[i] &
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CAM_CDM_IRQ_STATUS_INLINE_IRQ_MASK) {
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if (irq_status[i] & CAM_CDM_IRQ_STATUS_INLINE_IRQ_MASK) {
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if (cam_cdm_read_hw_reg(cdm_hw,
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cdm_core->offsets->cmn_reg->usr_data,
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&user_data)) {
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cdm_core->offsets->cmn_reg->usr_data,
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&user_data)) {
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CAM_ERR(CAM_CDM,
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"Failed to read CDM HW IRQ data");
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kfree(payload[i]);
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@@ -1142,9 +1147,8 @@ irqreturn_t cam_hw_cdm_irq(int irq_num, void *data)
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payload[i]->irq_data = user_data >> (i * 0x8);
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if (payload[i]->irq_data ==
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CAM_CDM_DBG_GEN_IRQ_USR_DATA)
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CAM_INFO(CAM_CDM,
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"Debug gen_irq received");
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CAM_CDM_DBG_GEN_IRQ_USR_DATA)
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CAM_INFO(CAM_CDM, "Debug gen_irq received");
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}
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payload[i]->fifo_idx = i;
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@@ -1154,18 +1158,9 @@ irqreturn_t cam_hw_cdm_irq(int irq_num, void *data)
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INIT_WORK((struct work_struct *)&payload[i]->work,
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cam_hw_cdm_work);
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if (cam_cdm_write_hw_reg(cdm_hw,
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cdm_core->offsets->irq_reg[i]->irq_clear,
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payload[i]->irq_status)) {
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CAM_ERR(CAM_CDM,
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"Failed to Write CDM HW IRQ Clear");
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kfree(payload[i]);
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return IRQ_HANDLED;
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}
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work_status = queue_work(
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cdm_core->bl_fifo[i].work_queue,
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&payload[i]->work);
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cdm_core->bl_fifo[i].work_queue,
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&payload[i]->work);
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if (work_status == false) {
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CAM_ERR(CAM_CDM,
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@@ -1175,11 +1170,6 @@ irqreturn_t cam_hw_cdm_irq(int irq_num, void *data)
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}
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}
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if (cam_cdm_write_hw_reg(cdm_hw,
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cdm_core->offsets->irq_reg[0]->irq_clear_cmd,
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0x01))
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CAM_ERR(CAM_CDM, "Failed to Write CDM HW IRQ cmd 0");
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return IRQ_HANDLED;
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}
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@@ -3711,7 +3711,20 @@ static int cam_ife_mgr_stop_hw(void *hw_mgr_priv, void *stop_hw_args)
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cam_ife_mgr_pause_hw(ctx);
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wait_for_completion(&ctx->config_done_complete);
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rc = wait_for_completion_timeout(
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&ctx->config_done_complete,
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msecs_to_jiffies(300));
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if (rc <= 0) {
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CAM_WARN(CAM_ISP,
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"config done completion timeout for last applied req_id=%llu rc=%d ctx_index %d",
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ctx->applied_req_id, rc, ctx->ctx_index);
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rc = -ETIMEDOUT;
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} else {
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CAM_DBG(CAM_ISP,
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"config done Success for req_id=%llu ctx_index %d",
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ctx->applied_req_id, ctx->ctx_index);
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rc = 0;
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}
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if (stop_isp->stop_only)
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goto end;
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