فهرست منبع

qcacmn: Add debug for Umac reset time consumption

Add debug to calculate the time consumed on host during
Umac reset handling.

Change-Id: I1697f61abf13980182a89ae0674f344f93943b86
CRs-Fixed: 3300163
Pavankumar Nandeshwar 2 سال پیش
والد
کامیت
4db1255f94
3فایلهای تغییر یافته به همراه45 افزوده شده و 0 حذف شده
  1. 10 0
      dp/wifi3.0/dp_main.c
  2. 15 0
      dp/wifi3.0/dp_umac_reset.c
  3. 20 0
      dp/wifi3.0/dp_umac_reset.h

+ 10 - 0
dp/wifi3.0/dp_main.c

@@ -13518,6 +13518,16 @@ static QDF_STATUS dp_umac_reset_handle_post_reset_complete(struct dp_soc *soc)
 		nbuf_list = nbuf;
 	}
 
+	dp_umac_reset_info("Umac reset done on soc %pK\n prereset : %u us\n"
+			   "postreset : %u us \n postreset complete: %u us \n",
+			   soc,
+			   soc->umac_reset_ctx.ts.pre_reset_done -
+			   soc->umac_reset_ctx.ts.pre_reset_start,
+			   soc->umac_reset_ctx.ts.post_reset_done -
+			   soc->umac_reset_ctx.ts.post_reset_start,
+			   soc->umac_reset_ctx.ts.post_reset_complete_done -
+			   soc->umac_reset_ctx.ts.post_reset_complete_start);
+
 	return status;
 }
 #endif

+ 15 - 0
dp/wifi3.0/dp_umac_reset.c

@@ -313,6 +313,8 @@ static int dp_umac_reset_rx_event_handler(void *dp_ctx)
 		goto exit;
 
 	case UMAC_RESET_RX_EVENT_DO_PRE_RESET:
+		umac_reset_ctx->ts.pre_reset_start =
+						qdf_get_log_timestamp_usecs();
 		status = dp_umac_reset_validate_n_update_state_machine_on_rx(
 			umac_reset_ctx, rx_event,
 			UMAC_RESET_STATE_WAIT_FOR_DO_PRE_RESET,
@@ -322,6 +324,8 @@ static int dp_umac_reset_rx_event_handler(void *dp_ctx)
 		break;
 
 	case UMAC_RESET_RX_EVENT_DO_POST_RESET_START:
+		umac_reset_ctx->ts.post_reset_start =
+						qdf_get_log_timestamp_usecs();
 		status = dp_umac_reset_validate_n_update_state_machine_on_rx(
 			umac_reset_ctx, rx_event,
 			UMAC_RESET_STATE_WAIT_FOR_DO_POST_RESET_START,
@@ -331,6 +335,8 @@ static int dp_umac_reset_rx_event_handler(void *dp_ctx)
 		break;
 
 	case UMAC_RESET_RX_EVENT_DO_POST_RESET_COMPELTE:
+		umac_reset_ctx->ts.post_reset_complete_start =
+						qdf_get_log_timestamp_usecs();
 		status = dp_umac_reset_validate_n_update_state_machine_on_rx(
 			umac_reset_ctx, rx_event,
 			UMAC_RESET_STATE_WAIT_FOR_DO_POST_RESET_COMPLETE,
@@ -482,16 +488,25 @@ dp_umac_reset_post_tx_cmd_via_shmem(
 	case UMAC_RESET_TX_CMD_PRE_RESET_DONE:
 		HTT_UMAC_HANG_RECOVERY_MSG_SHMEM_PRE_RESET_DONE_SET(
 			shmem_vaddr->h2t_msg, 1);
+
+		umac_reset_ctx->ts.pre_reset_done =
+						qdf_get_log_timestamp_usecs();
 		break;
 
 	case UMAC_RESET_TX_CMD_POST_RESET_START_DONE:
 		HTT_UMAC_HANG_RECOVERY_MSG_SHMEM_POST_RESET_START_DONE_SET(
 			shmem_vaddr->h2t_msg, 1);
+
+		umac_reset_ctx->ts.post_reset_done =
+						qdf_get_log_timestamp_usecs();
 		break;
 
 	case UMAC_RESET_TX_CMD_POST_RESET_COMPLETE_DONE:
 		HTT_UMAC_HANG_RECOVERY_MSG_SHMEM_POST_RESET_COMPLETE_DONE_SET(
 			shmem_vaddr->h2t_msg, 1);
+
+		umac_reset_ctx->ts.post_reset_complete_done =
+						qdf_get_log_timestamp_usecs();
 		break;
 
 	default:

+ 20 - 0
dp/wifi3.0/dp_umac_reset.h

@@ -123,6 +123,24 @@ struct umac_reset_rx_actions {
 	QDF_STATUS (*cb[UMAC_RESET_ACTION_MAX])(struct dp_soc *soc);
 };
 
+/**
+ * struct reset_ts - timestamps of for umac reset events for debug
+ * @pre_reset_start: Umac prereset start event timestamp
+ * @pre_reset_done: Umac prereset done timestamp
+ * @post_reset_start: Umac postreset start event timestamp
+ * @post_reset_done: Umac postreset done timestamp
+ * @post_reset_complete_start: Umac postreset complete event timestamp
+ * @post_reset_complete_done: Umac postreset complete done timestamp
+ */
+struct reset_ts {
+	uint64_t pre_reset_start;
+	uint64_t pre_reset_done;
+	uint64_t post_reset_start;
+	uint64_t post_reset_done;
+	uint64_t post_reset_complete_start;
+	uint64_t post_reset_complete_done;
+};
+
 /**
  * struct dp_soc_umac_reset_ctx - UMAC reset context at soc level
  * @shmem_paddr_unaligned: Physical address of the shared memory (unaligned)
@@ -137,6 +155,7 @@ struct umac_reset_rx_actions {
  * @intr_ctx_bkp: DP Interrupts ring masks backup
  * @nbuf_list: skb list for delayed free
  * @skel_enable: Enable skeleton code for umac reset
+ * @ts: timestamps debug
  */
 struct dp_soc_umac_reset_ctx {
 	qdf_dma_addr_t shmem_paddr_unaligned;
@@ -151,6 +170,7 @@ struct dp_soc_umac_reset_ctx {
 	struct dp_intr_bkp *intr_ctx_bkp;
 	qdf_nbuf_t nbuf_list;
 	bool skel_enable;
+	struct reset_ts ts;
 };
 
 /**