ASoC: bolero: Update TX HPF sequence for AMIC
Update TX HPF sequence for AMIC to avoid pop during audio capture. Change-Id: Ib70fc5cd05f67c97977db96487294bfe14f554ad Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
This commit is contained in:
Sudheer Papothi
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Gerrit - the friendly Code Review server
Gerrit - the friendly Code Review server
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669089fdbd
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4d1a9042f2
@@ -44,16 +44,18 @@
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#define VA_MACRO_TX_DMIC_CLK_DIV_MASK 0x0E
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#define VA_MACRO_TX_DMIC_CLK_DIV_SHFT 0x01
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#define VA_MACRO_SWR_MIC_MUX_SEL_MASK 0xF
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#define VA_MACRO_ADC_MUX_CFG_OFFSET 0x2
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#define VA_MACRO_ADC_MUX_CFG_OFFSET 0x8
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#define BOLERO_CDC_VA_TX_UNMUTE_DELAY_MS 40
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#define BOLERO_CDC_VA_TX_DMIC_UNMUTE_DELAY_MS 40
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#define BOLERO_CDC_VA_TX_AMIC_UNMUTE_DELAY_MS 100
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#define BOLERO_CDC_VA_TX_DMIC_HPF_DELAY_MS 300
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#define BOLERO_CDC_VA_TX_AMIC_HPF_DELAY_MS 300
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#define MAX_RETRY_ATTEMPTS 500
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#define VA_MACRO_SWR_STRING_LEN 80
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#define VA_MACRO_CHILD_DEVICES_MAX 3
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static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
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static int va_tx_unmute_delay = BOLERO_CDC_VA_TX_UNMUTE_DELAY_MS;
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static int va_tx_unmute_delay = BOLERO_CDC_VA_TX_DMIC_UNMUTE_DELAY_MS;
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module_param(va_tx_unmute_delay, int, 0664);
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MODULE_PARM_DESC(va_tx_unmute_delay, "delay to unmute the tx path");
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@@ -708,6 +710,25 @@ done:
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return ret;
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}
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static int is_amic_enabled(struct snd_soc_component *component, int decimator)
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{
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u16 adc_mux_reg = 0, adc_reg = 0;
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u16 adc_n = BOLERO_ADC_MAX;
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adc_mux_reg = BOLERO_CDC_VA_INP_MUX_ADC_MUX0_CFG1 +
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VA_MACRO_ADC_MUX_CFG_OFFSET * decimator;
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if (snd_soc_component_read32(component, adc_mux_reg) & SWR_MIC) {
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adc_reg = BOLERO_CDC_VA_INP_MUX_ADC_MUX0_CFG0 +
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VA_MACRO_ADC_MUX_CFG_OFFSET * decimator;
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adc_n = snd_soc_component_read32(component, adc_reg) &
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VA_MACRO_SWR_MIC_MUX_SEL_MASK;
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if (adc_n >= BOLERO_ADC_MAX)
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adc_n = BOLERO_ADC_MAX;
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}
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return adc_n;
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}
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static void va_macro_tx_hpf_corner_freq_callback(struct work_struct *work)
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{
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struct delayed_work *hpf_delayed_work;
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@@ -716,7 +737,7 @@ static void va_macro_tx_hpf_corner_freq_callback(struct work_struct *work)
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struct snd_soc_component *component;
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u16 dec_cfg_reg, hpf_gate_reg;
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u8 hpf_cut_off_freq;
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u16 adc_mux_reg = 0, adc_n = 0, adc_reg = 0;
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u16 adc_n = 0;
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hpf_delayed_work = to_delayed_work(work);
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hpf_work = container_of(hpf_delayed_work, struct hpf_work, dwork);
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@@ -732,26 +753,30 @@ static void va_macro_tx_hpf_corner_freq_callback(struct work_struct *work)
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dev_dbg(va_priv->dev, "%s: decimator %u hpf_cut_of_freq 0x%x\n",
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__func__, hpf_work->decimator, hpf_cut_off_freq);
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adc_mux_reg = BOLERO_CDC_VA_INP_MUX_ADC_MUX0_CFG1 +
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VA_MACRO_ADC_MUX_CFG_OFFSET * hpf_work->decimator;
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if (snd_soc_component_read32(component, adc_mux_reg) & SWR_MIC) {
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adc_reg = BOLERO_CDC_VA_INP_MUX_ADC_MUX0_CFG0 +
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VA_MACRO_ADC_MUX_CFG_OFFSET * hpf_work->decimator;
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adc_n = snd_soc_component_read32(component, adc_reg) &
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VA_MACRO_SWR_MIC_MUX_SEL_MASK;
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if (adc_n >= BOLERO_ADC_MAX)
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goto va_hpf_set;
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adc_n = is_amic_enabled(component, hpf_work->decimator);
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if (adc_n < BOLERO_ADC_MAX) {
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/* analog mic clear TX hold */
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bolero_clear_amic_tx_hold(component->dev, adc_n);
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snd_soc_component_update_bits(component,
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dec_cfg_reg, TX_HPF_CUT_OFF_FREQ_MASK,
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hpf_cut_off_freq << 5);
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snd_soc_component_update_bits(component, hpf_gate_reg,
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0x03, 0x02);
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/* Minimum 1 clk cycle delay is required as per HW spec */
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usleep_range(1000, 1010);
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snd_soc_component_update_bits(component, hpf_gate_reg,
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0x03, 0x01);
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} else {
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snd_soc_component_update_bits(component,
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dec_cfg_reg, TX_HPF_CUT_OFF_FREQ_MASK,
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hpf_cut_off_freq << 5);
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snd_soc_component_update_bits(component, hpf_gate_reg,
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0x02, 0x02);
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/* Minimum 1 clk cycle delay is required as per HW spec */
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usleep_range(1000, 1010);
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snd_soc_component_update_bits(component, hpf_gate_reg,
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0x02, 0x00);
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}
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va_hpf_set:
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snd_soc_component_update_bits(component,
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dec_cfg_reg, TX_HPF_CUT_OFF_FREQ_MASK,
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hpf_cut_off_freq << 5);
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snd_soc_component_update_bits(component, hpf_gate_reg, 0x02, 0x02);
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/* Minimum 1 clk cycle delay is required as per HW spec */
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usleep_range(1000, 1010);
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snd_soc_component_update_bits(component, hpf_gate_reg, 0x02, 0x00);
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}
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static void va_macro_mute_update_callback(struct work_struct *work)
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@@ -1045,6 +1070,8 @@ static int va_macro_enable_dec(struct snd_soc_dapm_widget *w,
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u8 hpf_cut_off_freq;
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struct device *va_dev = NULL;
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struct va_macro_priv *va_priv = NULL;
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int hpf_delay = BOLERO_CDC_VA_TX_DMIC_HPF_DELAY_MS;
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int unmute_delay = BOLERO_CDC_VA_TX_DMIC_UNMUTE_DELAY_MS;
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if (!va_macro_get_data(component, &va_dev, &va_priv, __func__))
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return -EINVAL;
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@@ -1090,21 +1117,27 @@ static int va_macro_enable_dec(struct snd_soc_dapm_widget *w,
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snd_soc_component_update_bits(component, dec_cfg_reg,
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TX_HPF_CUT_OFF_FREQ_MASK,
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CF_MIN_3DB_150HZ << 5);
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snd_soc_component_update_bits(component,
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hpf_gate_reg, 0x03, 0x03);
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/*
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* Minimum 1 clk cycle delay is required as per HW spec
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*/
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usleep_range(1000, 1010);
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snd_soc_component_update_bits(component,
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hpf_gate_reg, 0x02, 0x00);
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snd_soc_component_update_bits(component,
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hpf_gate_reg, 0x01, 0x01);
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/*
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* 6ms delay is required as per HW spec
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*/
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usleep_range(6000, 6010);
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}
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if (is_amic_enabled(component, decimator) < BOLERO_ADC_MAX) {
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hpf_delay = BOLERO_CDC_VA_TX_AMIC_HPF_DELAY_MS;
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unmute_delay = BOLERO_CDC_VA_TX_AMIC_UNMUTE_DELAY_MS;
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if (va_tx_unmute_delay < unmute_delay)
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va_tx_unmute_delay = unmute_delay;
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}
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snd_soc_component_update_bits(component,
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hpf_gate_reg, 0x03, 0x03);
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/*
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* Minimum 1 clk cycle delay is required as per HW spec
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*/
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usleep_range(1000, 1010);
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snd_soc_component_update_bits(component,
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hpf_gate_reg, 0x02, 0x00);
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snd_soc_component_update_bits(component,
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hpf_gate_reg, 0x01, 0x01);
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/*
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* 6ms delay is required as per HW spec
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*/
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usleep_range(6000, 6010);
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/* schedule work queue to Remove Mute */
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schedule_delayed_work(&va_priv->va_mute_dwork[decimator].dwork,
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msecs_to_jiffies(va_tx_unmute_delay));
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@@ -1112,7 +1145,7 @@ static int va_macro_enable_dec(struct snd_soc_dapm_widget *w,
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CF_MIN_3DB_150HZ)
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schedule_delayed_work(
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&va_priv->va_hpf_work[decimator].dwork,
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msecs_to_jiffies(50));
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msecs_to_jiffies(hpf_delay));
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/* apply gain after decimator is enabled */
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snd_soc_component_write(component, tx_gain_ctl_reg,
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snd_soc_component_read32(component, tx_gain_ctl_reg));
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