msm: camera: isp: Print additional debug info in case of csid errors

We are moving CSID error type and error handler from csid driver
to target header file.

This commit prints additional debug information in case of MUP
mismatch and line buffer conflict CSID errors.

CRs-Fixed: 2948116
Change-Id: I46e7e8cb49a94c649862c35f7da009c86df60cc6
Signed-off-by: Chandan Kumar Jha <cjha@codeaurora.org>
This commit is contained in:
Chandan Kumar Jha
2021-10-01 01:47:30 +05:30
committed by Gerrit - the friendly Code Review server
parent 3634a75a4e
commit 4bf52a5ab2
7 changed files with 132 additions and 98 deletions

View File

@@ -12,6 +12,7 @@
#include "cam_ife_csid_common.h" #include "cam_ife_csid_common.h"
#include "cam_ife_csid_hw_ver2.h" #include "cam_ife_csid_hw_ver2.h"
#include "cam_irq_controller.h" #include "cam_irq_controller.h"
#include "cam_isp_hw_mgr_intf.h"
#define CAM_CSID_VERSION_V680 0x60080000 #define CAM_CSID_VERSION_V680 0x60080000
@@ -173,11 +174,15 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_680_path_irq_desc[] = {
}, },
{ {
.bitmask = BIT(13), .bitmask = BIT(13),
.err_type = CAM_ISP_HW_ERROR_CSID_FRAME_SIZE,
.desc = "ERROR_PIX_COUNT", .desc = "ERROR_PIX_COUNT",
.err_handler = cam_ife_csid_ver2_print_format_measure_info,
}, },
{ {
.bitmask = BIT(14), .bitmask = BIT(14),
.err_type = CAM_ISP_HW_ERROR_CSID_FRAME_SIZE,
.desc = "ERROR_LINE_COUNT", .desc = "ERROR_LINE_COUNT",
.err_handler = cam_ife_csid_ver2_print_format_measure_info,
}, },
{ {
.bitmask = BIT(15), .bitmask = BIT(15),
@@ -197,6 +202,7 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_680_path_irq_desc[] = {
}, },
{ {
.bitmask = BIT(19), .bitmask = BIT(19),
.err_type = CAM_ISP_HW_ERROR_RECOVERY_OVERFLOW,
.desc = "OVERFLOW_RECOVERY: Back pressure/output fifo ovrfl", .desc = "OVERFLOW_RECOVERY: Back pressure/output fifo ovrfl",
}, },
{ {
@@ -234,6 +240,7 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_680_path_irq_desc[] = {
{ {
.bitmask = BIT(28), .bitmask = BIT(28),
.desc = "SENSOR_SWITCH_OUT_OF_SYNC_FRAME_DROP", .desc = "SENSOR_SWITCH_OUT_OF_SYNC_FRAME_DROP",
.err_handler = cam_ife_csid_hw_ver2_mup_mismatch_handler,
}, },
{ {
.bitmask = BIT(29), .bitmask = BIT(29),

View File

@@ -122,7 +122,9 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_780_rx_irq_desc[] = {
static const struct cam_ife_csid_irq_desc cam_ife_csid_780_path_irq_desc[] = { static const struct cam_ife_csid_irq_desc cam_ife_csid_780_path_irq_desc[] = {
{ {
.bitmask = BIT(0), .bitmask = BIT(0),
.err_type = CAM_ISP_HW_ERROR_CSID_FATAL,
.desc = "ILLEGAL_PROGRAMMING", .desc = "ILLEGAL_PROGRAMMING",
.err_handler = cam_ife_csid_ver2_print_illegal_programming_irq_status,
}, },
{ {
.bitmask = BIT(1), .bitmask = BIT(1),
@@ -174,11 +176,15 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_780_path_irq_desc[] = {
}, },
{ {
.bitmask = BIT(13), .bitmask = BIT(13),
.err_type = CAM_ISP_HW_ERROR_CSID_FRAME_SIZE,
.desc = "ERROR_PIX_COUNT", .desc = "ERROR_PIX_COUNT",
.err_handler = cam_ife_csid_ver2_print_format_measure_info,
}, },
{ {
.bitmask = BIT(14), .bitmask = BIT(14),
.err_type = CAM_ISP_HW_ERROR_CSID_FRAME_SIZE,
.desc = "ERROR_LINE_COUNT", .desc = "ERROR_LINE_COUNT",
.err_handler = cam_ife_csid_ver2_print_format_measure_info,
}, },
{ {
.bitmask = BIT(15), .bitmask = BIT(15),
@@ -198,6 +204,7 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_780_path_irq_desc[] = {
}, },
{ {
.bitmask = BIT(19), .bitmask = BIT(19),
.err_type = CAM_ISP_HW_ERROR_RECOVERY_OVERFLOW,
.desc = "OVERFLOW_RECOVERY: Back pressure/output fifo ovrfl", .desc = "OVERFLOW_RECOVERY: Back pressure/output fifo ovrfl",
}, },
{ {
@@ -235,6 +242,7 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_780_path_irq_desc[] = {
{ {
.bitmask = BIT(28), .bitmask = BIT(28),
.desc = "SENSOR_SWITCH_OUT_OF_SYNC_FRAME_DROP", .desc = "SENSOR_SWITCH_OUT_OF_SYNC_FRAME_DROP",
.err_handler = cam_ife_csid_hw_ver2_mup_mismatch_handler,
}, },
{ {
.bitmask = BIT(29), .bitmask = BIT(29),
@@ -266,6 +274,7 @@ static const struct cam_ife_csid_top_irq_desc cam_ife_csid_780_top_irq_desc[] =
.err_type = CAM_ISP_HW_ERROR_CSID_FIFO_OVERFLOW, .err_type = CAM_ISP_HW_ERROR_CSID_FIFO_OVERFLOW,
.err_name = "ERROR_RDI_LINE_BUFFER_CONFLICT", .err_name = "ERROR_RDI_LINE_BUFFER_CONFLICT",
.desc = "Two or more RDIs programmed to access the shared line buffer", .desc = "Two or more RDIs programmed to access the shared line buffer",
.err_handler = cam_ife_csid_hw_ver2_rdi_line_buffer_conflict_handler,
}, },
}; };

View File

@@ -104,26 +104,33 @@ enum cam_ife_csid_irq_reg {
/* /*
* struct cam_ife_csid_irq_desc: Structure to hold IRQ description * struct cam_ife_csid_irq_desc: Structure to hold IRQ description
* *
* @bitmask : Bitmask of the IRQ * @bitmask : Bitmask of the IRQ
* @irq_desc: String to describe the IRQ bit * @err_type : Error type for ISP hardware event
* @irq_desc : String to describe the IRQ bit
* @err_handler: Error handler which gets invoked if error IRQ bit set
*/ */
struct cam_ife_csid_irq_desc { struct cam_ife_csid_irq_desc {
uint32_t bitmask; uint32_t bitmask;
uint32_t err_type;
uint8_t *desc; uint8_t *desc;
void (*err_handler)(void *csid_hw, void *res);
}; };
/* /*
* struct cam_ife_csid_top_irq_desc: Structure to hold IRQ bitmask and description * struct cam_ife_csid_top_irq_desc: Structure to hold IRQ bitmask and description
* *
* @bitmask : Bitmask of the IRQ * @bitmask : Bitmask of the IRQ
* @err_name : IRQ name * @err_type : Error type for ISP hardware event
* @desc : String to describe about the IRQ * @err_name : IRQ name
* @desc : String to describe about the IRQ
* @err_handler: Error handler which gets invoked if error IRQ bit set
*/ */
struct cam_ife_csid_top_irq_desc { struct cam_ife_csid_top_irq_desc {
uint32_t bitmask; uint32_t bitmask;
uint32_t err_type; uint32_t err_type;
char *err_name; char *err_name;
char *desc; char *desc;
void (*err_handler)(void *csid_hw);
}; };
/* /*

View File

@@ -1159,10 +1159,67 @@ end:
return 0; return 0;
} }
static void cam_ife_csid_ver2_print_illegal_programming_irq_status( void cam_ife_csid_hw_ver2_rdi_line_buffer_conflict_handler(
struct cam_ife_csid_ver2_hw *csid_hw, void *csid)
struct cam_isp_resource_node *res)
{ {
struct cam_ife_csid_ver2_hw *csid_hw = csid;
struct cam_ife_csid_ver2_reg_info *csid_reg = csid_hw->core_info->csid_reg;
struct cam_hw_soc_info *soc_info = &csid_hw->hw_info->soc_info;
void __iomem *base =
soc_info->reg_map[CAM_IFE_CSID_CLC_MEM_BASE_ID].mem_base;
const struct cam_ife_csid_ver2_path_reg_info *path_reg;
uint32_t i = 0, rdi_cfg = 0;
uint8_t *log_buf = NULL;
size_t len = 0;
for (i = CAM_IFE_PIX_PATH_RES_RDI_0; i < CAM_IFE_PIX_PATH_RES_RDI_4;
i++) {
path_reg = csid_reg->path_reg[i - CAM_IFE_PIX_PATH_RES_RDI_0];
if (!(path_reg->capabilities &
CAM_IFE_CSID_CAP_LINE_SMOOTHING_IN_RDI))
continue;
rdi_cfg = cam_io_r_mb(base + path_reg->cfg1_addr);
if (rdi_cfg & path_reg->pix_store_en_shift_val)
CAM_ERR_BUF(CAM_ISP, log_buf, CAM_IFE_CSID_LOG_BUF_LEN, &len,
"LINE BUFFER ENABLED for RDI%d", (i - CAM_IFE_PIX_PATH_RES_RDI_0));
}
if (len)
CAM_ERR(CAM_ISP, "CSID[%d] %s", csid_hw->hw_intf->hw_idx, log_buf);
}
void cam_ife_csid_hw_ver2_mup_mismatch_handler(
void *csid, void *resource)
{
struct cam_ife_csid_ver2_hw *csid_hw = csid;
struct cam_isp_resource_node *res = resource;
struct cam_ife_csid_ver2_path_cfg *path_cfg =
(struct cam_ife_csid_ver2_path_cfg *)res->res_priv;
struct cam_ife_csid_cid_data *cid_data = &csid_hw->cid_data[path_cfg->cid];
CAM_INFO(CAM_ISP, "CSID:%d Last MUP value 0x%x programmed for res [id: %d name: %s]",
csid_hw->hw_intf->hw_idx, csid_hw->rx_cfg.mup, res->res_id, res->res_name);
if (cid_data->vc_dt[CAM_IFE_CSID_MULTI_VC_DT_GRP_1].valid) {
CAM_INFO(CAM_ISP, "vc0 %d vc1 %d" ,
cid_data->vc_dt[CAM_IFE_CSID_MULTI_VC_DT_GRP_0].vc,
cid_data->vc_dt[CAM_IFE_CSID_MULTI_VC_DT_GRP_1].vc);
} else {
CAM_ERR(CAM_ISP, "Multi-VCDT is not enabled, vc0 %d" ,
cid_data->vc_dt[CAM_IFE_CSID_MULTI_VC_DT_GRP_0].vc);
}
}
void cam_ife_csid_ver2_print_illegal_programming_irq_status(
void *csid, void *resource)
{
struct cam_ife_csid_ver2_hw *csid_hw = csid;
struct cam_isp_resource_node *res = resource;
struct cam_ife_csid_ver2_reg_info *csid_reg = csid_hw->core_info->csid_reg; struct cam_ife_csid_ver2_reg_info *csid_reg = csid_hw->core_info->csid_reg;
struct cam_ife_csid_ver2_path_cfg *path_cfg = struct cam_ife_csid_ver2_path_cfg *path_cfg =
(struct cam_ife_csid_ver2_path_cfg *)res->res_priv; (struct cam_ife_csid_ver2_path_cfg *)res->res_priv;
@@ -1279,7 +1336,8 @@ static void cam_ife_csid_ver2_print_debug_reg_status(
} }
static int cam_ife_csid_ver2_parse_path_irq_status( static int cam_ife_csid_ver2_parse_path_irq_status(
struct cam_ife_csid_ver2_hw *csid_hw, struct cam_ife_csid_ver2_hw *csid_hw,
struct cam_isp_resource_node *res,
uint32_t index, uint32_t index,
uint32_t err_mask, uint32_t err_mask,
uint32_t irq_status) uint32_t irq_status)
@@ -1287,7 +1345,7 @@ static int cam_ife_csid_ver2_parse_path_irq_status(
const uint8_t **irq_reg_tag; const uint8_t **irq_reg_tag;
const struct cam_ife_csid_ver2_reg_info *csid_reg; const struct cam_ife_csid_ver2_reg_info *csid_reg;
uint32_t bit_pos = 0; uint32_t bit_pos = 0;
uint32_t status; uint32_t status, err_type = 0;
uint32_t sof_irq_debug_en = 0; uint32_t sof_irq_debug_en = 0;
size_t len = 0; size_t len = 0;
uint8_t *log_buf = NULL; uint8_t *log_buf = NULL;
@@ -1302,9 +1360,14 @@ static int cam_ife_csid_ver2_parse_path_irq_status(
status = irq_status & err_mask; status = irq_status & err_mask;
while (status) { while (status) {
if (status & 0x1 ) if (status & 0x1 ) {
CAM_ERR_BUF(CAM_ISP, log_buf, CAM_IFE_CSID_LOG_BUF_LEN, &len, "%s", CAM_ERR_BUF(CAM_ISP, log_buf, CAM_IFE_CSID_LOG_BUF_LEN, &len, "%s",
csid_reg->path_irq_desc[bit_pos].desc); csid_reg->path_irq_desc[bit_pos].desc);
if (csid_reg->path_irq_desc[bit_pos].err_type)
err_type |= csid_reg->path_irq_desc[bit_pos].err_type;
if (csid_reg->path_irq_desc[bit_pos].err_handler)
csid_reg->path_irq_desc[bit_pos].err_handler(csid_hw, res);
}
bit_pos++; bit_pos++;
status >>= 1; status >>= 1;
} }
@@ -1340,7 +1403,7 @@ static int cam_ife_csid_ver2_parse_path_irq_status(
} }
} }
return 0; return err_type;
} }
static int cam_ife_csid_ver2_top_err_irq_bottom_half( static int cam_ife_csid_ver2_top_err_irq_bottom_half(
@@ -1379,6 +1442,8 @@ static int cam_ife_csid_ver2_top_err_irq_bottom_half(
CAM_ERR(CAM_ISP, "%s %s", CAM_ERR(CAM_ISP, "%s %s",
csid_reg->top_irq_desc[i].err_name, csid_reg->top_irq_desc[i].err_name,
csid_reg->top_irq_desc[i].desc); csid_reg->top_irq_desc[i].desc);
if (csid_reg->top_irq_desc[i].err_handler)
csid_reg->top_irq_desc[i].err_handler(csid_hw);
event_type |= csid_reg->top_irq_desc[i].err_type; event_type |= csid_reg->top_irq_desc[i].err_type;
} }
} }
@@ -1394,16 +1459,17 @@ static int cam_ife_csid_ver2_top_err_irq_bottom_half(
return 0; return 0;
} }
static void cam_ife_csid_ver2_print_format_measure_info( void cam_ife_csid_ver2_print_format_measure_info(
struct cam_ife_csid_ver2_hw *csid_hw, void *csid, void *resource)
struct cam_isp_resource_node *res)
{ {
uint32_t expected_frame = 0, actual_frame = 0; struct cam_ife_csid_ver2_hw *csid_hw = csid;
struct cam_isp_resource_node *res = resource;
struct cam_ife_csid_ver2_reg_info *csid_reg = csid_hw->core_info->csid_reg; struct cam_ife_csid_ver2_reg_info *csid_reg = csid_hw->core_info->csid_reg;
const struct cam_ife_csid_ver2_path_reg_info *path_reg = const struct cam_ife_csid_ver2_path_reg_info *path_reg =
csid_reg->path_reg[res->res_id]; csid_reg->path_reg[res->res_id];
struct cam_hw_soc_info *soc_info = &csid_hw->hw_info->soc_info; struct cam_hw_soc_info *soc_info = &csid_hw->hw_info->soc_info;
void __iomem *base = soc_info->reg_map[CAM_IFE_CSID_CLC_MEM_BASE_ID].mem_base; void __iomem *base = soc_info->reg_map[CAM_IFE_CSID_CLC_MEM_BASE_ID].mem_base;
uint32_t expected_frame = 0, actual_frame = 0;
actual_frame = cam_io_r_mb(base + path_reg->format_measure0_addr); actual_frame = cam_io_r_mb(base + path_reg->format_measure0_addr);
expected_frame = cam_io_r_mb(base + path_reg->format_measure_cfg1_addr); expected_frame = cam_io_r_mb(base + path_reg->format_measure_cfg1_addr);
@@ -1504,36 +1570,11 @@ static int cam_ife_csid_ver2_ipp_bottom_half(
goto unlock; goto unlock;
} }
cam_ife_csid_ver2_parse_path_irq_status( err_type = cam_ife_csid_ver2_parse_path_irq_status(
csid_hw, csid_hw, res,
CAM_IFE_CSID_IRQ_REG_IPP, CAM_IFE_CSID_IRQ_REG_IPP,
err_mask, irq_status_ipp); err_mask, irq_status_ipp);
if (irq_status_ipp & IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM) {
if (path_reg->fatal_err_mask &
IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM) {
CAM_ERR(CAM_ISP, "CSID[%u] Illegal Programming for IPP status:0x%x",
csid_hw->hw_intf->hw_idx,irq_status_ipp);
cam_ife_csid_ver2_print_illegal_programming_irq_status(
csid_hw, res);
} else {
CAM_ERR(CAM_ISP, "Illegal Programming IRQ is not supported");
CAM_INFO(CAM_ISP, "CSID[%u]: status:0x%x",
csid_hw->hw_intf->hw_idx, irq_status_ipp);
}
err_type |= CAM_ISP_HW_ERROR_CSID_FATAL;
}
if (irq_status_ipp & IFE_CSID_VER2_PATH_RECOVERY_OVERFLOW)
err_type |= CAM_ISP_HW_ERROR_RECOVERY_OVERFLOW;
if (irq_status_ipp & (IFE_CSID_VER2_PATH_ERROR_PIX_COUNT |
IFE_CSID_VER2_PATH_ERROR_LINE_COUNT)) {
cam_ife_csid_ver2_print_format_measure_info(csid_hw, res);
err_type |= CAM_ISP_HW_ERROR_CSID_FRAME_SIZE;
}
if (err_type) if (err_type)
cam_ife_csid_ver2_handle_event_err(csid_hw, cam_ife_csid_ver2_handle_event_err(csid_hw,
irq_status_ipp, irq_status_ipp,
@@ -1604,34 +1645,10 @@ static int cam_ife_csid_ver2_ppp_bottom_half(
csid_hw->hw_intf->hw_idx); csid_hw->hw_intf->hw_idx);
goto unlock; goto unlock;
} }
cam_ife_csid_ver2_parse_path_irq_status( err_type = cam_ife_csid_ver2_parse_path_irq_status(
csid_hw, CAM_IFE_CSID_IRQ_REG_PPP, csid_hw, res, CAM_IFE_CSID_IRQ_REG_PPP,
err_mask, irq_status_ppp); err_mask, irq_status_ppp);
if (irq_status_ppp & IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM) {
if (path_reg->fatal_err_mask &
IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM) {
CAM_ERR(CAM_ISP, "CSID[%u] Illegal Programming for PPP status:0x%x",
csid_hw->hw_intf->hw_idx,irq_status_ppp);
cam_ife_csid_ver2_print_illegal_programming_irq_status(
csid_hw, res);
} else {
CAM_ERR(CAM_ISP, "Illegal Programming IRQ is not supported");
CAM_INFO(CAM_ISP, "CSID[%u]: status:0x%x",
csid_hw->hw_intf->hw_idx, irq_status_ppp);
}
err_type |= CAM_ISP_HW_ERROR_CSID_FATAL;
}
if (irq_status_ppp & (IFE_CSID_VER2_PATH_ERROR_PIX_COUNT |
IFE_CSID_VER2_PATH_ERROR_LINE_COUNT)) {
cam_ife_csid_ver2_print_format_measure_info(csid_hw, res);
err_type |= CAM_ISP_HW_ERROR_CSID_FRAME_SIZE;
}
if (irq_status_ppp & IFE_CSID_VER2_PATH_RECOVERY_OVERFLOW)
err_type |= CAM_ISP_HW_ERROR_RECOVERY_OVERFLOW;
if (err_type) if (err_type)
cam_ife_csid_ver2_handle_event_err(csid_hw, cam_ife_csid_ver2_handle_event_err(csid_hw,
irq_status_ppp, irq_status_ppp,
@@ -1711,36 +1728,10 @@ static int cam_ife_csid_ver2_rdi_bottom_half(
goto end; goto end;
} }
cam_ife_csid_ver2_parse_path_irq_status(csid_hw, err_type = cam_ife_csid_ver2_parse_path_irq_status(csid_hw, res,
path_cfg->irq_reg_idx, path_cfg->irq_reg_idx,
err_mask, irq_status_rdi); err_mask, irq_status_rdi);
if (irq_status_rdi & IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM) {
if (rdi_reg->fatal_err_mask &
IFE_CSID_VER2_PATH_ERROR_ILLEGAL_PROGRAM) {
CAM_ERR(CAM_ISP, "CSID[%u]: Illegal Programming for RDI:%d status:0x%x",
csid_hw->hw_intf->hw_idx,
res->res_id, irq_status_rdi);
cam_ife_csid_ver2_print_illegal_programming_irq_status(
csid_hw, res);
} else {
CAM_ERR(CAM_ISP, "Illegal Programming IRQ is not supported");
CAM_INFO(CAM_ISP, "CSID[%u]: RDI:%d status:0x%x",
csid_hw->hw_intf->hw_idx,
res->res_id, irq_status_rdi);
}
err_type |= CAM_ISP_HW_ERROR_CSID_FATAL;
}
if (irq_status_rdi & IFE_CSID_VER2_PATH_RECOVERY_OVERFLOW)
err_type |= CAM_ISP_HW_ERROR_RECOVERY_OVERFLOW;
if (irq_status_rdi & (IFE_CSID_VER2_PATH_ERROR_PIX_COUNT |
IFE_CSID_VER2_PATH_ERROR_LINE_COUNT)) {
cam_ife_csid_ver2_print_format_measure_info(csid_hw, res);
err_type |= CAM_ISP_HW_ERROR_CSID_FRAME_SIZE;
}
spin_unlock(&csid_hw->lock_state); spin_unlock(&csid_hw->lock_state);
if (err_type) { if (err_type) {

View File

@@ -623,5 +623,9 @@ int cam_ife_csid_hw_ver2_init(struct cam_hw_intf *csid_hw_intf,
bool is_custom); bool is_custom);
int cam_ife_csid_hw_ver2_deinit(struct cam_hw_info *hw_priv); int cam_ife_csid_hw_ver2_deinit(struct cam_hw_info *hw_priv);
void cam_ife_csid_ver2_print_illegal_programming_irq_status(void *csid_hw, void *res);
void cam_ife_csid_ver2_print_format_measure_info(void *csid_hw, void *res);
void cam_ife_csid_hw_ver2_mup_mismatch_handler(void *csid_hw, void *res);
void cam_ife_csid_hw_ver2_rdi_line_buffer_conflict_handler(void *csid_hw);
#endif #endif

View File

@@ -10,6 +10,7 @@
#include "cam_ife_csid_dev.h" #include "cam_ife_csid_dev.h"
#include "cam_ife_csid_hw_ver2.h" #include "cam_ife_csid_hw_ver2.h"
#include "cam_irq_controller.h" #include "cam_irq_controller.h"
#include "cam_isp_hw_mgr_intf.h"
static const struct cam_ife_csid_irq_desc cam_ife_csid_lite_680_rx_irq_desc[] = { static const struct cam_ife_csid_irq_desc cam_ife_csid_lite_680_rx_irq_desc[] = {
{ {
@@ -169,11 +170,15 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_lite_680_path_irq_desc[]
}, },
{ {
.bitmask = BIT(13), .bitmask = BIT(13),
.err_type = CAM_ISP_HW_ERROR_CSID_FRAME_SIZE,
.desc = "ERROR_PIX_COUNT", .desc = "ERROR_PIX_COUNT",
.err_handler = cam_ife_csid_ver2_print_format_measure_info,
}, },
{ {
.bitmask = BIT(14), .bitmask = BIT(14),
.desc = "ERROR_LINE_COUNT", .err_type = CAM_ISP_HW_ERROR_CSID_FRAME_SIZE,
.desc = "ERROR_PIX_COUNT",
.err_handler = cam_ife_csid_ver2_print_format_measure_info,
}, },
{ {
.bitmask = BIT(15), .bitmask = BIT(15),
@@ -193,6 +198,7 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_lite_680_path_irq_desc[]
}, },
{ {
.bitmask = BIT(19), .bitmask = BIT(19),
.err_type = CAM_ISP_HW_ERROR_RECOVERY_OVERFLOW,
.desc = "OVERFLOW_RECOVERY: Back pressure/output fifo ovrfl", .desc = "OVERFLOW_RECOVERY: Back pressure/output fifo ovrfl",
}, },
{ {
@@ -230,6 +236,7 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_lite_680_path_irq_desc[]
{ {
.bitmask = BIT(28), .bitmask = BIT(28),
.desc = "SENSOR_SWITCH_OUT_OF_SYNC_FRAME_DROP", .desc = "SENSOR_SWITCH_OUT_OF_SYNC_FRAME_DROP",
.err_handler = cam_ife_csid_hw_ver2_mup_mismatch_handler,
}, },
{ {
.bitmask = BIT(29), .bitmask = BIT(29),

View File

@@ -118,7 +118,9 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_lite_780_rx_irq_desc[] =
static const struct cam_ife_csid_irq_desc cam_ife_csid_lite_780_path_irq_desc[] = { static const struct cam_ife_csid_irq_desc cam_ife_csid_lite_780_path_irq_desc[] = {
{ {
.bitmask = BIT(0), .bitmask = BIT(0),
.err_type = CAM_ISP_HW_ERROR_CSID_FATAL,
.desc = "ILLEGAL_PROGRAMMING", .desc = "ILLEGAL_PROGRAMMING",
.err_handler = cam_ife_csid_ver2_print_illegal_programming_irq_status,
}, },
{ {
.bitmask = BIT(1), .bitmask = BIT(1),
@@ -170,11 +172,15 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_lite_780_path_irq_desc[]
}, },
{ {
.bitmask = BIT(13), .bitmask = BIT(13),
.err_type = CAM_ISP_HW_ERROR_CSID_FRAME_SIZE,
.desc = "ERROR_PIX_COUNT", .desc = "ERROR_PIX_COUNT",
.err_handler = cam_ife_csid_ver2_print_format_measure_info,
}, },
{ {
.bitmask = BIT(14), .bitmask = BIT(14),
.desc = "ERROR_LINE_COUNT", .err_type = CAM_ISP_HW_ERROR_CSID_FRAME_SIZE,
.desc = "ERROR_PIX_COUNT",
.err_handler = cam_ife_csid_ver2_print_format_measure_info,
}, },
{ {
.bitmask = BIT(15), .bitmask = BIT(15),
@@ -194,6 +200,7 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_lite_780_path_irq_desc[]
}, },
{ {
.bitmask = BIT(19), .bitmask = BIT(19),
.err_type = CAM_ISP_HW_ERROR_RECOVERY_OVERFLOW,
.desc = "OVERFLOW_RECOVERY: Back pressure/output fifo ovrfl", .desc = "OVERFLOW_RECOVERY: Back pressure/output fifo ovrfl",
}, },
{ {
@@ -231,6 +238,7 @@ static const struct cam_ife_csid_irq_desc cam_ife_csid_lite_780_path_irq_desc[]
{ {
.bitmask = BIT(28), .bitmask = BIT(28),
.desc = "SENSOR_SWITCH_OUT_OF_SYNC_FRAME_DROP", .desc = "SENSOR_SWITCH_OUT_OF_SYNC_FRAME_DROP",
.err_handler = cam_ife_csid_hw_ver2_mup_mismatch_handler,
}, },
{ {
.bitmask = BIT(29), .bitmask = BIT(29),
@@ -262,6 +270,7 @@ static const struct cam_ife_csid_top_irq_desc cam_ife_csid_lite_780_top_irq_desc
.err_type = CAM_ISP_HW_ERROR_CSID_FIFO_OVERFLOW, .err_type = CAM_ISP_HW_ERROR_CSID_FIFO_OVERFLOW,
.err_name = "ERROR_RDI_LINE_BUFFER_CONFLICT", .err_name = "ERROR_RDI_LINE_BUFFER_CONFLICT",
.desc = "Two or more RDIs programmed to access the shared line buffer", .desc = "Two or more RDIs programmed to access the shared line buffer",
.err_handler = cam_ife_csid_hw_ver2_rdi_line_buffer_conflict_handler,
}, },
}; };