msm: camera: isp: Add check for bus ports before sending bw vote to hw
Currently, bw vote is sent directly to top layer for each base index. In cases where no bus reador write port is acquired, the bw vote will be all zeros for that core, and can be interpreted as error. check acquire of bus ports before sending bw vote to hw. CRs-Fixed: 3020236 Change-Id: I1e9c1ae1fde0435f4defbd2f065a53190fd2c32a Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
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@@ -84,22 +84,33 @@ static int cam_ife_mgr_finish_clk_bw_update(
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clk_bw_args.request_id = request_id;
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for (i = 0; i < ctx->num_base; i++) {
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clk_bw_args.hw_intf = NULL;
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if (ctx->base[i].hw_type == CAM_ISP_HW_TYPE_VFE)
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CAM_DBG(CAM_PERF,
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"Clock/BW Update for req_id:%d i:%d num_vfe_out:%d num_sfe_out:%d in_rd:%d",
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request_id, i, ctx->num_acq_vfe_out, ctx->num_acq_sfe_out,
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!list_empty(&ctx->res_list_ife_in_rd));
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if ((ctx->base[i].hw_type == CAM_ISP_HW_TYPE_VFE) &&
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(ctx->num_acq_vfe_out || (!list_empty(&ctx->res_list_ife_in_rd))))
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clk_bw_args.hw_intf = g_ife_hw_mgr.ife_devices[ctx->base[i].idx]->hw_intf;
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else if (ctx->base[i].hw_type == CAM_ISP_HW_TYPE_SFE)
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else if ((ctx->base[i].hw_type == CAM_ISP_HW_TYPE_SFE) &&
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(ctx->num_acq_sfe_out || (!list_empty(&ctx->res_list_ife_in_rd))))
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clk_bw_args.hw_intf = g_ife_hw_mgr.sfe_devices[ctx->base[i].idx];
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else
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continue;
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CAM_DBG(CAM_PERF, "Apply Clock/BW for req_id:%d i:%d hw_idx=%d hw_type:%d",
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request_id, i, clk_bw_args.hw_intf->hw_idx, clk_bw_args.hw_intf->hw_type);
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rc |= clk_bw_args.hw_intf->hw_ops.process_cmd(clk_bw_args.hw_intf->hw_priv,
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CAM_DBG(CAM_PERF,
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"Apply Clock/BW for req_id:%d i:%d hw_idx=%d hw_type:%d num_vfe_out:%d num_sfe_out:%d in_rd:%d",
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request_id, i, clk_bw_args.hw_intf->hw_idx, clk_bw_args.hw_intf->hw_type,
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ctx->num_acq_vfe_out, ctx->num_acq_sfe_out,
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!list_empty(&ctx->res_list_ife_in_rd));
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rc = clk_bw_args.hw_intf->hw_ops.process_cmd(clk_bw_args.hw_intf->hw_priv,
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CAM_ISP_HW_CMD_APPLY_CLK_BW_UPDATE, &clk_bw_args,
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sizeof(struct cam_isp_apply_clk_bw_args));
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if (rc)
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if (rc) {
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CAM_ERR(CAM_PERF,
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"Finish Clock/BW Update failed i:%d hw_idx=%d hw_type:%d rc:%d",
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i, ctx->base[i].idx, ctx->base[i].hw_type, rc);
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"Finish Clock/BW Update failed req_id:%d i:%d hw_idx=%d hw_type:%d rc:%d",
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request_id, i, ctx->base[i].idx, ctx->base[i].hw_type, rc);
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break;
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}
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}
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return rc;
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@@ -1527,8 +1538,10 @@ static int cam_ife_hw_mgr_release_hw_for_ctx(
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struct cam_isp_hw_mgr_res *hw_mgr_res_temp;
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/* ife leaf resource */
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for (i = 0; i < max_ife_out_res; i++)
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for (i = 0; i < max_ife_out_res; i++) {
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cam_ife_hw_mgr_free_hw_res(&ife_ctx->res_list_ife_out[i]);
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ife_ctx->num_acq_vfe_out--;
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}
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/* fetch rd resource */
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list_for_each_entry_safe(hw_mgr_res, hw_mgr_res_temp,
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@@ -1546,9 +1559,11 @@ static int cam_ife_hw_mgr_release_hw_for_ctx(
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if (ife_ctx->ctx_type == CAM_IFE_CTX_TYPE_SFE) {
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/* sfe leaf resource */
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for (i = 0; i < CAM_SFE_HW_OUT_RES_MAX; i++)
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for (i = 0; i < CAM_SFE_HW_OUT_RES_MAX; i++) {
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cam_ife_hw_mgr_free_hw_res(
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&ife_ctx->res_list_sfe_out[i]);
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ife_ctx->num_acq_sfe_out--;
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}
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/* sfe source resource */
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list_for_each_entry_safe(hw_mgr_res, hw_mgr_res_temp,
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@@ -1830,6 +1845,7 @@ static int cam_ife_hw_mgr_acquire_res_ife_out_rdi(
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ife_out_res->res_id = vfe_out_res_id;
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ife_out_res->res_type = CAM_ISP_RESOURCE_VFE_OUT;
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ife_src_res->num_children++;
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ife_ctx->num_acq_vfe_out++;
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return 0;
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err:
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@@ -1925,6 +1941,7 @@ static int cam_ife_hw_mgr_acquire_res_ife_out_pixel(
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ife_out_res->res_type = CAM_ISP_RESOURCE_VFE_OUT;
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ife_out_res->res_id = out_port->res_type;
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ife_src_res->num_children++;
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ife_ctx->num_acq_vfe_out++;
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}
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return 0;
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@@ -2021,6 +2038,7 @@ static int cam_ife_hw_mgr_acquire_res_sfe_out_rdi(
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sfe_out_res->res_id = sfe_out_res_id;
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sfe_out_res->res_type = CAM_ISP_RESOURCE_SFE_OUT;
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sfe_src_res->num_children++;
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ife_ctx->num_acq_sfe_out++;
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return 0;
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err:
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@@ -2104,6 +2122,7 @@ static int cam_ife_hw_mgr_acquire_res_sfe_out_pix(
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sfe_out_res->res_type = CAM_ISP_RESOURCE_SFE_OUT;
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sfe_out_res->res_id = out_port->res_type;
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sfe_src_res->num_children++;
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ife_ctx->num_acq_sfe_out++;
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}
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return 0;
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@@ -4699,6 +4718,8 @@ static int cam_ife_mgr_acquire_hw(void *hw_mgr_priv, void *acquire_hw_args)
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ife_ctx->ctx_config = 0;
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ife_ctx->cdm_handle = 0;
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ife_ctx->ctx_type = CAM_IFE_CTX_TYPE_NONE;
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ife_ctx->num_acq_vfe_out = 0;
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ife_ctx->num_acq_sfe_out = 0;
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ife_ctx->common.cb_priv = acquire_args->context_data;
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ife_ctx->common.mini_dump_cb = acquire_args->mini_dump_cb;
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@@ -6719,6 +6740,8 @@ static int cam_ife_mgr_release_hw(void *hw_mgr_priv,
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ctx->left_hw_idx = 0;
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ctx->right_hw_idx = 0;
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ctx->sfe_info.num_fetches = 0;
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ctx->num_acq_vfe_out = 0;
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ctx->num_acq_sfe_out = 0;
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kfree(ctx->sfe_info.scratch_config);
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ctx->sfe_info.scratch_config = NULL;
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@@ -193,6 +193,8 @@ struct cam_ife_hw_mgr_ctx_flags {
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* @res_list_ife_in_rd IFE/SFE input resource list for read path
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* @res_list_ife_out: IFE output resoruces array
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* @res_list_sfe_out: SFE output resources array
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* @num_acq_vfe_out: Number of acquired VFE out resources
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* @num_acq_sfe_out: Number of acquired SFE out resources
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* @free_res_list: Free resources list for the branch node
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* @res_pool: memory storage for the free resource list
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* @irq_status0_mask: irq_status0_mask for the context
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@@ -247,6 +249,8 @@ struct cam_ife_hw_mgr_ctx {
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CAM_SFE_HW_OUT_RES_MAX];
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struct list_head free_res_list;
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struct cam_isp_hw_mgr_res res_pool[CAM_IFE_HW_RES_POOL_MAX];
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uint32_t num_acq_vfe_out;
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uint32_t num_acq_sfe_out;
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uint32_t irq_status0_mask[CAM_IFE_HW_NUM_MAX];
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uint32_t irq_status1_mask[CAM_IFE_HW_NUM_MAX];
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