asoc: codecs: Add support to compile internal codec as module
Separate compilation of analog and digital codec and add support to compile them as dynamic module. Change-Id: I81f01bf60aef71f67e025fa4ff1ba805a960e61d Signed-off-by: Rohit Kumar <rohitkr@codeaurora.org>
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commit
4b5bd80a91
@@ -1,2 +1,4 @@
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snd-soc-sdm660-cdc-objs := msm-analog-cdc.o msm-digital-cdc.o sdm660-regmap.o
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snd-soc-analog-cdc-objs := sdm660-cdc-irq.o msm-analog-cdc.o
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obj-$(CONFIG_SND_SOC_SDM660_CDC) += snd-soc-sdm660-cdc.o sdm660-cdc-irq.o
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snd-soc-digital-cdc-objs := msm-digital-cdc.o msm-digital-cdc-regmap.o
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obj-$(CONFIG_SND_SOC_ANALOG_CDC) += snd-soc-analog-cdc.o
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obj-$(CONFIG_SND_SOC_DIGITAL_CDC) += snd-soc-digital-cdc.o
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186
asoc/codecs/sdm660_cdc/msm-analog-cdc-regmap.h
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186
asoc/codecs/sdm660_cdc/msm-analog-cdc-regmap.h
Normal file
@@ -0,0 +1,186 @@
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/*
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* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef ANALOG_CDC_REGMAP_H
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#define ANALOG_CDC_REGMAP_H
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#include <linux/regmap.h>
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#include "sdm660-cdc-registers.h"
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/*
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* Default register reset values that are common across different versions
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* are defined here. If a register reset value is changed based on version
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* then remove it from this structure and add it in version specific
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* structures.
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*/
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struct reg_default
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msm89xx_pmic_cdc_defaults[MSM89XX_PMIC_CDC_CACHE_SIZE] = {
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{MSM89XX_PMIC_DIGITAL_REVISION1, 0x00},
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{MSM89XX_PMIC_DIGITAL_REVISION2, 0x00},
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{MSM89XX_PMIC_DIGITAL_PERPH_TYPE, 0x23},
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{MSM89XX_PMIC_DIGITAL_PERPH_SUBTYPE, 0x01},
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{MSM89XX_PMIC_DIGITAL_INT_RT_STS, 0x00},
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{MSM89XX_PMIC_DIGITAL_INT_SET_TYPE, 0xFF},
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{MSM89XX_PMIC_DIGITAL_INT_POLARITY_HIGH, 0xFF},
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{MSM89XX_PMIC_DIGITAL_INT_POLARITY_LOW, 0x00},
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{MSM89XX_PMIC_DIGITAL_INT_LATCHED_CLR, 0x00},
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{MSM89XX_PMIC_DIGITAL_INT_EN_SET, 0x00},
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{MSM89XX_PMIC_DIGITAL_INT_EN_CLR, 0x00},
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{MSM89XX_PMIC_DIGITAL_INT_LATCHED_STS, 0x00},
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{MSM89XX_PMIC_DIGITAL_INT_PENDING_STS, 0x00},
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{MSM89XX_PMIC_DIGITAL_INT_MID_SEL, 0x00},
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{MSM89XX_PMIC_DIGITAL_INT_PRIORITY, 0x00},
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{MSM89XX_PMIC_DIGITAL_GPIO_MODE, 0x00},
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{MSM89XX_PMIC_DIGITAL_PIN_CTL_OE, 0x01},
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{MSM89XX_PMIC_DIGITAL_PIN_CTL_DATA, 0x00},
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{MSM89XX_PMIC_DIGITAL_PIN_STATUS, 0x00},
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{MSM89XX_PMIC_DIGITAL_HDRIVE_CTL, 0x00},
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{MSM89XX_PMIC_DIGITAL_CDC_RST_CTL, 0x00},
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{MSM89XX_PMIC_DIGITAL_CDC_TOP_CLK_CTL, 0x00},
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{MSM89XX_PMIC_DIGITAL_CDC_ANA_CLK_CTL, 0x00},
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{MSM89XX_PMIC_DIGITAL_CDC_DIG_CLK_CTL, 0x00},
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{MSM89XX_PMIC_DIGITAL_CDC_CONN_TX1_CTL, 0x02},
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{MSM89XX_PMIC_DIGITAL_CDC_CONN_TX2_CTL, 0x02},
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{MSM89XX_PMIC_DIGITAL_CDC_CONN_HPHR_DAC_CTL, 0x00},
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{MSM89XX_PMIC_DIGITAL_CDC_CONN_RX1_CTL, 0x00},
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{MSM89XX_PMIC_DIGITAL_CDC_CONN_RX2_CTL, 0x00},
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{MSM89XX_PMIC_DIGITAL_CDC_CONN_RX3_CTL, 0x00},
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{MSM89XX_PMIC_DIGITAL_CDC_CONN_RX_LB_CTL, 0x00},
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{MSM89XX_PMIC_DIGITAL_CDC_RX_CTL1, 0x7C},
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{MSM89XX_PMIC_DIGITAL_CDC_RX_CTL2, 0x7C},
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{MSM89XX_PMIC_DIGITAL_CDC_RX_CTL3, 0x7C},
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{MSM89XX_PMIC_DIGITAL_DEM_BYPASS_DATA0, 0x00},
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{MSM89XX_PMIC_DIGITAL_DEM_BYPASS_DATA1, 0x00},
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{MSM89XX_PMIC_DIGITAL_DEM_BYPASS_DATA2, 0x00},
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{MSM89XX_PMIC_DIGITAL_DEM_BYPASS_DATA3, 0x00},
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{MSM89XX_PMIC_DIGITAL_DIG_DEBUG_CTL, 0x00},
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{MSM89XX_PMIC_DIGITAL_DIG_DEBUG_EN, 0x00},
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{MSM89XX_PMIC_DIGITAL_SPARE_0, 0x00},
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{MSM89XX_PMIC_DIGITAL_SPARE_1, 0x00},
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{MSM89XX_PMIC_DIGITAL_SPARE_2, 0x00},
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{MSM89XX_PMIC_DIGITAL_SEC_ACCESS, 0x00},
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{MSM89XX_PMIC_DIGITAL_PERPH_RESET_CTL1, 0x00},
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{MSM89XX_PMIC_DIGITAL_PERPH_RESET_CTL2, 0x02},
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{MSM89XX_PMIC_DIGITAL_PERPH_RESET_CTL3, 0x05},
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{MSM89XX_PMIC_DIGITAL_PERPH_RESET_CTL4, 0x00},
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{MSM89XX_PMIC_DIGITAL_INT_TEST1, 0x00},
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{MSM89XX_PMIC_DIGITAL_INT_TEST_VAL, 0x00},
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{MSM89XX_PMIC_DIGITAL_TRIM_NUM, 0x00},
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{MSM89XX_PMIC_DIGITAL_TRIM_CTRL, 0x00},
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{MSM89XX_PMIC_ANALOG_REVISION1, 0x00},
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{MSM89XX_PMIC_ANALOG_REVISION2, 0x00},
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{MSM89XX_PMIC_ANALOG_REVISION3, 0x00},
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{MSM89XX_PMIC_ANALOG_REVISION4, 0x00},
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{MSM89XX_PMIC_ANALOG_PERPH_TYPE, 0x23},
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{MSM89XX_PMIC_ANALOG_PERPH_SUBTYPE, 0x09},
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{MSM89XX_PMIC_ANALOG_INT_RT_STS, 0x00},
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{MSM89XX_PMIC_ANALOG_INT_SET_TYPE, 0x3F},
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{MSM89XX_PMIC_ANALOG_INT_POLARITY_HIGH, 0x3F},
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{MSM89XX_PMIC_ANALOG_INT_POLARITY_LOW, 0x00},
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{MSM89XX_PMIC_ANALOG_INT_LATCHED_CLR, 0x00},
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{MSM89XX_PMIC_ANALOG_INT_EN_SET, 0x00},
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{MSM89XX_PMIC_ANALOG_INT_EN_CLR, 0x00},
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{MSM89XX_PMIC_ANALOG_INT_LATCHED_STS, 0x00},
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{MSM89XX_PMIC_ANALOG_INT_PENDING_STS, 0x00},
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{MSM89XX_PMIC_ANALOG_INT_MID_SEL, 0x00},
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{MSM89XX_PMIC_ANALOG_INT_PRIORITY, 0x00},
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{MSM89XX_PMIC_ANALOG_MICB_1_EN, 0x00},
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{MSM89XX_PMIC_ANALOG_MICB_1_VAL, 0x20},
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{MSM89XX_PMIC_ANALOG_MICB_1_CTL, 0x00},
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{MSM89XX_PMIC_ANALOG_MICB_1_INT_RBIAS, 0x49},
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{MSM89XX_PMIC_ANALOG_MICB_2_EN, 0x20},
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{MSM89XX_PMIC_ANALOG_TX_1_2_ATEST_CTL_2, 0x00},
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{MSM89XX_PMIC_ANALOG_MASTER_BIAS_CTL, 0x00},
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{MSM89XX_PMIC_ANALOG_MBHC_DET_CTL_1, 0x35},
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{MSM89XX_PMIC_ANALOG_MBHC_DET_CTL_2, 0x08},
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{MSM89XX_PMIC_ANALOG_MBHC_FSM_CTL, 0x00},
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{MSM89XX_PMIC_ANALOG_MBHC_DBNC_TIMER, 0x98},
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{MSM89XX_PMIC_ANALOG_MBHC_BTN0_ZDETL_CTL, 0x00},
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{MSM89XX_PMIC_ANALOG_MBHC_BTN1_ZDETM_CTL, 0x20},
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{MSM89XX_PMIC_ANALOG_MBHC_BTN2_ZDETH_CTL, 0x40},
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{MSM89XX_PMIC_ANALOG_MBHC_BTN3_CTL, 0x61},
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{MSM89XX_PMIC_ANALOG_MBHC_BTN4_CTL, 0x80},
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{MSM89XX_PMIC_ANALOG_MBHC_BTN_RESULT, 0x00},
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{MSM89XX_PMIC_ANALOG_MBHC_ZDET_ELECT_RESULT, 0x00},
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{MSM89XX_PMIC_ANALOG_TX_1_EN, 0x03},
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{MSM89XX_PMIC_ANALOG_TX_2_EN, 0x03},
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{MSM89XX_PMIC_ANALOG_TX_1_2_TEST_CTL_1, 0xBF},
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{MSM89XX_PMIC_ANALOG_TX_1_2_TEST_CTL_2, 0x8C},
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{MSM89XX_PMIC_ANALOG_TX_1_2_ATEST_CTL, 0x00},
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{MSM89XX_PMIC_ANALOG_TX_1_2_OPAMP_BIAS, 0x6B},
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{MSM89XX_PMIC_ANALOG_TX_1_2_TXFE_CLKDIV, 0x51},
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{MSM89XX_PMIC_ANALOG_TX_3_EN, 0x02},
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{MSM89XX_PMIC_ANALOG_NCP_EN, 0x26},
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{MSM89XX_PMIC_ANALOG_NCP_CLK, 0x23},
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{MSM89XX_PMIC_ANALOG_NCP_DEGLITCH, 0x5B},
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{MSM89XX_PMIC_ANALOG_NCP_FBCTRL, 0x08},
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{MSM89XX_PMIC_ANALOG_NCP_BIAS, 0x29},
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{MSM89XX_PMIC_ANALOG_NCP_VCTRL, 0x24},
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{MSM89XX_PMIC_ANALOG_NCP_TEST, 0x00},
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{MSM89XX_PMIC_ANALOG_NCP_CLIM_ADDR, 0xD5},
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{MSM89XX_PMIC_ANALOG_RX_CLOCK_DIVIDER, 0xE8},
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{MSM89XX_PMIC_ANALOG_RX_COM_OCP_CTL, 0xCF},
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{MSM89XX_PMIC_ANALOG_RX_COM_OCP_COUNT, 0x6E},
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{MSM89XX_PMIC_ANALOG_RX_COM_BIAS_DAC, 0x18},
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{MSM89XX_PMIC_ANALOG_RX_HPH_BIAS_PA, 0x5A},
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{MSM89XX_PMIC_ANALOG_RX_HPH_BIAS_LDO_OCP, 0x69},
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{MSM89XX_PMIC_ANALOG_RX_HPH_BIAS_CNP, 0x29},
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{MSM89XX_PMIC_ANALOG_RX_HPH_CNP_EN, 0x80},
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{MSM89XX_PMIC_ANALOG_RX_HPH_CNP_WG_CTL, 0xDA},
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{MSM89XX_PMIC_ANALOG_RX_HPH_CNP_WG_TIME, 0x16},
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{MSM89XX_PMIC_ANALOG_RX_HPH_L_TEST, 0x00},
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{MSM89XX_PMIC_ANALOG_RX_HPH_L_PA_DAC_CTL, 0x20},
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{MSM89XX_PMIC_ANALOG_RX_HPH_R_TEST, 0x00},
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{MSM89XX_PMIC_ANALOG_RX_HPH_R_PA_DAC_CTL, 0x20},
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{MSM89XX_PMIC_ANALOG_RX_EAR_CTL, 0x12},
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{MSM89XX_PMIC_ANALOG_RX_ATEST, 0x00},
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{MSM89XX_PMIC_ANALOG_RX_HPH_STATUS, 0x0C},
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{MSM89XX_PMIC_ANALOG_RX_EAR_STATUS, 0x00},
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{MSM89XX_PMIC_ANALOG_RX_LO_DAC_CTL, 0x00},
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{MSM89XX_PMIC_ANALOG_RX_LO_EN_CTL, 0x00},
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{MSM89XX_PMIC_ANALOG_SPKR_DAC_CTL, 0x83},
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{MSM89XX_PMIC_ANALOG_SPKR_DRV_CLIP_DET, 0x91},
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{MSM89XX_PMIC_ANALOG_SPKR_DRV_CTL, 0x29},
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{MSM89XX_PMIC_ANALOG_SPKR_ANA_BIAS_SET, 0x4D},
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{MSM89XX_PMIC_ANALOG_SPKR_OCP_CTL, 0xE1},
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{MSM89XX_PMIC_ANALOG_SPKR_PWRSTG_CTL, 0x1E},
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{MSM89XX_PMIC_ANALOG_SPKR_DRV_MISC, 0xCB},
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{MSM89XX_PMIC_ANALOG_SPKR_DRV_DBG, 0x00},
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{MSM89XX_PMIC_ANALOG_CURRENT_LIMIT, 0x02},
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{MSM89XX_PMIC_ANALOG_OUTPUT_VOLTAGE, 0x14},
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{MSM89XX_PMIC_ANALOG_BYPASS_MODE, 0x00},
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{MSM89XX_PMIC_ANALOG_BOOST_EN_CTL, 0x1F},
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{MSM89XX_PMIC_ANALOG_SLOPE_COMP_IP_ZERO, 0x8C},
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{MSM89XX_PMIC_ANALOG_RDSON_MAX_DUTY_CYCLE, 0xC0},
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{MSM89XX_PMIC_ANALOG_BOOST_TEST1_1, 0x00},
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{MSM89XX_PMIC_ANALOG_BOOST_TEST_2, 0x00},
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{MSM89XX_PMIC_ANALOG_SPKR_SAR_STATUS, 0x00},
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{MSM89XX_PMIC_ANALOG_SPKR_DRV_STATUS, 0x00},
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{MSM89XX_PMIC_ANALOG_PBUS_ADD_CSR, 0x00},
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{MSM89XX_PMIC_ANALOG_PBUS_ADD_SEL, 0x00},
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{MSM89XX_PMIC_ANALOG_SEC_ACCESS, 0x00},
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{MSM89XX_PMIC_ANALOG_PERPH_RESET_CTL1, 0x00},
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{MSM89XX_PMIC_ANALOG_PERPH_RESET_CTL2, 0x01},
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{MSM89XX_PMIC_ANALOG_PERPH_RESET_CTL3, 0x05},
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{MSM89XX_PMIC_ANALOG_PERPH_RESET_CTL4, 0x00},
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{MSM89XX_PMIC_ANALOG_INT_TEST1, 0x00},
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{MSM89XX_PMIC_ANALOG_INT_TEST_VAL, 0x00},
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{MSM89XX_PMIC_ANALOG_TRIM_NUM, 0x04},
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{MSM89XX_PMIC_ANALOG_TRIM_CTRL1, 0x00},
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{MSM89XX_PMIC_ANALOG_TRIM_CTRL2, 0x00},
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{MSM89XX_PMIC_ANALOG_TRIM_CTRL3, 0x00},
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{MSM89XX_PMIC_ANALOG_TRIM_CTRL4, 0x00},
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};
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#endif
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@@ -30,7 +30,7 @@
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#include "msm-analog-cdc.h"
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#include "msm-analog-cdc.h"
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#include "msm-cdc-common.h"
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#include "msm-cdc-common.h"
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#include "sdm660-cdc-irq.h"
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#include "sdm660-cdc-irq.h"
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#include "sdm660-cdc-registers.h"
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#include "msm-analog-cdc-regmap.h"
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#include "../../sdm660-common.h"
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#include "../../sdm660-common.h"
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#include "../wcd-mbhc-v2-api.h"
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#include "../wcd-mbhc-v2-api.h"
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@@ -351,6 +351,7 @@ void msm_anlg_cdc_spk_ext_pa_cb(
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dev_dbg(codec->dev, "%s: Enter\n", __func__);
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dev_dbg(codec->dev, "%s: Enter\n", __func__);
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sdm660_cdc->codec_spk_ext_pa_cb = codec_spk_ext_pa;
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sdm660_cdc->codec_spk_ext_pa_cb = codec_spk_ext_pa;
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}
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}
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EXPORT_SYMBOL(msm_anlg_cdc_spk_ext_pa_cb);
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static void msm_anlg_cdc_compute_impedance(struct snd_soc_codec *codec, s16 l,
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static void msm_anlg_cdc_compute_impedance(struct snd_soc_codec *codec, s16 l,
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s16 r, uint32_t *zl, uint32_t *zr,
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s16 r, uint32_t *zl, uint32_t *zr,
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@@ -3172,6 +3173,7 @@ int msm_anlg_cdc_mclk_enable(struct snd_soc_codec *codec,
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}
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}
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return 0;
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return 0;
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}
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}
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EXPORT_SYMBOL(msm_anlg_cdc_mclk_enable);
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static int msm_anlg_cdc_set_dai_sysclk(struct snd_soc_dai *dai,
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static int msm_anlg_cdc_set_dai_sysclk(struct snd_soc_dai *dai,
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int clk_id, unsigned int freq, int dir)
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int clk_id, unsigned int freq, int dir)
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@@ -154,165 +154,6 @@ struct reg_default
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{MSM89XX_CDC_CORE_TX4_DMIC_CTL, 0x00},
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{MSM89XX_CDC_CORE_TX4_DMIC_CTL, 0x00},
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};
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};
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struct reg_default
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msm89xx_pmic_cdc_defaults[MSM89XX_PMIC_CDC_CACHE_SIZE] = {
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{MSM89XX_PMIC_DIGITAL_REVISION1, 0x00},
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{MSM89XX_PMIC_DIGITAL_REVISION2, 0x00},
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{MSM89XX_PMIC_DIGITAL_PERPH_TYPE, 0x23},
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{MSM89XX_PMIC_DIGITAL_PERPH_SUBTYPE, 0x01},
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{MSM89XX_PMIC_DIGITAL_INT_RT_STS, 0x00},
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{MSM89XX_PMIC_DIGITAL_INT_SET_TYPE, 0xFF},
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{MSM89XX_PMIC_DIGITAL_INT_POLARITY_HIGH, 0xFF},
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{MSM89XX_PMIC_DIGITAL_INT_POLARITY_LOW, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_INT_LATCHED_CLR, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_INT_EN_SET, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_INT_EN_CLR, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_INT_LATCHED_STS, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_INT_PENDING_STS, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_INT_MID_SEL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_INT_PRIORITY, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_GPIO_MODE, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_PIN_CTL_OE, 0x01},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_PIN_CTL_DATA, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_PIN_STATUS, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_HDRIVE_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_RST_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_TOP_CLK_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_ANA_CLK_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_DIG_CLK_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_CONN_TX1_CTL, 0x02},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_CONN_TX2_CTL, 0x02},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_CONN_HPHR_DAC_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_CONN_RX1_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_CONN_RX2_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_CONN_RX3_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_CONN_RX_LB_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_RX_CTL1, 0x7C},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_RX_CTL2, 0x7C},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_CDC_RX_CTL3, 0x7C},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_DEM_BYPASS_DATA0, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_DEM_BYPASS_DATA1, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_DEM_BYPASS_DATA2, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_DEM_BYPASS_DATA3, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_DIG_DEBUG_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_DIG_DEBUG_EN, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_SPARE_0, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_SPARE_1, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_SPARE_2, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_SEC_ACCESS, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_PERPH_RESET_CTL1, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_PERPH_RESET_CTL2, 0x02},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_PERPH_RESET_CTL3, 0x05},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_PERPH_RESET_CTL4, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_INT_TEST1, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_INT_TEST_VAL, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_TRIM_NUM, 0x00},
|
|
||||||
{MSM89XX_PMIC_DIGITAL_TRIM_CTRL, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_REVISION1, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_REVISION2, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_REVISION3, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_REVISION4, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_PERPH_TYPE, 0x23},
|
|
||||||
{MSM89XX_PMIC_ANALOG_PERPH_SUBTYPE, 0x09},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_RT_STS, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_SET_TYPE, 0x3F},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_POLARITY_HIGH, 0x3F},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_POLARITY_LOW, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_LATCHED_CLR, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_EN_SET, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_EN_CLR, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_LATCHED_STS, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_PENDING_STS, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_MID_SEL, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_PRIORITY, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MICB_1_EN, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MICB_1_VAL, 0x20},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MICB_1_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MICB_1_INT_RBIAS, 0x49},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MICB_2_EN, 0x20},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TX_1_2_ATEST_CTL_2, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MASTER_BIAS_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MBHC_DET_CTL_1, 0x35},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MBHC_DET_CTL_2, 0x08},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MBHC_FSM_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MBHC_DBNC_TIMER, 0x98},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MBHC_BTN0_ZDETL_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MBHC_BTN1_ZDETM_CTL, 0x20},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MBHC_BTN2_ZDETH_CTL, 0x40},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MBHC_BTN3_CTL, 0x61},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MBHC_BTN4_CTL, 0x80},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MBHC_BTN_RESULT, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_MBHC_ZDET_ELECT_RESULT, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TX_1_EN, 0x03},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TX_2_EN, 0x03},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TX_1_2_TEST_CTL_1, 0xBF},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TX_1_2_TEST_CTL_2, 0x8C},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TX_1_2_ATEST_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TX_1_2_OPAMP_BIAS, 0x6B},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TX_1_2_TXFE_CLKDIV, 0x51},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TX_3_EN, 0x02},
|
|
||||||
{MSM89XX_PMIC_ANALOG_NCP_EN, 0x26},
|
|
||||||
{MSM89XX_PMIC_ANALOG_NCP_CLK, 0x23},
|
|
||||||
{MSM89XX_PMIC_ANALOG_NCP_DEGLITCH, 0x5B},
|
|
||||||
{MSM89XX_PMIC_ANALOG_NCP_FBCTRL, 0x08},
|
|
||||||
{MSM89XX_PMIC_ANALOG_NCP_BIAS, 0x29},
|
|
||||||
{MSM89XX_PMIC_ANALOG_NCP_VCTRL, 0x24},
|
|
||||||
{MSM89XX_PMIC_ANALOG_NCP_TEST, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_NCP_CLIM_ADDR, 0xD5},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_CLOCK_DIVIDER, 0xE8},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_COM_OCP_CTL, 0xCF},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_COM_OCP_COUNT, 0x6E},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_COM_BIAS_DAC, 0x18},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_HPH_BIAS_PA, 0x5A},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_HPH_BIAS_LDO_OCP, 0x69},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_HPH_BIAS_CNP, 0x29},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_HPH_CNP_EN, 0x80},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_HPH_CNP_WG_CTL, 0xDA},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_HPH_CNP_WG_TIME, 0x16},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_HPH_L_TEST, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_HPH_L_PA_DAC_CTL, 0x20},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_HPH_R_TEST, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_HPH_R_PA_DAC_CTL, 0x20},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_EAR_CTL, 0x12},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_ATEST, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_HPH_STATUS, 0x0C},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_EAR_STATUS, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_LO_DAC_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RX_LO_EN_CTL, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_SPKR_DAC_CTL, 0x83},
|
|
||||||
{MSM89XX_PMIC_ANALOG_SPKR_DRV_CLIP_DET, 0x91},
|
|
||||||
{MSM89XX_PMIC_ANALOG_SPKR_DRV_CTL, 0x29},
|
|
||||||
{MSM89XX_PMIC_ANALOG_SPKR_ANA_BIAS_SET, 0x4D},
|
|
||||||
{MSM89XX_PMIC_ANALOG_SPKR_OCP_CTL, 0xE1},
|
|
||||||
{MSM89XX_PMIC_ANALOG_SPKR_PWRSTG_CTL, 0x1E},
|
|
||||||
{MSM89XX_PMIC_ANALOG_SPKR_DRV_MISC, 0xCB},
|
|
||||||
{MSM89XX_PMIC_ANALOG_SPKR_DRV_DBG, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_CURRENT_LIMIT, 0x02},
|
|
||||||
{MSM89XX_PMIC_ANALOG_OUTPUT_VOLTAGE, 0x14},
|
|
||||||
{MSM89XX_PMIC_ANALOG_BYPASS_MODE, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_BOOST_EN_CTL, 0x1F},
|
|
||||||
{MSM89XX_PMIC_ANALOG_SLOPE_COMP_IP_ZERO, 0x8C},
|
|
||||||
{MSM89XX_PMIC_ANALOG_RDSON_MAX_DUTY_CYCLE, 0xC0},
|
|
||||||
{MSM89XX_PMIC_ANALOG_BOOST_TEST1_1, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_BOOST_TEST_2, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_SPKR_SAR_STATUS, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_SPKR_DRV_STATUS, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_PBUS_ADD_CSR, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_PBUS_ADD_SEL, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_SEC_ACCESS, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_PERPH_RESET_CTL1, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_PERPH_RESET_CTL2, 0x01},
|
|
||||||
{MSM89XX_PMIC_ANALOG_PERPH_RESET_CTL3, 0x05},
|
|
||||||
{MSM89XX_PMIC_ANALOG_PERPH_RESET_CTL4, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_TEST1, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_INT_TEST_VAL, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TRIM_NUM, 0x04},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TRIM_CTRL1, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TRIM_CTRL2, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TRIM_CTRL3, 0x00},
|
|
||||||
{MSM89XX_PMIC_ANALOG_TRIM_CTRL4, 0x00},
|
|
||||||
};
|
|
||||||
|
|
||||||
static const u8 msm89xx_cdc_core_reg_readable[MSM89XX_CDC_CORE_CACHE_SIZE] = {
|
static const u8 msm89xx_cdc_core_reg_readable[MSM89XX_CDC_CORE_CACHE_SIZE] = {
|
||||||
[MSM89XX_CDC_CORE_CLK_RX_RESET_CTL] = 1,
|
[MSM89XX_CDC_CORE_CLK_RX_RESET_CTL] = 1,
|
||||||
[MSM89XX_CDC_CORE_CLK_TX_RESET_B1_CTL] = 1,
|
[MSM89XX_CDC_CORE_CLK_TX_RESET_B1_CTL] = 1,
|
Reference in New Issue
Block a user