qcacld-3.0: Populate EHT MAC and PHY Caps to peer_assoc_params

Populate EHT MAC and PHY Caps to peer_assoc_params based on D1.0
definitions.

Also refine EHT MAC and PHY Caps logging.

Change-Id: I405ae01a1452e884137e368cceaf13ef2c670530
CRs-Fixed: 3001664

core/wma/src/wma_eht.c

@@ -195,20 +195,183 @@ void wma_print_eht_cap(tDot11fIEeht_cap *eht_cap)
 		return;
 
 	wma_debug("EHT Capabilities:");
+
+	/* EHT MAC Capabilities */
+	wma_nofl_debug("\tNSEP Priority Access: 0x%01x",
+		       eht_cap->nsep_pri_access);
+	wma_nofl_debug("\tOM Control: 0x%1x", eht_cap->eht_om_ctl);
+	wma_nofl_debug("\tTriggered TXOP Sharing: 0x%1x",
+		       eht_cap->triggered_txop_sharing);
+
+	/* EHT PHY Capabilities */
+	wma_nofl_debug("\t320 MHz In 6 GHz: 0x%0x1x",
+		       eht_cap->support_320mhz_6ghz);
+	wma_nofl_debug("\t242-tone RU In BW Wider Than 20 MHz: 0x%1x",
+		       eht_cap->ru_242tone_wt_20mhz);
+	wma_nofl_debug("\tNDP With 4x EHT-LTF And 3.2 us GI: 0x%1x",
+		       eht_cap->ndp_4x_eht_ltf_3dot2_us_gi);
+	wma_nofl_debug("\tPartial Bandwidth UL MU-MIMO: 0x%1x",
+		       eht_cap->partial_bw_mu_mimo);
+	wma_nofl_debug("\tSU Beamformer: 0x%1x", eht_cap->su_beamformer);
+	wma_nofl_debug("\tSU Beamformee: 0x%1x", eht_cap->su_beamformee);
+	wma_nofl_debug("\tBeamformee SS <= 80 MHz: 0x%3x",
+		       eht_cap->bfee_ss_le_80mhz);
+	wma_nofl_debug("\tBeamformee SS = 160 MHz: 0x%3x",
+		       eht_cap->bfee_ss_160mhz);
+	wma_nofl_debug("\tBeamformee SS = 320 MHz: 0x%3x",
+		       eht_cap->bfee_ss_320mhz);
+	wma_nofl_debug("\tNumber Of Sounding Dimensions <= 80 MHz: 0x%3x",
+		       eht_cap->num_sounding_dim_le_80mhz);
+	wma_nofl_debug("\tNumber Of Sounding Dimensions = 160 MHz: 0x%3x",
+		       eht_cap->num_sounding_dim_160mhz);
+	wma_nofl_debug("\tNumber Of Sounding Dimensions = 320 MHz: 0x%3x",
+		       eht_cap->num_sounding_dim_320mhz);
+	wma_nofl_debug("\tNg = 16 SU Feedback: 0x%1x",
+		       eht_cap->ng_16_su_feedback);
+	wma_nofl_debug("\tNg = 16 MU Feedback: 0x%1x",
+		       eht_cap->ng_16_mu_feedback);
+	wma_nofl_debug("\tCodebook Size 4 2 SU Feedback: 0x%1x",
+		       eht_cap->cb_sz_4_2_su_feedback);
+	wma_nofl_debug("\tCodebook Size 7 5 MU Feedback: 0x%1x",
+		       eht_cap->cb_sz_7_5_su_feedback);
+	wma_nofl_debug("\tTriggered SU Beamforming Feedback: 0x%1x",
+		       eht_cap->trig_su_bforming_feedback);
+	wma_nofl_debug("\tTriggered MU Beamforming Partial BW Feedback: 0x%1x",
+		       eht_cap->trig_mu_bforming_partial_bw_feedback);
+	wma_nofl_debug("\tTriggered CQI Feedback: 0x%1x",
+		       eht_cap->triggered_cqi_feedback);
+	wma_nofl_debug("\tPartial Bandwidth DL MU-MIMO: 0x%1x",
+		       eht_cap->partial_bw_dl_mu_mimo);
+	wma_nofl_debug("\tPSR-Based SR: 0x%1x", eht_cap->psr_based_sr);
+	wma_nofl_debug("\tPower Boost Factor: 0x%1x",
+		       eht_cap->power_boost_factor);
+	wma_nofl_debug("\tMU PPDU With 4x EHT-LTF 0.8 us GI: 0x%1x",
+		       eht_cap->eht_mu_ppdu_4x_ltf_0_8_us_gi);
+	wma_nofl_debug("\tMax Nc: 0x%4x", eht_cap->max_nc);
+	wma_nofl_debug("\tNon-Triggered CQI Feedback: 0x%1x",
+		       eht_cap->non_trig_cqi_feedback);
+	wma_nofl_debug("\tTx 1024-QAM 4096-QAM < 242-tone RU: 0x%1x",
+		       eht_cap->tx_1024_4096_qam_lt_242_tone_ru);
+	wma_nofl_debug("\tRx 1024-QAM 4096-QAM < 242-tone RU: 0x%1x",
+		       eht_cap->rx_1024_4096_qam_lt_242_tone_ru);
+	wma_nofl_debug("\tPPE Thresholds Present: 0x%1x",
+		       eht_cap->ppet_present);
+	wma_nofl_debug("\tCommon Nominal Packet Padding: 0x%2x",
+		       eht_cap->common_nominal_pkt_padding);
+	wma_nofl_debug("\tMaximum Number Of Supported EHT-LTFs: 0x%5x",
+		       eht_cap->max_num_eht_ltf);
+	wma_nofl_debug("\tSupport of MCS 15: 0x%4x", eht_cap->mcs_15);
+	wma_nofl_debug("\tSupport Of EHT DUP In 6 GHz: 0x%1x",
+		       eht_cap->eht_dup_6ghz);
+	wma_nofl_debug("\t20 MHz STA RX NDP With Wider BW: 0x%1x",
+		       eht_cap->op_sta_rx_ndp_wider_bw_20mhz);
+	wma_nofl_debug("\tNon-OFDMA UL MU-MIMO BW <= 80 MHz: 0x%1x",
+		       eht_cap->non_ofdma_ul_mu_mimo_le_80mhz);
+	wma_nofl_debug("\tNon-OFDMA UL MU-MIMO BW = 160 MHz: 0x%1x",
+		       eht_cap->non_ofdma_ul_mu_mimo_160mhz);
+	wma_nofl_debug("\tNon-OFDMA UL MU-MIMO BW = 320 MHz: 0x%1x",
+		       eht_cap->non_ofdma_ul_mu_mimo_320mhz);
+	wma_nofl_debug("\tMU Beamformer BW <= 80 MHz: 0x%1x",
+		       eht_cap->mu_bformer_le_80mhz);
+	wma_nofl_debug("\tMU Beamformer BW = 160 MHz: 0x%1x",
+		       eht_cap->mu_bformer_160mhz);
+	wma_nofl_debug("\tMU Beamformer BW = 320 MHz: 0x%1x",
+		       eht_cap->mu_bformer_320mhz);
 }
 
 void wma_print_eht_phy_cap(uint32_t *phy_cap)
 {
 	wma_debug("EHT PHY Capabilities:");
+
+	wma_nofl_debug("\t320 MHz In 6 GHz: 0x%0x1x",
+		       WMI_EHTCAP_PHY_320MHZIN6GHZ_GET(phy_cap));
+	wma_nofl_debug("\t242-tone RU In BW Wider Than 20 MHz: 0x%1x",
+		       WMI_EHTCAP_PHY_242TONERUBWLT20MHZ_GET(phy_cap));
+	wma_nofl_debug("\tNDP With 4x EHT-LTF And 3.2 us GI: 0x%1x",
+		       WMI_EHTCAP_PHY_NDP4XEHTLTFAND320NSGI_GET(phy_cap));
+	wma_nofl_debug("\tPartial Bandwidth UL MU-MIMO: 0x%1x",
+		       WMI_EHTCAP_PHY_PARTIALBWULMU_GET(phy_cap));
+	wma_nofl_debug("\tSU Beamformer: 0x%1x",
+		       WMI_EHTCAP_PHY_SUBFMR_GET(phy_cap));
+	wma_nofl_debug("\tSU Beamformee: 0x%1x",
+		       WMI_EHTCAP_PHY_SUBFME_GET(phy_cap));
+	wma_nofl_debug("\tBeamformee SS <= 80 MHz: 0x%3x",
+		       WMI_EHTCAP_PHY_BFMESSLT80MHZ_GET(phy_cap));
+	wma_nofl_debug("\tBeamformee SS = 160 MHz: 0x%3x",
+		       WMI_EHTCAP_PHY_BFMESS160MHZ_GET(phy_cap));
+	wma_nofl_debug("\tBeamformee SS = 320 MHz: 0x%3x",
+		       WMI_EHTCAP_PHY_BFMESS320MHZ_GET(phy_cap));
+	wma_nofl_debug("\tNumber Of Sounding Dimensions <= 80 MHz: 0x%3x",
+		       WMI_EHTCAP_PHY_NUMSOUNDLT80MHZ_GET(phy_cap));
+	wma_nofl_debug("\tNumber Of Sounding Dimensions = 160 MHz: 0x%3x",
+		       WMI_EHTCAP_PHY_NUMSOUND160MHZ_GET(phy_cap));
+	wma_nofl_debug("\tNumber Of Sounding Dimensions = 320 MHz: 0x%3x",
+		       WMI_EHTCAP_PHY_NUMSOUND320MHZ_GET(phy_cap));
+	wma_nofl_debug("\tNg = 16 SU Feedback: 0x%1x",
+		       WMI_EHTCAP_PHY_NG16SUFB_GET(phy_cap));
+	wma_nofl_debug("\tNg = 16 MU Feedback: 0x%1x",
+		       WMI_EHTCAP_PHY_NG16MUFB_GET(phy_cap));
+	wma_nofl_debug("\tCodebook Size 4 2 SU Feedback: 0x%1x",
+		       WMI_EHTCAP_PHY_CODBK42SUFB_GET(phy_cap));
+	wma_nofl_debug("\tCodebook Size 7 5 MU Feedback: 0x%1x",
+		       WMI_EHTCAP_PHY_CODBK75MUFB_GET(phy_cap));
+	wma_nofl_debug("\tTriggered SU Beamforming Feedback: 0x%1x",
+		       WMI_EHTCAP_PHY_TRIGSUBFFB_GET(phy_cap));
+	wma_nofl_debug("\tTriggered MU Beamforming Partial BW Feedback: 0x%1x",
+		       WMI_EHTCAP_PHY_TRIGMUBFPARTBWFB_GET(phy_cap));
+	wma_nofl_debug("\tTriggered CQI Feedback: 0x%1x",
+		       WMI_EHTCAP_PHY_TRIGCQIFB_GET(phy_cap));
+	wma_nofl_debug("\tPartial Bandwidth DL MU-MIMO: 0x%1x",
+		       WMI_EHTCAP_PHY_TRIGMUBFPARTBWFB_GET(phy_cap));
+	wma_nofl_debug("\tPSR-Based SR: 0x%1x",
+		       WMI_EHTCAP_PHY_PSRSR_GET(phy_cap));
+	wma_nofl_debug("\tPower Boost Factor: 0x%1x",
+		       WMI_EHTCAP_PHY_PWRBSTFACTOR_GET(phy_cap));
+	wma_nofl_debug("\tMU PPDU With 4x EHT-LTF 0.8 us GI: 0x%1x",
+		       WMI_EHTCAP_PHY_4XEHTLTFAND800NSGI_GET(phy_cap));
+	wma_nofl_debug("\tMax Nc: 0x%4x", WMI_EHTCAP_PHY_MAXNC_GET(phy_cap));
+	wma_nofl_debug("\tNon-Triggered CQI Feedback: 0x%1x",
+		       WMI_EHTCAP_PHY_NONTRIGCQIFB_GET(phy_cap));
+	wma_nofl_debug("\tTx 1024-QAM 4096-QAM < 242-tone RU: 0x%1x",
+		       WMI_EHTCAP_PHY_TX1024AND4096QAMLS242TONERU_GET(phy_cap));
+	wma_nofl_debug("\tRx 1024-QAM 4096-QAM < 242-tone RU: 0x%1x",
+		       WMI_EHTCAP_PHY_RX1024AND4096QAMLS242TONERU_GET(phy_cap));
+	wma_nofl_debug("\tPPE Thresholds Present: 0x%1x",
+		       WMI_EHTCAP_PHY_PPETHRESPRESENT_GET(phy_cap));
+	wma_nofl_debug("\tCommon Nominal Packet Padding: 0x%2x",
+		       WMI_EHTCAP_PHY_CMNNOMPKTPAD_GET(phy_cap));
+	wma_nofl_debug("\tMaximum Number Of Supported EHT-LTFs: 0x%5x",
+		       WMI_EHTCAP_PHY_MAXNUMEHTLTF_GET(phy_cap));
+	wma_nofl_debug("\tSupport of MCS 15: 0x%4x",
+		       WMI_EHTCAP_PHY_SUPMCS15_GET(phy_cap));
+	wma_nofl_debug("\tSupport Of EHT DUP In 6 GHz: 0x%1x",
+		       WMI_EHTCAP_PHY_EHTDUPIN6GHZ_GET(phy_cap));
+	wma_nofl_debug("\t20 MHz STA RX NDP With Wider BW: 0x%1x",
+		       WMI_EHTCAP_PHY_20MHZOPSTARXNDPWIDERBW_GET(phy_cap));
+	wma_nofl_debug("\tNon-OFDMA UL MU-MIMO BW <= 80 MHz: 0x%1x",
+		       WMI_EHTCAP_PHY_NONOFDMAULMUMIMOLT80MHZ_GET(phy_cap));
+	wma_nofl_debug("\tNon-OFDMA UL MU-MIMO BW = 160 MHz: 0x%1x",
+		       WMI_EHTCAP_PHY_NONOFDMAULMUMIMO160MHZ_GET(phy_cap));
+	wma_nofl_debug("\tNon-OFDMA UL MU-MIMO BW = 320 MHz: 0x%1x",
+		       WMI_EHTCAP_PHY_NONOFDMAULMUMIMO320MHZ_GET(phy_cap));
+	wma_nofl_debug("\tMU Beamformer BW <= 80 MHz: 0x%1x",
+		       WMI_EHTCAP_PHY_MUBFMRLT80MHZ_GET(phy_cap));
+	wma_nofl_debug("\tMU Beamformer BW = 160 MHz: 0x%1x",
+		       WMI_EHTCAP_PHY_MUBFMR160MHZ_GET(phy_cap));
+	wma_nofl_debug("\tMU Beamformer BW = 320 MHz: 0x%1x",
+		       WMI_EHTCAP_PHY_MUBFMR320MHZ_GET(phy_cap));
 }
 
-void wma_print_eht_mac_cap_w1(uint32_t mac_cap)
+void wma_print_eht_mac_cap(uint32_t *mac_cap)
 {
 	wma_debug("EHT MAC Capabilities:");
-}
 
-void wma_print_eht_mac_cap_w2(uint32_t mac_cap)
-{
+	wma_nofl_debug("\tNSEP Priority Access: 0x%01x",
+		       WMI_EHTCAP_MAC_NSEPPRIACCESS_GET(mac_cap));
+	wma_nofl_debug("\tOM Control: 0x%1x",
+		       WMI_EHTCAP_MAC_EHTOMCTRL_GET(mac_cap));
+	wma_nofl_debug("\tTriggered TXOP Sharing: 0x%1x",
+		       WMI_EHTCAP_MAC_TRIGTXOP_GET(mac_cap));
 }
 
 void wma_print_eht_op(tDot11fIEeht_op *eht_ops)
@@ -220,17 +383,75 @@ void wma_populate_peer_eht_cap(struct peer_assoc_params *peer,
 {
 	tDot11fIEeht_cap *eht_cap = &params->eht_config;
 	uint32_t *phy_cap = peer->peer_eht_cap_phyinfo;
-	uint32_t mac_cap[PSOC_HOST_MAX_MAC_SIZE] = {0};
+	uint32_t *mac_cap = peer->peer_eht_cap_macinfo;
 
 	if (params->eht_capable)
 		peer->eht_flag = 1;
 	else
 		return;
 
-	qdf_mem_copy(peer->peer_eht_cap_macinfo, peer->peer_he_cap_macinfo,
-		     sizeof(mac_cap));
-	qdf_mem_copy(peer->peer_he_cap_phyinfo, peer->peer_he_cap_phyinfo,
-		     sizeof(peer->peer_he_cap_phyinfo));
+	/* EHT MAC Capabilities */
+	WMI_EHTCAP_MAC_NSEPPRIACCESS_SET(mac_cap, eht_cap->nsep_pri_access);
+	WMI_EHTCAP_MAC_EHTOMCTRL_SET(mac_cap, eht_cap->eht_om_ctl);
+	WMI_EHTCAP_MAC_TRIGTXOP_SET(mac_cap, eht_cap->triggered_txop_sharing);
+
+	/* EHT PHY Capabilities */
+	WMI_EHTCAP_PHY_320MHZIN6GHZ_SET(phy_cap, eht_cap->support_320mhz_6ghz);
+	WMI_EHTCAP_PHY_242TONERUBWLT20MHZ_SET(phy_cap,
+					      eht_cap->ru_242tone_wt_20mhz);
+	WMI_EHTCAP_PHY_NDP4XEHTLTFAND320NSGI_SET(
+			phy_cap, eht_cap->ndp_4x_eht_ltf_3dot2_us_gi);
+	WMI_EHTCAP_PHY_PARTIALBWULMU_SET(phy_cap, eht_cap->partial_bw_mu_mimo);
+	WMI_EHTCAP_PHY_SUBFMR_SET(phy_cap, eht_cap->su_beamformer);
+	WMI_EHTCAP_PHY_SUBFME_SET(phy_cap, eht_cap->su_beamformee);
+	WMI_EHTCAP_PHY_BFMESSLT80MHZ_SET(phy_cap, eht_cap->bfee_ss_le_80mhz);
+	WMI_EHTCAP_PHY_BFMESS160MHZ_SET(phy_cap, eht_cap->bfee_ss_160mhz);
+	WMI_EHTCAP_PHY_BFMESS320MHZ_SET(phy_cap, eht_cap->bfee_ss_320mhz);
+	WMI_EHTCAP_PHY_NUMSOUNDLT80MHZ_SET(
+			phy_cap, eht_cap->num_sounding_dim_le_80mhz);
+	WMI_EHTCAP_PHY_NUMSOUND160MHZ_SET(phy_cap,
+					  eht_cap->num_sounding_dim_160mhz);
+	WMI_EHTCAP_PHY_NUMSOUND320MHZ_SET(phy_cap,
+					  eht_cap->num_sounding_dim_320mhz);
+	WMI_EHTCAP_PHY_NG16SUFB_SET(phy_cap, eht_cap->ng_16_su_feedback);
+	WMI_EHTCAP_PHY_NG16MUFB_SET(phy_cap, eht_cap->ng_16_mu_feedback);
+	WMI_EHTCAP_PHY_CODBK42SUFB_SET(phy_cap, eht_cap->cb_sz_4_2_su_feedback);
+	WMI_EHTCAP_PHY_CODBK75MUFB_SET(phy_cap, eht_cap->cb_sz_7_5_su_feedback);
+	WMI_EHTCAP_PHY_TRIGSUBFFB_SET(phy_cap,
+				      eht_cap->trig_su_bforming_feedback);
+	WMI_EHTCAP_PHY_TRIGMUBFPARTBWFB_SET(
+			phy_cap, eht_cap->trig_mu_bforming_partial_bw_feedback);
+	WMI_EHTCAP_PHY_TRIGCQIFB_SET(phy_cap, eht_cap->triggered_cqi_feedback);
+	WMI_EHTCAP_PHY_PARTBWDLMUMIMO_SET(phy_cap,
+					  eht_cap->partial_bw_dl_mu_mimo);
+	WMI_EHTCAP_PHY_PSRSR_SET(phy_cap, eht_cap->psr_based_sr);
+	WMI_EHTCAP_PHY_PWRBSTFACTOR_SET(phy_cap, eht_cap->power_boost_factor);
+	WMI_EHTCAP_PHY_4XEHTLTFAND800NSGI_SET(
+			phy_cap, eht_cap->eht_mu_ppdu_4x_ltf_0_8_us_gi);
+	WMI_EHTCAP_PHY_MAXNC_SET(phy_cap, eht_cap->max_nc);
+	WMI_EHTCAP_PHY_NONTRIGCQIFB_SET(phy_cap,
+					eht_cap->non_trig_cqi_feedback);
+	WMI_EHTCAP_PHY_TX1024AND4096QAMLS242TONERU_SET(
+			phy_cap, eht_cap->tx_1024_4096_qam_lt_242_tone_ru);
+	WMI_EHTCAP_PHY_RX1024AND4096QAMLS242TONERU_SET(
+			phy_cap, eht_cap->rx_1024_4096_qam_lt_242_tone_ru);
+	WMI_EHTCAP_PHY_PPETHRESPRESENT_SET(phy_cap, eht_cap->ppet_present);
+	WMI_EHTCAP_PHY_CMNNOMPKTPAD_SET(phy_cap,
+					eht_cap->common_nominal_pkt_padding);
+	WMI_EHTCAP_PHY_MAXNUMEHTLTF_SET(phy_cap, eht_cap->max_num_eht_ltf);
+	WMI_EHTCAP_PHY_SUPMCS15_SET(phy_cap, eht_cap->mcs_15);
+	WMI_EHTCAP_PHY_EHTDUPIN6GHZ_SET(phy_cap, eht_cap->eht_dup_6ghz);
+	WMI_EHTCAP_PHY_20MHZOPSTARXNDPWIDERBW_SET(
+			phy_cap, eht_cap->op_sta_rx_ndp_wider_bw_20mhz);
+	WMI_EHTCAP_PHY_NONOFDMAULMUMIMOLT80MHZ_SET(
+			phy_cap, eht_cap->non_ofdma_ul_mu_mimo_le_80mhz);
+	WMI_EHTCAP_PHY_NONOFDMAULMUMIMO160MHZ_SET(
+			phy_cap, eht_cap->non_ofdma_ul_mu_mimo_160mhz);
+	WMI_EHTCAP_PHY_NONOFDMAULMUMIMO320MHZ_SET(
+			phy_cap, eht_cap->non_ofdma_ul_mu_mimo_320mhz);
+	WMI_EHTCAP_PHY_MUBFMRLT80MHZ_SET(phy_cap, eht_cap->mu_bformer_le_80mhz);
+	WMI_EHTCAP_PHY_MUBFMR160MHZ_SET(phy_cap, eht_cap->mu_bformer_160mhz);
+	WMI_EHTCAP_PHY_MUBFMR320MHZ_SET(phy_cap, eht_cap->mu_bformer_320mhz);
 
 	qdf_mem_copy(peer->peer_eht_rx_mcs_set, peer->peer_he_rx_mcs_set,
 		     sizeof(peer->peer_he_rx_mcs_set));
@@ -242,8 +463,7 @@ void wma_populate_peer_eht_cap(struct peer_assoc_params *peer,
 	wma_print_eht_cap(eht_cap);
 	wma_debug("Peer EHT Capabilities:");
 	wma_print_eht_phy_cap(phy_cap);
-	wma_print_eht_mac_cap_w1(mac_cap[0]);
-	wma_print_eht_mac_cap_w2(mac_cap[1]);
+	wma_print_eht_mac_cap(mac_cap);
 }
 
 void wma_vdev_set_eht_bss_params(tp_wma_handle wma, uint8_t vdev_id,

core/wma/src/wma_eht.h

@@ -71,24 +71,14 @@ void wma_print_eht_cap(tDot11fIEeht_cap *eht_cap);
 void wma_print_eht_phy_cap(uint32_t *phy_cap);
 
 /**
- * wma_print_eht_mac_cap_w1() - Print EHT MAC Capability
- * @mac_cap: MAC Capability
+ * wma_print_eht_mac_cap() - Print EHT MAC Capability
+ * @mac_cap: pointer to MAC Capability
  *
  * This function prints EHT MAC Capability received from FW.
  *
  * Return: none
  */
-void wma_print_eht_mac_cap_w1(uint32_t mac_cap);
-
-/**
- * wma_print_eht_mac_cap_w2() - Print EHT MAC Capability
- * @mac_cap: MAC Capability
- *
- * This function prints EHT MAC Capability received from FW.
- *
- * Return: none
- */
-void wma_print_eht_mac_cap_w2(uint32_t mac_cap);
+void wma_print_eht_mac_cap(uint32_t *mac_cap);
 
 /**
  * wma_print_eht_op() - Print EHT Operation
@@ -187,12 +177,7 @@ void wma_print_eht_phy_cap(uint32_t *phy_cap)
 }
 
 static inline
-void wma_print_eht_mac_cap_w1(uint32_t mac_cap)
-{
-}
-
-static inline
-void wma_print_eht_mac_cap_w2(uint32_t mac_cap)
+void wma_print_eht_mac_cap(uint32_t *mac_cap)
 {
 }