msm: camera: csiphy: Enable dynamic clock voting level

CSIPHY hardware is having multiple clock voting level per datarate.
Enabling to calculate the correct function to calculate and apply
to clock vote level per datarate provided by sensor.

CRs-Fixed: 2968149
Change-Id: Ifb1be2d3bce7fff5ff34ea5d62960d40d55c2071
Signed-off-by: Jigarkumar Zala <[email protected]>

drivers/cam_sensor_module/cam_csiphy/cam_csiphy_soc.c

@@ -472,7 +472,7 @@ int32_t cam_csiphy_parse_dt_info(struct platform_device *pdev,
 			csiphy_common_reg_2_1_0;
 		csiphy_dev->ctrl_reg->csiphy_reset_reg = csiphy_reset_reg_2_1_0;
 		csiphy_dev->ctrl_reg->csiphy_reg = csiphy_v2_1_0;
-		csiphy_dev->ctrl_reg->getclockvoting = get_clk_vote_default;
+		csiphy_dev->ctrl_reg->getclockvoting = get_clk_voting_dynamic;
 		csiphy_dev->hw_version = CSIPHY_VERSION_V210;
 		csiphy_dev->is_divisor_32_comp = true;
 		csiphy_dev->clk_lane = 0;