disp: msm: dsi: Don't clear status interrupts while error interrupts toggle

To toggle error interrupts, we currently read the DSI_INT_CTRL register,
toggle the DSI_ERROR_MASK bit and write back to the register. While doing
so we are also writing back 1 to any status bits set by HW, thus clearing
the status interrupts. Clearing the status bits should always be done as
part of interrupt handling, which otherwise can lead to command transfer
failures.

Avoid clearing status interrupts while error interrupts are toggled.

Change-Id: Iaae10c279f2341269ed49074448167e68ab7e13c
Signed-off-by: Srihitha Tangudu <[email protected]>

msm/dsi/dsi_ctrl_hw_cmn.c

@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
  * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <linux/delay.h>
@@ -1439,6 +1440,9 @@ void dsi_ctrl_hw_cmn_enable_error_interrupts(struct dsi_ctrl_hw *ctrl,
 	else
 		int_ctrl &= ~BIT(25);
 
+	/* Do not clear interrupt status */
+	int_ctrl &= 0xAAEEAAFE;
+
 	if (errors & DSI_RDBK_SINGLE_ECC_ERR)
 		int_mask0 &= ~BIT(0);
 	if (errors & DSI_RDBK_MULTI_ECC_ERR)