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disp: msm: fix dsc parameters related to 10 bpc 10 bpp

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Fix few DSC parameters related to 10 bits-per-component
10 bits-per-pixel configuration according to HW programming
guide.

Change-Id: I3ceb1eb9b1247440ef68800e9b62e9ffb7ec5b57
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
This commit is contained in:
Veera Sundaram Sankaran
2019-05-01 16:13:31 -07:00
parent 4be499df4b
commit 476f37c2bb
2 changed files with 22 additions and 20 deletions
Download Patch File Download Diff File Expand all files Collapse all files

33
msm/dsi/dsi_panel.c
View File

@@ -37,6 +37,7 @@ enum dsi_dsc_ratio_type {
DSC_8BPC_8BPP, DSC_8BPC_8BPP,
DSC_10BPC_8BPP, DSC_10BPC_8BPP,
DSC_12BPC_8BPP, DSC_12BPC_8BPP,
DSC_10BPC_10BPP,
DSC_RATIO_TYPE_MAX DSC_RATIO_TYPE_MAX
}; };
@@ -51,6 +52,7 @@ static char dsi_dsc_rc_range_min_qp_1_1[][15] = {
{0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 7, 12}, {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 7, 12},
{0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 17}, {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 17},
{0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 15, 21}, {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 15, 21},
{0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
}; };
/* /*
@@ -61,6 +63,7 @@ static char dsi_dsc_rc_range_min_qp_1_1_scr1[][15] = {
{0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 9, 12}, {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 9, 12},
{0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 13, 16}, {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 13, 16},
{0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 17, 20}, {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 17, 20},
{0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
}; };
/* /*
@@ -71,6 +74,7 @@ static char dsi_dsc_rc_range_max_qp_1_1[][15] = {
{4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 11, 12, 13, 13, 15}, {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 11, 12, 13, 13, 15},
{4, 8, 9, 10, 11, 11, 11, 12, 13, 14, 15, 16, 17, 17, 19}, {4, 8, 9, 10, 11, 11, 11, 12, 13, 14, 15, 16, 17, 17, 19},
{12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 19, 20, 21, 21, 23}, {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 19, 20, 21, 21, 23},
{7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
}; };
/* /*
@@ -81,6 +85,7 @@ static char dsi_dsc_rc_range_max_qp_1_1_scr1[][15] = {
{4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 10, 11, 11, 12, 13}, {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 10, 11, 11, 12, 13},
{8, 8, 9, 10, 11, 11, 11, 12, 13, 14, 14, 15, 15, 16, 17}, {8, 8, 9, 10, 11, 11, 11, 12, 13, 14, 14, 15, 15, 16, 17},
{12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 18, 19, 19, 20, 23}, {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 18, 19, 19, 20, 23},
{7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
}; };
/* /*
@@ -2149,10 +2154,12 @@ int dsi_dsc_populate_static_param(struct msm_display_dsc_info *dsc)
bpp = dsc->bpp; bpp = dsc->bpp;
bpc = dsc->bpc; bpc = dsc->bpc;
if (bpc == 12) if ((bpc == 12) && (bpp == 8))
ratio_index = DSC_12BPC_8BPP; ratio_index = DSC_12BPC_8BPP;
else if (bpc == 10) else if ((bpc == 10) && (bpp == 8))
ratio_index = DSC_10BPC_8BPP; ratio_index = DSC_10BPC_8BPP;
else if ((bpc == 10) && (bpp == 10))
ratio_index = DSC_10BPC_10BPP;
else else
ratio_index = DSC_8BPC_8BPP; ratio_index = DSC_8BPC_8BPP;
@@ -2167,15 +2174,16 @@ int dsi_dsc_populate_static_param(struct msm_display_dsc_info *dsc)
} }
dsc->range_bpg_offset = dsi_dsc_rc_range_bpg_offset; dsc->range_bpg_offset = dsi_dsc_rc_range_bpg_offset;
if (bpp <= 10) if (bpp == 8) {
dsc->initial_offset = 6144; dsc->initial_offset = 6144;
else dsc->initial_xmit_delay = 512;
dsc->initial_offset = 2048; /* bpp = 12 */ } else if (bpp == 10) {
dsc->initial_offset = 5632;
if (bpc == 12) dsc->initial_xmit_delay = 410;
mux_words_size = 64; } else {
else dsc->initial_offset = 2048;
mux_words_size = 48; /* bpc == 8/10 */ dsc->initial_xmit_delay = 341;
}
dsc->line_buf_depth = bpc + 1; dsc->line_buf_depth = bpc + 1;
@@ -2185,18 +2193,21 @@ int dsi_dsc_populate_static_param(struct msm_display_dsc_info *dsc)
dsc->max_qp_flatness = 12; dsc->max_qp_flatness = 12;
dsc->quant_incr_limit0 = 11; dsc->quant_incr_limit0 = 11;
dsc->quant_incr_limit1 = 11; dsc->quant_incr_limit1 = 11;
mux_words_size = 48;
} else if (bpc == 10) { /* 10bpc */ } else if (bpc == 10) { /* 10bpc */
dsc->input_10_bits = 1; dsc->input_10_bits = 1;
dsc->min_qp_flatness = 7; dsc->min_qp_flatness = 7;
dsc->max_qp_flatness = 16; dsc->max_qp_flatness = 16;
dsc->quant_incr_limit0 = 15; dsc->quant_incr_limit0 = 15;
dsc->quant_incr_limit1 = 15; dsc->quant_incr_limit1 = 15;
mux_words_size = 48;
} else { /* 12 bpc */ } else { /* 12 bpc */
dsc->input_10_bits = 0; dsc->input_10_bits = 0;
dsc->min_qp_flatness = 11; dsc->min_qp_flatness = 11;
dsc->max_qp_flatness = 20; dsc->max_qp_flatness = 20;
dsc->quant_incr_limit0 = 19; dsc->quant_incr_limit0 = 19;
dsc->quant_incr_limit1 = 19; dsc->quant_incr_limit1 = 19;
mux_words_size = 64;
} }
mod_offset = dsc->slice_width % 3; mod_offset = dsc->slice_width % 3;
@@ -2216,8 +2227,6 @@ int dsi_dsc_populate_static_param(struct msm_display_dsc_info *dsc)
dsc->det_thresh_flatness = 2 << (bpc - 8); dsc->det_thresh_flatness = 2 << (bpc - 8);
dsc->initial_xmit_delay = dsc->rc_model_size / (2 * bpp);
groups_per_line = DIV_ROUND_UP(dsc->slice_width, 3); groups_per_line = DIV_ROUND_UP(dsc->slice_width, 3);
dsc->chunk_size = dsc->slice_width * bpp / 8; dsc->chunk_size = dsc->slice_width * bpp / 8;

9
msm/sde/sde_hw_dsc.c
View File

@@ -47,7 +47,6 @@ static void sde_hw_dsc_config(struct sde_hw_dsc *hw_dsc,
bool ich_reset_override) bool ich_reset_override)
{ {
u32 data; u32 data;
int bpp, lsb;
u32 initial_lines = dsc->initial_lines; u32 initial_lines = dsc->initial_lines;
struct sde_hw_blk_reg_map *dsc_c = &hw_dsc->hw; struct sde_hw_blk_reg_map *dsc_c = &hw_dsc->hw;
@@ -59,13 +58,7 @@ static void sde_hw_dsc_config(struct sde_hw_dsc *hw_dsc,
data |= (initial_lines << 20); data |= (initial_lines << 20);
data |= (dsc->slice_last_group_size << 18); data |= (dsc->slice_last_group_size << 18);
/* bpp is 6.4 format, 4 LSBs bits are for fractional part */ data |= (dsc->bpp << 12);
lsb = dsc->bpp % 4;
bpp = dsc->bpp / 4;
bpp *= 4; /* either 8 or 12 */
bpp <<= 4;
bpp |= lsb;
data |= (bpp << 8);
data |= (dsc->block_pred_enable << 7); data |= (dsc->block_pred_enable << 7);
data |= (dsc->line_buf_depth << 3); data |= (dsc->line_buf_depth << 3);
data |= (dsc->enable_422 << 2); data |= (dsc->enable_422 << 2);