disp: msm: sde: handle vsync wait status check during timeout
When VSYNC interrupts are delayed due to irq latencies, there is a possibility that the timeout handler checking the irq status and the irq handler clearing the status bit happening at the same time on different CPU cores. This is reported as an error, though there is not actual issue. Handle this case, by adding an additional ctl-flush register check in the vsync timeout handler. As part of the change add error/eventlogs in commit-done wait failures. Change-Id: Ie7e30dc4ef1e50651cee9015cd3f2caeacf47e5f Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
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@@ -481,12 +481,9 @@ int sde_encoder_helper_wait_for_irq(struct sde_encoder_phys *phys_enc,
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unsigned long flags;
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SDE_EVT32(DRMID(phys_enc->parent), intr_idx,
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irq->hw_idx, irq->irq_idx,
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phys_enc->hw_pp->idx - PINGPONG_0,
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atomic_read(wait_info->atomic_cnt));
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SDE_DEBUG_PHYS(phys_enc,
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"done but irq %d not triggered\n",
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irq->irq_idx);
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irq->hw_idx, irq->irq_idx, phys_enc->hw_pp->idx - PINGPONG_0,
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atomic_read(wait_info->atomic_cnt), SDE_EVTLOG_FUNC_CASE1);
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SDE_DEBUG_PHYS(phys_enc, "done but irq %d not triggered\n", irq->irq_idx);
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local_irq_save(flags);
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irq->cb.func(phys_enc, irq->irq_idx);
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local_irq_restore(flags);
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@@ -503,7 +500,7 @@ int sde_encoder_helper_wait_for_irq(struct sde_encoder_phys *phys_enc,
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ret = 0;
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SDE_EVT32(DRMID(phys_enc->parent), intr_idx, irq->hw_idx,
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irq->irq_idx, phys_enc->hw_pp->idx - PINGPONG_0,
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atomic_read(wait_info->atomic_cnt));
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atomic_read(wait_info->atomic_cnt), SDE_EVTLOG_FUNC_CASE2);
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}
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SDE_EVT32_VERBOSE(DRMID(phys_enc->parent), intr_idx, irq->hw_idx,
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@@ -5573,8 +5570,13 @@ int sde_encoder_wait_for_event(struct drm_encoder *drm_enc,
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SDE_ATRACE_BEGIN(atrace_buf);
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ret = fn_wait(phys);
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SDE_ATRACE_END(atrace_buf);
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if (ret)
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if (ret) {
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SDE_ERROR_ENC(sde_enc, "intf_type:%d, event:%d i:%d, failed:%d\n",
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sde_enc->disp_info.intf_type, event, i, ret);
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SDE_EVT32(DRMID(drm_enc), sde_enc->disp_info.intf_type, event,
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i, ret, SDE_EVTLOG_ERROR);
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return ret;
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}
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}
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}
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