qcacmn: Parse service ready ext event for WIFI_POS DMA rings cap
Parse service ready extension event to get DMA ring capability requested by firmware to enable CIR/CFR capture. This cap is then saved in WIFI_POS psoc private object. Change-Id: I6f6958250af06ac69b627d2f06e120955d625c62 CRs-Fixed: 2040688
This commit is contained in:
@@ -93,7 +93,6 @@ static inline struct wlan_lmac_if_wifi_pos_tx_ops *target_if_wifi_pos_get_txops(
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return NULL;
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}
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static inline struct wlan_lmac_if_wifi_pos_rx_ops *target_if_wifi_pos_get_rxops(
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struct wlan_objmgr_psoc *psoc)
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{
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@@ -111,4 +110,27 @@ static inline void target_if_wifi_pos_register_rx_ops(
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}
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#endif
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#if defined(WLAN_FEATURE_CIF_CFR) && defined(WIFI_POS_CONVERGED)
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/**
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* target_if_wifi_pos_init_cir_cfr_rings: set DMA ring cap in psoc private
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* object
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* @psoc: pointer to psoc object
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* @hal_soc: pointer to hal soc
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* @num_mac: number of mac
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* @buf: buffer containing DMA ring cap
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*
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* Return: status of operation
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*/
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QDF_STATUS target_if_wifi_pos_init_cir_cfr_rings(struct wlan_objmgr_psoc *psoc,
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void *hal_soc, uint8_t num_mac,
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void *buf);
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#else
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static inline QDF_STATUS target_if_wifi_pos_init_cir_cfr_rings(
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struct wlan_objmgr_psoc *psoc, void *hal_soc,
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uint8_t num_mac, void *buf)
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{
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return QDF_STATUS_SUCCESS;
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}
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#endif
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#endif /* _WIFI_POS_TGT_IF_H_ */
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@@ -36,6 +36,9 @@
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#include "target_if_wifi_pos.h"
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#include "../../../../umac/wifi_pos/src/wifi_pos_main_i.h"
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#include "target_if.h"
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#ifdef WLAN_FEATURE_CIF_CFR
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#include "hal_api.h"
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#endif
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/**
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* wifi_pos_oem_rsp_ev_handler: handler registered with WMI_OEM_RESPONSE_EVENTID
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@@ -271,3 +274,56 @@ QDF_STATUS target_if_wifi_pos_deregister_events(struct wlan_objmgr_psoc *psoc)
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return QDF_STATUS_SUCCESS;
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}
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#ifdef WLAN_FEATURE_CIF_CFR
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static QDF_STATUS target_if_wifi_pos_init_srngs(struct wlan_objmgr_psoc *psoc,
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void *hal_soc, struct wifi_pos_psoc_priv_obj *priv_obj)
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{
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return QDF_STATUS_SUCCESS;
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}
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static QDF_STATUS target_if_wifi_pos_cfg_fw(struct wlan_objmgr_psoc *psoc,
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struct wifi_pos_psoc_priv_obj *priv_obj)
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{
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return QDF_STATUS_SUCCESS;
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}
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QDF_STATUS target_if_wifi_pos_init_cir_cfr_rings(struct wlan_objmgr_psoc *psoc,
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void *hal_soc, uint8_t num_mac,
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void *buf)
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{
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uint8_t i;
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struct wifi_pos_psoc_priv_obj *priv_obj =
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wifi_pos_get_psoc_priv_obj(psoc);
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WMI_OEM_DMA_RING_CAPABILITIES *dma_cap = buf;
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if (!priv_obj) {
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target_if_err("unable to get wifi_pos psoc obj");
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return QDF_STATUS_E_NULL_VALUE;
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}
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priv_obj->hal_soc = hal_soc;
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priv_obj->num_rings = num_mac;
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priv_obj->dma_cap = qdf_mem_malloc(priv_obj->num_rings *
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sizeof(struct wifi_pos_dma_rings_cap));
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if (!priv_obj->dma_cap) {
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target_if_err("unable to get wifi_pos psoc obj");
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return QDF_STATUS_E_NOMEM;
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}
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for (i = 0; i < num_mac; i++) {
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priv_obj->dma_cap[i].pdev_id = dma_cap[i].pdev_id;
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priv_obj->dma_cap[i].min_num_ptr = dma_cap[i].min_num_ptr;
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priv_obj->dma_cap[i].min_buf_size = dma_cap[i].min_buf_size;
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priv_obj->dma_cap[i].min_buf_align = dma_cap[i].min_buf_align;
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}
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/* initialize DMA rings now */
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target_if_wifi_pos_init_srngs(psoc, hal_soc, priv_obj);
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/* send cfg req cmd to firmware */
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target_if_wifi_pos_cfg_fw(psoc, priv_obj);
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return QDF_STATUS_SUCCESS;
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}
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#endif
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@@ -347,4 +347,26 @@ static inline QDF_STATUS wifi_pos_psoc_disable(struct wlan_objmgr_psoc *psoc)
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}
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#endif
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#if defined(WLAN_FEATURE_CIF_CFR) && defined(WIFI_POS_CONVERGED)
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/**
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* wifi_pos_init_cir_cfr_rings: API to set DMA ring cap in wifi pos psoc private
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* object
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* @psoc: pointer to psoc object
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* @hal_soc: hal soc pointer
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* @num_mac: number of macs
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* @buf: buffer containing dma ring cap
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*
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* Return: status of operation.
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*/
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QDF_STATUS wifi_pos_init_cir_cfr_rings(struct wlan_objmgr_psoc *psoc,
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void *hal_soc, uint8_t num_mac, void *buf);
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#else
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static inline QDF_STATUS wifi_pos_init_cir_cfr_rings(
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struct wlan_objmgr_psoc *psoc,
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void *hal_soc, uint8_t num_mac, void *buf)
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{
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return QDF_STATUS_SUCCESS;
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}
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#endif
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#endif
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@@ -257,3 +257,12 @@ bool wifi_pos_is_app_registered(struct wlan_objmgr_psoc *psoc)
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return is_app_registered;
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}
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#ifdef WLAN_FEATURE_CIF_CFR
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QDF_STATUS wifi_pos_init_cir_cfr_rings(struct wlan_objmgr_psoc *psoc,
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void *hal_soc, uint8_t num_mac, void *buf)
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{
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return target_if_wifi_pos_init_cir_cfr_rings(psoc, hal_soc,
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num_mac, buf);
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}
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#endif
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@@ -182,6 +182,42 @@ struct qdf_packed wifi_pos_oem_get_cap_rsp {
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struct wifi_pos_user_defined_caps user_defined_cap;
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};
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/**
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* struct wifi_pos_dma_rings_cap - capabilities requested by firmware.
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* @pdev_id: pdev_id or mac_id of ring
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* @min_num_ptr: minimum depth of ring required
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* @min_buf_size: minimum size of each buffer
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* @min_buf_align: minimum allignment of buffer memory
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*/
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struct wifi_pos_dma_rings_cap {
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uint32_t pdev_id;
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uint32_t min_num_ptr;
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uint32_t min_buf_size;
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uint32_t min_buf_align;
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};
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/**
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* struct wifi_pos_dma_rings_cfg - DMA ring parameters to be programmed to FW.
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* @pdev_id: pdev_id of ring
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* @base_addr_lo: Base address of ring, bits 31:0
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* @base_addr_hi: Base address of ring, bits 63:32
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* @head_idx_addr_lo: Address of head index register, bits 31:0
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* @head_idx_addr_hi: Address of head index register, bits 63:32
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* @tail_idx_addr_lo: Address of tail index register, bits 31:0
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* @tail_idx_addr_hi: Address of tail index register, bits 63:32
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* @num_ptr: Number of pointers in the ring
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*/
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struct wifi_pos_dma_rings_cfg {
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uint32_t pdev_id;
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uint32_t base_addr_lo;
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uint32_t base_addr_hi;
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uint32_t head_idx_addr_lo;
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uint32_t head_idx_addr_hi;
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uint32_t tail_idx_addr_lo;
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uint32_t tail_idx_addr_hi;
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uint32_t num_ptr;
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};
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/**
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* struct wifi_pos_psoc_priv_obj - psoc obj data for wifi_pos
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* @app_pid: pid of app registered to host driver
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@@ -190,7 +226,22 @@ struct qdf_packed wifi_pos_oem_get_cap_rsp {
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* @ftm_rr: configured value of FTM Ranging Request capability
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* @lci_capability: configured value of LCI capability
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* @rsvd: reserved
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* @oem_target_type
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* @oem_target_type: oem target type, populated from HDD
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* @oem_fw_version: firmware version, populated from HDD
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* @driver_version: driver version, populated from HDD
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* @allowed_dwell_time_min: allowed dwell time min, populated from HDD
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* @allowed_dwell_time_max: allowed dwell time max, populated from HDD
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* @current_dwell_time_min: current dwell time min, populated from HDD
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* @current_dwell_time_max: current dwell time max, populated from HDD
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* @num_rings: DMA ring cap requested by firmware
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* @dma_cap: dma cap as read from service ready ext event
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* @dma_cfg: DMA ring cfg to be programmed to firmware
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* where with num_rows = number of rings num_elements in each row = ring depth
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* @wifi_pos_lock: lock to access wifi pos priv object
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* @wifi_pos_req_handler: function pointer to handle TLV or non-TLV
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* @wifi_pos_send_rsp: function pointer to send msg to userspace APP
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*
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* wifi pos request messages
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* <----- fine_time_meas_cap (in bits) ----->
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*+----------+-----+-----+------+------+-------+-------+-----+-----+
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@@ -210,7 +261,6 @@ struct wifi_pos_psoc_priv_obj {
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uint32_t lci_capability:1;
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uint32_t rsvd:30;
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/* following are populated from HDD */
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uint32_t oem_target_type;
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uint32_t oem_fw_version;
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struct wifi_pos_driver_version driver_version;
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@@ -219,8 +269,11 @@ struct wifi_pos_psoc_priv_obj {
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uint16_t current_dwell_time_min;
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uint16_t current_dwell_time_max;
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qdf_spinlock_t wifi_pos_lock;
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uint8_t num_rings;
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struct wifi_pos_dma_rings_cap *dma_cap;
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struct wifi_pos_dma_rings_cfg *dma_cfg;
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qdf_spinlock_t wifi_pos_lock;
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QDF_STATUS (*wifi_pos_req_handler)(struct wlan_objmgr_psoc *psoc,
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struct wifi_pos_req_msg *req);
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void (*wifi_pos_send_rsp)(uint32_t, uint32_t, uint32_t, uint8_t *);
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