Merge upto camera-kernel.lnx.1.0-191021 'quic/camera-kernel.lnx.1.0' into camera-kernel.lnx.4.0

* quic/camera-kernel.lnx.1.0:
  msm: camera: isp: Add log for first SOF in EPCR
  msm: camera: ife: Remove line start addition
  msm: camera: common: Fix compilation issues for 32-bit arch
  msm: camera: ife: Dump ife camnoc debug registers
  msm: camera: csiphy: Enable multi-datarate support for csiphy v1.2
  msm: camera: cpas: Fix TCSR register programming
  msm: camera: isp: Update last applied request ID
  msm: camera: ife: Deinit input mux resources
  msm: camera: reqmgr: Reset the pd tables as part of flush
  msm: camera: ife: Disable early eof strobe
  msm: camera: isp: Set error type to fatal
  msm: camera: isp: Add tasklet index to logs
  msm: camera: isp: Add log in flush
  msm: camera: reqmgr: Logs v4l2 event queue failure
  msm: camera: isp: Correct acquire dump log
  msm: camera: isp: Remove redundant use of spin lock
  msm: camera: req_mgr: Increase device handles in hdl_tbl

Change-Id: I4b60c033f81a767a61c383f2dc3ef1608005b491
Signed-off-by: Abhijit Trivedi <[email protected]>

drivers/cam_cdm/cam_cdm_hw_core.c

@@ -413,7 +413,7 @@ int cam_hw_cdm_submit_bl(struct cam_hw_info *cdm_hw,
 	}
 
 	for (i = 0; i < req->data->cmd_arrary_count ; i++) {
-		uint64_t hw_vaddr_ptr = 0;
+		dma_addr_t hw_vaddr_ptr = 0;
 		size_t len = 0;
 
 		if ((!cdm_cmd->cmd[i].len) &&

drivers/cam_cpas/cam_cpas_hw.c

@@ -44,7 +44,7 @@ int cam_cpas_util_reg_update(struct cam_hw_info *cpas_hw,
 		value = reg_info->value;
 	}
 
-	CAM_DBG(CAM_CPAS, "Base[%d] Offset[0x%8x] Value[0x%8x]",
+	CAM_DBG(CAM_CPAS, "Base[%d] Offset[0x%08x] Value[0x%08x]",
 		reg_base, reg_info->offset, value);
 
 	cam_io_w_mb(value, soc_info->reg_map[reg_base_index].mem_base +
@@ -424,7 +424,7 @@ static int cam_cpas_util_set_camnoc_axi_clk_rate(
 
 	if (soc_private->control_camnoc_axi_clk) {
 		struct cam_hw_soc_info *soc_info = &cpas_hw->soc_info;
-		uint64_t required_camnoc_bw = 0;
+		uint64_t required_camnoc_bw = 0, intermediate_result = 0;
 		int32_t clk_rate = 0;
 
 		for (i = 0; i < CAM_CPAS_MAX_TREE_NODES; i++) {
@@ -440,15 +440,19 @@ static int cam_cpas_util_set_camnoc_axi_clk_rate(
 			}
 		}
 
-		required_camnoc_bw += (required_camnoc_bw *
-			soc_private->camnoc_axi_clk_bw_margin) / 100;
+		intermediate_result = required_camnoc_bw *
+			soc_private->camnoc_axi_clk_bw_margin;
+		do_div(intermediate_result, 100);
+		required_camnoc_bw += intermediate_result;
 
 		if ((required_camnoc_bw > 0) &&
 			(required_camnoc_bw <
 			soc_private->camnoc_axi_min_ib_bw))
 			required_camnoc_bw = soc_private->camnoc_axi_min_ib_bw;
 
-		clk_rate = required_camnoc_bw / soc_private->camnoc_bus_width;
+		intermediate_result = required_camnoc_bw;
+		do_div(intermediate_result, soc_private->camnoc_bus_width);
+		clk_rate = intermediate_result;
 
 		CAM_DBG(CAM_CPAS, "Setting camnoc axi clk rate : %llu %d",
 			required_camnoc_bw, clk_rate);

drivers/cam_cpas/cpas_top/cam_cpastop_hw.c

@@ -7,6 +7,8 @@
 #include <linux/timer.h>
 #include <linux/slab.h>
 
+#include <soc/qcom/scm.h>
+
 #include "cam_cpas_hw_intf.h"
 #include "cam_cpas_hw.h"
 #include "cam_cpastop_hw.h"
@@ -513,6 +515,10 @@ done:
 static int cam_cpastop_poweron(struct cam_hw_info *cpas_hw)
 {
 	int i;
+	struct cam_cpas_hw_errata_wa_list *errata_wa_list =
+		camnoc_info->errata_wa_list;
+	struct cam_cpas_hw_errata_wa *errata_wa =
+		&errata_wa_list->tcsr_camera_hf_sf_ares_glitch;
 
 	cam_cpastop_reset_irq(cpas_hw);
 	for (i = 0; i < camnoc_info->specific_size; i++) {
@@ -534,6 +540,11 @@ static int cam_cpastop_poweron(struct cam_hw_info *cpas_hw)
 		}
 	}
 
+	if (errata_wa->enable) {
+		scm_io_write(errata_wa->data.reg_info.offset,
+			errata_wa->data.reg_info.value);
+	}
+
 	return 0;
 }
 

drivers/cam_cpas/cpas_top/cam_cpastop_hw.h

@@ -208,10 +208,12 @@ struct cam_cpas_hw_errata_wa {
  *
  * @camnoc_flush_slave_pending_trans: Errata workaround info for flushing
  *         camnoc slave pending transactions before turning off CPAS_TOP gdsc
- *
+ * @tcsr_camera_hf_sf_ares_glitch: Errata workaround info from ignoring
+ *         erroneous signals at camera start
  */
 struct cam_cpas_hw_errata_wa_list {
 	struct cam_cpas_hw_errata_wa camnoc_flush_slave_pending_trans;
+	struct cam_cpas_hw_errata_wa tcsr_camera_hf_sf_ares_glitch;
 };
 
 /**

drivers/cam_cpas/cpas_top/cpastop_v175_130.h

@@ -747,6 +747,17 @@ static struct cam_cpas_hw_errata_wa_list cam175_cpas130_errata_wa_list = {
 			.value = 0, /* expected to be 0 */
 		},
 	},
+	/* TZ owned register */
+	.tcsr_camera_hf_sf_ares_glitch = {
+		.enable = true,
+		.data.reg_info = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			/* TCSR_CAMERA_HF_SF_ARES_GLITCH_MASK */
+			.offset = 0x01FCA08C,
+			.value = 0x4, /* set bit[2] to 1 */
+		},
+	},
 };
 
 static struct cam_camnoc_info cam175_cpas130_camnoc_info = {

drivers/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c

@@ -422,6 +422,7 @@ static int32_t cam_icp_ctx_timer(void *priv, void *data)
 		(struct cam_icp_hw_ctx_data *)task_data->data;
 	struct cam_icp_hw_mgr *hw_mgr = &icp_hw_mgr;
 	uint32_t id;
+	uint64_t temp;
 	struct cam_hw_intf *ipe0_dev_intf = NULL;
 	struct cam_hw_intf *ipe1_dev_intf = NULL;
 	struct cam_hw_intf *bps_dev_intf = NULL;
@@ -521,16 +522,17 @@ static int32_t cam_icp_ctx_timer(void *priv, void *data)
 		ctx_data->clk_info.base_clk = 0;
 
 		clk_update.axi_vote.num_paths = 1;
-		clk_update.axi_vote.axi_path[0].camnoc_bw =
-			clk_info->uncompressed_bw / device_share_ratio;
-		clk_update.axi_vote.axi_path[0].mnoc_ab_bw =
-			clk_info->compressed_bw / device_share_ratio;
-		clk_update.axi_vote.axi_path[0].mnoc_ib_bw =
-			clk_info->compressed_bw / device_share_ratio;
-		clk_update.axi_vote.axi_path[0].ddr_ab_bw =
-			clk_info->compressed_bw / device_share_ratio;
-		clk_update.axi_vote.axi_path[0].ddr_ib_bw =
-			clk_info->compressed_bw / device_share_ratio;
+
+		temp = clk_info->uncompressed_bw;
+		do_div(temp, device_share_ratio);
+		clk_update.axi_vote.axi_path[0].camnoc_bw = temp;
+
+		temp = clk_info->compressed_bw;
+		do_div(temp, device_share_ratio);
+		clk_update.axi_vote.axi_path[0].mnoc_ab_bw = temp;
+		clk_update.axi_vote.axi_path[0].mnoc_ib_bw = temp;
+		clk_update.axi_vote.axi_path[0].ddr_ab_bw = temp;
+		clk_update.axi_vote.axi_path[0].ddr_ib_bw = temp;
 	} else {
 		int path_index;
 
@@ -594,16 +596,21 @@ static int32_t cam_icp_ctx_timer(void *priv, void *data)
 
 		if (device_share_ratio > 1) {
 			for (i = 0; i < clk_update.axi_vote.num_paths; i++) {
-				clk_update.axi_vote.axi_path[i].camnoc_bw /=
-					device_share_ratio;
-				clk_update.axi_vote.axi_path[i].mnoc_ab_bw /=
-					device_share_ratio;
-				clk_update.axi_vote.axi_path[i].mnoc_ib_bw /=
-					device_share_ratio;
-				clk_update.axi_vote.axi_path[i].ddr_ab_bw /=
-					device_share_ratio;
-				clk_update.axi_vote.axi_path[i].ddr_ib_bw /=
-					device_share_ratio;
+				do_div(
+				clk_update.axi_vote.axi_path[i].camnoc_bw,
+					device_share_ratio);
+				do_div(
+				clk_update.axi_vote.axi_path[i].mnoc_ab_bw,
+					device_share_ratio);
+				do_div(
+				clk_update.axi_vote.axi_path[i].mnoc_ib_bw,
+					device_share_ratio);
+				do_div(
+				clk_update.axi_vote.axi_path[i].ddr_ab_bw,
+					device_share_ratio);
+				do_div(
+				clk_update.axi_vote.axi_path[i].ddr_ib_bw,
+					device_share_ratio);
 			}
 		}
 	}
@@ -780,7 +787,8 @@ static uint32_t cam_icp_mgr_calc_base_clk(uint32_t frame_cycles,
 	uint64_t base_clk;
 	uint64_t mul = 1000000000;
 
-	base_clk = (frame_cycles * mul) / budget;
+	base_clk = frame_cycles * mul;
+	do_div(base_clk, budget);
 
 	CAM_DBG(CAM_ICP, "budget = %lld fc = %d ib = %lld base_clk = %lld",
 		budget, frame_cycles,
@@ -1408,6 +1416,7 @@ static int cam_icp_update_cpas_vote(struct cam_icp_hw_mgr *hw_mgr,
 	struct cam_icp_hw_ctx_data *ctx_data)
 {
 	uint32_t id;
+	uint64_t temp;
 	int i = 0;
 	struct cam_hw_intf *ipe0_dev_intf = NULL;
 	struct cam_hw_intf *ipe1_dev_intf = NULL;
@@ -1463,16 +1472,17 @@ static int cam_icp_update_cpas_vote(struct cam_icp_hw_mgr *hw_mgr,
 			clk_update.axi_vote.axi_path[0].transac_type =
 				CAM_IPE_DEFAULT_AXI_TRANSAC;
 		}
-		clk_update.axi_vote.axi_path[0].camnoc_bw =
-			clk_info->uncompressed_bw / device_share_ratio;
-		clk_update.axi_vote.axi_path[0].mnoc_ab_bw =
-			clk_info->compressed_bw / device_share_ratio;
-		clk_update.axi_vote.axi_path[0].mnoc_ib_bw =
-			clk_info->compressed_bw / device_share_ratio;
-		clk_update.axi_vote.axi_path[0].ddr_ab_bw =
-			clk_info->compressed_bw / device_share_ratio;
-		clk_update.axi_vote.axi_path[0].ddr_ib_bw =
-			clk_info->compressed_bw / device_share_ratio;
+
+		temp = clk_info->uncompressed_bw;
+		do_div(temp, device_share_ratio);
+		clk_update.axi_vote.axi_path[0].camnoc_bw = temp;
+
+		temp = clk_info->compressed_bw;
+		do_div(temp, device_share_ratio);
+		clk_update.axi_vote.axi_path[0].mnoc_ab_bw = temp;
+		clk_update.axi_vote.axi_path[0].mnoc_ib_bw = temp;
+		clk_update.axi_vote.axi_path[0].ddr_ab_bw = temp;
+		clk_update.axi_vote.axi_path[0].ddr_ib_bw = temp;
 	} else {
 		clk_update.axi_vote.num_paths = clk_info->num_paths;
 		memcpy(&clk_update.axi_vote.axi_path[0],
@@ -1482,16 +1492,21 @@ static int cam_icp_update_cpas_vote(struct cam_icp_hw_mgr *hw_mgr,
 
 		if (device_share_ratio > 1) {
 			for (i = 0; i < clk_update.axi_vote.num_paths; i++) {
-				clk_update.axi_vote.axi_path[i].camnoc_bw /=
-					device_share_ratio;
-				clk_update.axi_vote.axi_path[i].mnoc_ab_bw /=
-					device_share_ratio;
-				clk_update.axi_vote.axi_path[i].mnoc_ib_bw /=
-					device_share_ratio;
-				clk_update.axi_vote.axi_path[i].ddr_ab_bw /=
-					device_share_ratio;
-				clk_update.axi_vote.axi_path[i].ddr_ib_bw /=
-					device_share_ratio;
+				do_div(
+				clk_update.axi_vote.axi_path[i].camnoc_bw,
+					device_share_ratio);
+				do_div(
+				clk_update.axi_vote.axi_path[i].mnoc_ab_bw,
+					device_share_ratio);
+				do_div(
+				clk_update.axi_vote.axi_path[i].mnoc_ib_bw,
+					device_share_ratio);
+				do_div(
+				clk_update.axi_vote.axi_path[i].ddr_ab_bw,
+					device_share_ratio);
+				do_div(
+				clk_update.axi_vote.axi_path[i].ddr_ib_bw,
+					device_share_ratio);
 			}
 		}
 	}
@@ -3877,7 +3892,7 @@ static int cam_icp_mgr_process_cmd_desc(struct cam_icp_hw_mgr *hw_mgr,
 	int rc = 0;
 	int i;
 	int num_cmd_buf = 0;
-	uint64_t addr;
+	dma_addr_t addr;
 	size_t len;
 	struct cam_cmd_buf_desc *cmd_desc = NULL;
 	uintptr_t cpu_addr = 0;
@@ -4020,7 +4035,7 @@ static int cam_icp_process_stream_settings(
 {
 	int rc = 0, i = 0;
 	size_t packet_size, map_cmd_size, len;
-	uint64_t iova;
+	dma_addr_t iova;
 	unsigned long rem_jiffies;
 	int timeout = 5000;
 	struct hfi_cmd_ipe_bps_map  *map_cmd;
@@ -4298,7 +4313,7 @@ static int cam_icp_process_generic_cmd_buffer(
 	struct cam_packet *packet,
 	struct cam_icp_hw_ctx_data *ctx_data,
 	int32_t index,
-	uint64_t *io_buf_addr)
+	dma_addr_t *io_buf_addr)
 {
 	int i, rc = 0;
 	struct cam_cmd_buf_desc *cmd_desc = NULL;
@@ -4394,7 +4409,7 @@ static void cam_icp_mgr_print_io_bufs(struct cam_packet *packet,
 	int32_t iommu_hdl, int32_t sec_mmu_hdl, uint32_t pf_buf_info,
 	bool *mem_found)
 {
-	uint64_t   iova_addr;
+	dma_addr_t   iova_addr;
 	size_t     src_buf_size;
 	int        i;
 	int        j;
@@ -4437,7 +4452,8 @@ static void cam_icp_mgr_print_io_bufs(struct cam_packet *packet,
 			rc = cam_mem_get_io_buf(io_cfg[i].mem_handle[j],
 				mmu_hdl, &iova_addr, &src_buf_size);
 			if (rc < 0) {
-				CAM_ERR(CAM_UTIL, "get src buf address fail");
+				CAM_ERR(CAM_UTIL,
+					"get src buf address fail rc %d", rc);
 				continue;
 			}
 			if (iova_addr >> 32) {
@@ -5055,7 +5071,7 @@ static int cam_icp_mgr_acquire_hw(void *hw_mgr_priv, void *acquire_hw_args)
 {
 	int rc = 0, bitmap_size = 0;
 	uint32_t ctx_id = 0, dev_type;
-	uint64_t io_buf_addr;
+	dma_addr_t io_buf_addr;
 	size_t io_buf_size;
 	struct cam_icp_hw_mgr *hw_mgr = hw_mgr_priv;
 	struct cam_icp_hw_ctx_data *ctx_data = NULL;

drivers/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.h

@@ -135,7 +135,7 @@ struct clk_work_data {
  */
 struct icp_frame_info {
 	uint64_t request_id;
-	uint64_t io_config;
+	dma_addr_t io_config;
 	struct hfi_cmd_ipebps_async hfi_cfg_io_cmd;
 };
 
@@ -262,7 +262,7 @@ struct cam_icp_hw_ctx_data {
 struct icp_cmd_generic_blob {
 	struct cam_icp_hw_ctx_data *ctx;
 	uint32_t frame_info_idx;
-	uint64_t *io_buf_addr;
+	dma_addr_t *io_buf_addr;
 };
 
 /**

drivers/cam_isp/cam_isp_context.c

@@ -24,9 +24,9 @@ static const char isp_dev_name[] = "cam-isp";
 
 static struct cam_isp_ctx_debug isp_ctx_debug;
 
-#define INC_STATE_MONITOR_HEAD(head) \
-	(atomic64_add_return(1, head) % \
-	CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES)
+#define INC_STATE_MONITOR_HEAD(head, ret) \
+	div_u64_rem(atomic64_add_return(1, head),\
+	CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES, (ret))
 
 static int cam_isp_context_dump_active_request(void *data, unsigned long iova,
 	uint32_t buf_info);
@@ -39,7 +39,9 @@ static void __cam_isp_ctx_update_state_monitor_array(
 	enum cam_isp_state_change_trigger trigger_type,
 	uint64_t req_id)
 {
-	int iterator = INC_STATE_MONITOR_HEAD(&ctx_isp->state_monitor_head);
+	int iterator;
+
+	INC_STATE_MONITOR_HEAD(&ctx_isp->state_monitor_head, &iterator);
 
 	ctx_isp->cam_isp_ctx_state_monitor[iterator].curr_state =
 		ctx_isp->substate_activated;
@@ -117,8 +119,8 @@ static void __cam_isp_ctx_dump_state_monitor_array(
 		oldest_entry = 0;
 	} else {
 		num_entries = CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES;
-		oldest_entry = (state_head + 1) %
-			CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES;
+		div_u64_rem(state_head + 1,
+			CAM_ISP_CTX_STATE_MONITOR_MAX_ENTRIES, &oldest_entry);
 	}
 
 	CAM_ERR(CAM_ISP,
@@ -810,21 +812,17 @@ static int __cam_isp_ctx_notify_sof_in_activated_state(
 			return rc;
 		}
 
-		spin_lock_bh(&ctx->lock);
 		req = list_first_entry(&ctx->active_req_list,
 			struct cam_ctx_request, list);
 		req_isp = (struct cam_isp_ctx_req *) req->req_priv;
-		spin_unlock_bh(&ctx->lock);
 
 		if (ctx_isp->bubble_frame_cnt >= 1 &&
 			req_isp->bubble_detected) {
 			req_isp->num_acked = 0;
 			ctx_isp->bubble_frame_cnt = 0;
 			req_isp->bubble_detected = false;
-			spin_lock_bh(&ctx->lock);
 			list_del_init(&req->list);
 			list_add(&req->list, &ctx->pending_req_list);
-			spin_unlock_bh(&ctx->lock);
 			atomic_set(&ctx_isp->process_bubble, 0);
 			ctx_isp->active_req_cnt--;
 			CAM_DBG(CAM_REQ,
@@ -1127,8 +1125,9 @@ static int __cam_isp_ctx_sof_in_epoch(struct cam_isp_context *ctx_isp,
 			CAM_ISP_STATE_CHANGE_TRIGGER_SOF,
 			req->request_id);
 
-	CAM_DBG(CAM_ISP, "next substate %d",
-		ctx_isp->substate_activated);
+	CAM_INFO(CAM_ISP,
+		"First SOF in EPCR ctx:%d frame_id:%lld next substate %d",
+		ctx->ctx_id, ctx_isp->frame_id, ctx_isp->substate_activated);
 
 	return rc;
 }
@@ -1409,7 +1408,7 @@ move_to_pending:
 end:
 	do {
 		if (list_empty(&ctx->pending_req_list)) {
-			error_request_id = ctx_isp->last_applied_req_id + 1;
+			error_request_id = ctx_isp->last_applied_req_id;
 			req_isp = NULL;
 			break;
 		}
@@ -1440,13 +1439,11 @@ end:
 		notify.link_hdl = ctx->link_hdl;
 		notify.dev_hdl = ctx->dev_hdl;
 		notify.req_id = error_request_id;
+		notify.error = CRM_KMD_ERR_FATAL;
 
-		if (req_isp_to_report && req_isp_to_report->bubble_report) {
+		if (req_isp_to_report && req_isp_to_report->bubble_report)
 			if (error_event_data->recovery_enabled)
 				notify.error = CRM_KMD_ERR_BUBBLE;
-		} else {
-			notify.error = CRM_KMD_ERR_FATAL;
-		}
 
 		CAM_WARN(CAM_ISP,
 			"Notify CRM: req %lld, frame %lld ctx %u, error %d",
@@ -2167,6 +2164,7 @@ static int __cam_isp_ctx_flush_req_in_top_state(
 			CAM_ERR(CAM_ISP, "Failed to stop HW in Flush rc: %d",
 				rc);
 
+		CAM_INFO(CAM_ISP, "Stop HW complete. Reset HW next.");
 		CAM_DBG(CAM_ISP, "Flush wait and active lists");
 		spin_lock_bh(&ctx->lock);
 		if (!list_empty(&ctx->wait_req_list))
@@ -3557,12 +3555,13 @@ static int __cam_isp_ctx_config_dev_in_flushed(struct cam_context *ctx,
 
 	if (!ctx_isp->hw_acquired) {
 		CAM_ERR(CAM_ISP, "HW is not acquired, reject packet");
-		return -EINVAL;
+		rc = -EINVAL;
+		goto end;
 	}
 
 	rc = __cam_isp_ctx_config_dev_in_top_state(ctx, cmd);
 	if (rc)
-		return rc;
+		goto end;
 
 	if (!ctx_isp->init_received) {
 		CAM_WARN(CAM_ISP,
@@ -3578,7 +3577,7 @@ static int __cam_isp_ctx_config_dev_in_flushed(struct cam_context *ctx,
 		&hw_cmd_args);
 	if (rc) {
 		CAM_ERR(CAM_ISP, "Failed to resume HW rc: %d", rc);
-		return rc;
+		goto end;
 	}
 
 	start_cmd.dev_handle = cmd->dev_handle;
@@ -3587,6 +3586,9 @@ static int __cam_isp_ctx_config_dev_in_flushed(struct cam_context *ctx,
 	if (rc)
 		CAM_ERR(CAM_ISP,
 			"Failed to re-start HW after flush rc: %d", rc);
+	else
+		CAM_INFO(CAM_ISP,
+			"Received init after flush. Re-start HW complete.");
 
 end:
 	CAM_DBG(CAM_ISP, "next state %d sub_state:%d", ctx->state,
@@ -3684,6 +3686,8 @@ static int __cam_isp_ctx_start_dev_in_ready(struct cam_context *ctx,
 	start_isp.hw_config.init_packet = 1;
 	start_isp.hw_config.reapply = 0;
 
+	ctx_isp->last_applied_req_id = req->request_id;
+
 	if (ctx->state == CAM_CTX_FLUSHED)
 		start_isp.start_only = true;
 	else
@@ -3838,6 +3842,7 @@ static int __cam_isp_ctx_stop_dev_in_activated_unlock(
 	ctx_isp->active_req_cnt = 0;
 	ctx_isp->reported_req_id = 0;
 	ctx_isp->bubble_frame_cnt = 0;
+	ctx_isp->last_applied_req_id = 0;
 	atomic_set(&ctx_isp->process_bubble, 0);
 	atomic64_set(&ctx_isp->state_monitor_head, -1);
 

drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c

@@ -689,16 +689,19 @@ static void cam_ife_hw_mgr_dump_acq_data(
 	struct cam_ife_hw_mgr_res    *hw_mgr_res_temp = NULL;
 	struct cam_isp_resource_node *hw_res = NULL;
 	struct timespec64            *ts = NULL;
-	uint64_t ms, tmp;
+	uint64_t ms, tmp, hrs, min, sec;
 	int i = 0, j = 0;
 
 	ts = &hwr_mgr_ctx->ts;
 	tmp = ts->tv_sec;
 	ms = (ts->tv_nsec) / 1000000;
+	sec = do_div(tmp, 60);
+	min = do_div(tmp, 60);
+	hrs = do_div(tmp, 24);
 
 	CAM_INFO(CAM_ISP,
 		"**** %llu:%llu:%llu.%llu ctx_idx: %u rdi_only: %s is_dual: %s acquired ****",
-		(tmp / 3600) % 24, (tmp / 60) % 60, tmp % 60, ms,
+		hrs, min, sec, ms,
 		hwr_mgr_ctx->ctx_index,
 		(hwr_mgr_ctx->is_rdi_only_context ? "true" : "false"),
 		(hwr_mgr_ctx->is_dual ? "true" : "false"));
@@ -778,7 +781,7 @@ static void cam_ife_hw_mgr_dump_acq_data(
 			if (hw_res && hw_res->hw_intf)
 				CAM_INFO(CAM_ISP,
 					"IFE out split_id: %d res_id: 0x%x hw_idx: %u state: %s",
-					i, hw_res->res_id,
+					j, hw_res->res_id,
 					hw_res->hw_intf->hw_idx,
 					cam_ife_hw_mgr_get_res_state
 					(hw_res->res_state));
@@ -5688,7 +5691,7 @@ static void cam_ife_mgr_print_io_bufs(struct cam_packet *packet,
 	int32_t iommu_hdl, int32_t sec_mmu_hdl, uint32_t pf_buf_info,
 	bool *mem_found)
 {
-	uint64_t   iova_addr;
+	dma_addr_t   iova_addr;
 	size_t     src_buf_size;
 	int        i;
 	int        j;

drivers/cam_isp/isp_hw_mgr/hw_utils/cam_isp_packet_parser.c

@@ -465,8 +465,8 @@ int cam_isp_add_io_buffers(
 	uint32_t                              size_isp_out,
 	bool                                  fill_fence)
 {
-	int rc = 0;
-	uint64_t                            io_addr[CAM_PACKET_MAX_PLANES];
+	int                                 rc = 0;
+	dma_addr_t                          io_addr[CAM_PACKET_MAX_PLANES];
 	struct cam_buf_io_cfg              *io_cfg;
 	struct cam_isp_resource_node       *res;
 	struct cam_ife_hw_mgr_res          *hw_mgr_res;

drivers/cam_isp/isp_hw_mgr/hw_utils/cam_tasklet_util.c

@@ -88,14 +88,16 @@ int cam_tasklet_get_cmd(
 	}
 
 	if (!atomic_read(&tasklet->tasklet_active)) {
-		CAM_ERR_RATE_LIMIT(CAM_ISP, "Tasklet is not active");
+		CAM_ERR_RATE_LIMIT(CAM_ISP, "Tasklet idx:%d is not active",
+			tasklet->index);
 		rc = -EPIPE;
 		return rc;
 	}
 
 	spin_lock_irqsave(&tasklet->tasklet_lock, flags);
 	if (list_empty(&tasklet->free_cmd_list)) {
-		CAM_ERR_RATE_LIMIT(CAM_ISP, "No more free tasklet cmd");
+		CAM_ERR_RATE_LIMIT(CAM_ISP, "No more free tasklet cmd idx:%d",
+			tasklet->index);
 		rc = -ENODEV;
 		goto spin_unlock;
 	} else {
@@ -158,7 +160,7 @@ static int cam_tasklet_dequeue_cmd(
 
 	*tasklet_cmd = NULL;
 
-	CAM_DBG(CAM_ISP, "Dequeue before lock.");
+	CAM_DBG(CAM_ISP, "Dequeue before lock tasklet idx:%d", tasklet->index);
 	spin_lock_irqsave(&tasklet->tasklet_lock, flags);
 	if (list_empty(&tasklet->used_cmd_list)) {
 		CAM_DBG(CAM_ISP, "End of list reached. Exit");
@@ -198,11 +200,12 @@ void cam_tasklet_enqueue_cmd(
 	}
 
 	if (!atomic_read(&tasklet->tasklet_active)) {
-		CAM_ERR_RATE_LIMIT(CAM_ISP, "Tasklet is not active\n");
+		CAM_ERR_RATE_LIMIT(CAM_ISP, "Tasklet is not active idx:%d",
+			tasklet->index);
 		return;
 	}
 
-	CAM_DBG(CAM_ISP, "Enqueue tasklet cmd");
+	CAM_DBG(CAM_ISP, "Enqueue tasklet cmd idx:%d", tasklet->index);
 	tasklet_cmd->bottom_half_handler = bottom_half_handler;
 	tasklet_cmd->payload = evt_payload_priv;
 	tasklet_cmd->handler_priv = handler_priv;
@@ -273,7 +276,7 @@ int cam_tasklet_start(void  *tasklet_info)
 	int i = 0;
 
 	if (atomic_read(&tasklet->tasklet_active)) {
-		CAM_ERR(CAM_ISP, "Tasklet already active. idx = %d",
+		CAM_ERR(CAM_ISP, "Tasklet already active idx:%d",
 			tasklet->index);
 		return -EBUSY;
 	}

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c

@@ -1773,8 +1773,11 @@ static int cam_ife_csid_init_config_pxl_path(
 		CAM_DBG(CAM_ISP, "CSID:%d Vertical Crop config val: 0x%x",
 			csid_hw->hw_intf->hw_idx, val);
 
-		/* Enable generating early eof strobe based on crop config */
-		if (!(csid_hw->csid_debug & CSID_DEBUG_DISABLE_EARLY_EOF)) {
+		/* Enable generating early eof strobe based on crop config.
+		 * Skip for version 480 HW due to HW limitation.
+		 */
+		if (!(csid_hw->csid_debug & CSID_DEBUG_DISABLE_EARLY_EOF) &&
+			(camera_hw_version != CAM_CPAS_TITAN_480_V100)) {
 			val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
 				pxl_reg->csid_pxl_cfg0_addr);
 			val |= (1 << pxl_reg->early_eof_en_shift_val);

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_isp_hw.h

@@ -201,7 +201,7 @@ struct cam_isp_hw_cmd_buf_update {
  *
  */
 struct cam_isp_hw_get_wm_update {
-	uint64_t                       *image_buf;
+	dma_addr_t                     *image_buf;
 	uint32_t                        num_buf;
 	struct cam_buf_io_cfg          *io_cfg;
 };

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/cam_vfe_core.c

@@ -251,6 +251,13 @@ int cam_vfe_deinit_hw(void *hw_priv, void *deinit_hw_args, uint32_t arg_size)
 		return -EINVAL;
 	}
 
+	isp_res = (struct cam_isp_resource_node *)deinit_hw_args;
+	if (isp_res && isp_res->deinit) {
+		rc = isp_res->deinit(isp_res, NULL, 0);
+		if (rc)
+			CAM_ERR(CAM_ISP, "deinit failed");
+	}
+
 	mutex_lock(&vfe_hw->hw_mutex);
 	if (!vfe_hw->open_count) {
 		mutex_unlock(&vfe_hw->hw_mutex);
@@ -281,13 +288,6 @@ int cam_vfe_deinit_hw(void *hw_priv, void *deinit_hw_args, uint32_t arg_size)
 			CAM_ERR(CAM_ISP, "Bus HW deinit Failed rc=%d", rc);
 	}
 
-	isp_res   = (struct cam_isp_resource_node *)deinit_hw_args;
-	if (isp_res && isp_res->deinit) {
-		rc = isp_res->deinit(isp_res, NULL, 0);
-		if (rc)
-			CAM_ERR(CAM_ISP, "deinit failed");
-	}
-
 	rc = cam_vfe_reset(hw_priv, &reset_core_args, sizeof(uint32_t));
 
 	/* Turn OFF Regulators, Clocks and other SOC resources */

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_lite_ver3.c

@@ -762,72 +762,57 @@ static int cam_vfe_camif_lite_process_cmd(
 	return rc;
 }
 
-static void cam_vfe_camif_lite_overflow_debug_info(uint32_t *status,
+static void cam_vfe_camif_lite_overflow_debug_info(
 	struct cam_vfe_mux_camif_lite_data *camif_lite_priv)
 {
-	uint32_t bus_overflow_status = 0;
 	struct cam_vfe_soc_private *soc_private = NULL;
 	uint32_t val0, val1, val2, val3;
 
-	bus_overflow_status = status[CAM_IFE_IRQ_BUS_OVERFLOW_STATUS];
 	soc_private = camif_lite_priv->soc_info->soc_private;
 
-	if (bus_overflow_status) {
-		cam_cpas_reg_read(soc_private->cpas_handle,
-			CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);
-		cam_cpas_reg_read(soc_private->cpas_handle,
-			CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);
-		cam_cpas_reg_read(soc_private->cpas_handle,
-			CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);
-		CAM_INFO(CAM_ISP,
-			"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",
-			val0, val1, val2);
+	val0 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_0);
+	val1 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_1);
+	val2 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_2);
+	val3 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_3);
+	CAM_INFO(CAM_ISP,
+		"status_0: 0x%X status_1: 0x%X status_2: 0x%X status_3: 0x%X",
+		val0, val1, val2, val3);
 
-	} else {
-		val0 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_0);
-		val1 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_1);
-		val2 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_2);
-		val3 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_3);
-		CAM_INFO(CAM_ISP,
-			"status_0: 0x%X status_1: 0x%X status_2: 0x%X status_3: 0x%X",
-			val0, val1, val2, val3);
-
-		if (soc_private->is_ife_lite)
-			return;
-
-		val0 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_4);
-		val1 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_5);
-		val2 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_6);
-		val3 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_7);
-		CAM_INFO(CAM_ISP,
-			"status_4: 0x%X status_5: 0x%X status_6: 0x%X status_7: 0x%X",
-			val0, val1, val2, val3);
-		val0 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_8);
-		val1 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_9);
-		val2 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_10);
-		val3 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_11);
-		CAM_INFO(CAM_ISP,
-			"status_8: 0x%X status_9: 0x%X status_10: 0x%X status_11: 0x%X",
-			val0, val1, val2, val3);
-		val0 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_12);
-		val1 = cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->top_debug_13);
-		CAM_INFO(CAM_ISP, "status_12: 0x%X status_13: 0x%X",
-			val0, val1);
-	}
+	if (soc_private->is_ife_lite)
+		return;
+
+	val0 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_4);
+	val1 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_5);
+	val2 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_6);
+	val3 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_7);
+	CAM_INFO(CAM_ISP,
+		"status_4: 0x%X status_5: 0x%X status_6: 0x%X status_7: 0x%X",
+		val0, val1, val2, val3);
+	val0 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_8);
+	val1 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_9);
+	val2 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_10);
+	val3 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_11);
+	CAM_INFO(CAM_ISP,
+		"status_8: 0x%X status_9: 0x%X status_10: 0x%X status_11: 0x%X",
+		val0, val1, val2, val3);
+	val0 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_12);
+	val1 = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->top_debug_13);
+	CAM_INFO(CAM_ISP, "status_12: 0x%X status_13: 0x%X",
+		val0, val1);
 }
 
 static void cam_vfe_camif_lite_print_status(uint32_t *status,
@@ -836,6 +821,7 @@ static void cam_vfe_camif_lite_print_status(uint32_t *status,
 	uint32_t violation_mask = 0x3F00, violation_status = 0;
 	uint32_t bus_overflow_status = 0, status_0 = 0, status_2 = 0;
 	struct cam_vfe_soc_private *soc_private = NULL;
+	uint32_t val0, val1, val2;
 
 	if (!status) {
 		CAM_ERR(CAM_ISP, "Invalid params");
@@ -893,13 +879,21 @@ static void cam_vfe_camif_lite_print_status(uint32_t *status,
 		if (bus_overflow_status & 0x02000000)
 			CAM_INFO(CAM_ISP, "RDI2 BUS OVERFLOW");
 
-		return;
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);
+		CAM_INFO(CAM_ISP,
+			"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",
+			val0, val1, val2);
 	}
 
 	if (err_type == CAM_VFE_IRQ_STATUS_OVERFLOW && !bus_overflow_status) {
 		CAM_INFO(CAM_ISP, "PDLIB / LCR Module hang");
 		/* print debug registers */
-		cam_vfe_camif_lite_overflow_debug_info(status, camif_lite_priv);
+		cam_vfe_camif_lite_overflow_debug_info(camif_lite_priv);
 		return;
 	}
 
@@ -979,12 +973,22 @@ ife_lite:
 
 		if (bus_overflow_status & 0x08)
 			CAM_INFO(CAM_ISP, "RDI3 BUS OVERFLOW");
+
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);
+		CAM_INFO(CAM_ISP,
+			"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",
+			val0, val1, val2);
 	}
 
 	if (err_type == CAM_VFE_IRQ_STATUS_OVERFLOW && !bus_overflow_status) {
 		CAM_INFO(CAM_ISP, "RDI hang");
 		/* print debug registers */
-		cam_vfe_camif_lite_overflow_debug_info(status, camif_lite_priv);
+		cam_vfe_camif_lite_overflow_debug_info(camif_lite_priv);
 		return;
 	}
 

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_ver3.c

@@ -425,9 +425,8 @@ static int cam_vfe_camif_ver3_resource_start(
 	/* epoch config */
 	switch (soc_private->cpas_version) {
 	case CAM_CPAS_TITAN_480_V100:
-		epoch0_line_cfg = ((rsrc_data->last_line -
-			rsrc_data->first_line) / 4) +
-			rsrc_data->first_line;
+		epoch0_line_cfg = (rsrc_data->last_line -
+			rsrc_data->first_line) / 4;
 	/* epoch line cfg will still be configured at midpoint of the
 	 * frame width. We use '/ 4' instead of '/ 2'
 	 * cause it is multipixel path
@@ -776,71 +775,53 @@ static int cam_vfe_camif_ver3_process_cmd(
 }
 
 
-static void cam_vfe_camif_ver3_overflow_debug_info(uint32_t *status,
+static void cam_vfe_camif_ver3_overflow_debug_info(
 	struct cam_vfe_mux_camif_ver3_data *camif_priv)
 {
-	struct cam_vfe_soc_private *soc_private;
-	uint32_t bus_overflow_status;
 	uint32_t val0, val1, val2, val3;
 
-	bus_overflow_status = status[CAM_IFE_IRQ_BUS_OVERFLOW_STATUS];
-	soc_private = camif_priv->soc_info->soc_private;
-
-	if (bus_overflow_status) {
-		cam_cpas_reg_read(soc_private->cpas_handle,
-			CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);
-		cam_cpas_reg_read(soc_private->cpas_handle,
-			CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);
-		cam_cpas_reg_read(soc_private->cpas_handle,
-			CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);
-		CAM_INFO(CAM_ISP,
-			"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",
-			val0, val1, val2);
-	} else {
-		val0 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_0);
-		val1 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_1);
-		val2 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_2);
-		val3 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_3);
-		CAM_INFO(CAM_ISP,
-			"status_0: 0x%X status_1: 0x%X status_2: 0x%X status_3: 0x%X",
-			val0, val1, val2, val3);
-
-		val0 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_4);
-		val1 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_5);
-		val2 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_6);
-		val3 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_7);
-		CAM_INFO(CAM_ISP,
-			"status_4: 0x%X status_5: 0x%X status_6: 0x%X status_7: 0x%X",
-			val0, val1, val2, val3);
-
-		val0 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_8);
-		val1 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_9);
-		val2 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_10);
-		val3 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_11);
-		CAM_INFO(CAM_ISP,
-			"status_8: 0x%X status_9: 0x%X status_10: 0x%X status_11: 0x%X",
-			val0, val1, val2, val3);
-
-		val0 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_12);
-		val1 = cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->top_debug_13);
-		CAM_INFO(CAM_ISP, "status_12: 0x%X status_13: 0x%X",
-			val0, val1);
-	}
-
+	val0 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_0);
+	val1 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_1);
+	val2 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_2);
+	val3 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_3);
+	CAM_INFO(CAM_ISP,
+		"status_0: 0x%X status_1: 0x%X status_2: 0x%X status_3: 0x%X",
+		val0, val1, val2, val3);
+
+	val0 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_4);
+	val1 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_5);
+	val2 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_6);
+	val3 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_7);
+	CAM_INFO(CAM_ISP,
+		"status_4: 0x%X status_5: 0x%X status_6: 0x%X status_7: 0x%X",
+		val0, val1, val2, val3);
+
+	val0 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_8);
+	val1 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_9);
+	val2 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_10);
+	val3 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_11);
+	CAM_INFO(CAM_ISP,
+		"status_8: 0x%X status_9: 0x%X status_10: 0x%X status_11: 0x%X",
+		val0, val1, val2, val3);
+
+	val0 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_12);
+	val1 = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->top_debug_13);
+	CAM_INFO(CAM_ISP, "status_12: 0x%X status_13: 0x%X",
+		val0, val1);
 }
 
 static void cam_vfe_camif_ver3_print_status(uint32_t *status,
@@ -848,6 +829,8 @@ static void cam_vfe_camif_ver3_print_status(uint32_t *status,
 {
 	uint32_t violation_mask = 0x3F, module_id = 0;
 	uint32_t bus_overflow_status = 0, status_0 = 0, status_2 = 0;
+	struct cam_vfe_soc_private *soc_private;
+	uint32_t val0, val1, val2;
 
 	if (!status) {
 		CAM_ERR(CAM_ISP, "Invalid params");
@@ -933,13 +916,23 @@ static void cam_vfe_camif_ver3_print_status(uint32_t *status,
 		if (bus_overflow_status & 0x0200000)
 			CAM_INFO(CAM_ISP, "PDAF BUS OVERFLOW");
 
+		soc_private = camif_priv->soc_info->soc_private;
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);
+		CAM_INFO(CAM_ISP,
+			"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",
+			val0, val1, val2);
 		return;
 	}
 
 	if (err_type == CAM_VFE_IRQ_STATUS_OVERFLOW && !bus_overflow_status) {
 		CAM_INFO(CAM_ISP, "PIXEL PIPE Module hang");
 		/* print debug registers */
-		cam_vfe_camif_ver3_overflow_debug_info(status, camif_priv);
+		cam_vfe_camif_ver3_overflow_debug_info(camif_priv);
 		return;
 	}
 

drivers/cam_jpeg/jpeg_hw/cam_jpeg_hw_mgr.c

@@ -611,7 +611,7 @@ static void cam_jpeg_mgr_print_io_bufs(struct cam_packet *packet,
 	int32_t iommu_hdl, int32_t sec_mmu_hdl, uint32_t pf_buf_info,
 	bool *mem_found)
 {
-	uint64_t   iova_addr;
+	dma_addr_t   iova_addr;
 	size_t     src_buf_size;
 	int        i;
 	int        j;

drivers/cam_lrme/cam_lrme_context.h

@@ -11,7 +11,7 @@
 #include "cam_hw_mgr_intf.h"
 #include "cam_req_mgr_interface.h"
 
-#define CAM_LRME_CTX_INDEX_SHIFT 32
+#define CAM_LRME_CTX_INDEX_SHIFT 16
 
 /**
  * struct cam_lrme_context

drivers/cam_lrme/lrme_hw_mgr/cam_lrme_hw_mgr.c

@@ -144,7 +144,7 @@ static int cam_lrme_mgr_util_prepare_io_buffer(int32_t iommu_hdl,
 	int rc = -EINVAL;
 	uint32_t num_in_buf, num_out_buf, i, j, plane;
 	struct cam_buf_io_cfg *io_cfg;
-	uint64_t io_addr[CAM_PACKET_MAX_PLANES];
+	dma_addr_t io_addr[CAM_PACKET_MAX_PLANES];
 	size_t size;
 
 	num_in_buf = 0;

drivers/cam_req_mgr/cam_mem_mgr.c

@@ -175,7 +175,7 @@ static void cam_mem_put_slot(int32_t idx)
 }
 
 int cam_mem_get_io_buf(int32_t buf_handle, int32_t mmu_handle,
-	uint64_t *iova_ptr, size_t *len_ptr)
+	dma_addr_t *iova_ptr, size_t *len_ptr)
 {
 	int rc = 0, idx;
 
@@ -188,10 +188,10 @@ int cam_mem_get_io_buf(int32_t buf_handle, int32_t mmu_handle,
 
 	idx = CAM_MEM_MGR_GET_HDL_IDX(buf_handle);
 	if (idx >= CAM_MEM_BUFQ_MAX || idx <= 0)
-		return -EINVAL;
+		return -ENOENT;
 
 	if (!tbl.bufq[idx].active)
-		return -EINVAL;
+		return -EAGAIN;
 
 	mutex_lock(&tbl.bufq[idx].q_lock);
 	if (buf_handle != tbl.bufq[idx].buf_handle) {

drivers/cam_req_mgr/cam_mem_mgr_api.h

@@ -75,7 +75,7 @@ int cam_mem_mgr_release_mem(struct cam_mem_mgr_memory_desc *inp);
  * @return Status of operation. Negative in case of error. Zero otherwise.
  */
 int cam_mem_get_io_buf(int32_t buf_handle, int32_t mmu_handle,
-	uint64_t *iova_ptr, size_t *len_ptr);
+	dma_addr_t *iova_ptr, size_t *len_ptr);
 
 /**
  * @brief: This indicates begin of CPU access.

drivers/cam_req_mgr/cam_req_mgr_core.c

@@ -416,6 +416,50 @@ static void __cam_req_mgr_tbl_set_all_skip_cnt(
 	} while (tbl != NULL);
 }
 
+/**
+ * __cam_req_mgr_flush_req_slot()
+ *
+ * @brief    : reset all the slots/pd tables when flush is
+ *             invoked
+ * @link     : link pointer
+ *
+ */
+static void __cam_req_mgr_flush_req_slot(
+	struct cam_req_mgr_core_link *link)
+{
+	int                           idx = 0;
+	struct cam_req_mgr_slot      *slot;
+	struct cam_req_mgr_req_tbl   *tbl;
+	struct cam_req_mgr_req_queue *in_q = link->req.in_q;
+
+	for (idx = 0; idx < in_q->num_slots; idx++) {
+		slot = &in_q->slot[idx];
+		tbl = link->req.l_tbl;
+		CAM_DBG(CAM_CRM,
+			"RESET idx: %d req_id: %lld slot->status: %d",
+			idx, slot->req_id, slot->status);
+
+		/* Reset input queue slot */
+		slot->req_id = -1;
+		slot->skip_idx = 1;
+		slot->recover = 0;
+		slot->sync_mode = CAM_REQ_MGR_SYNC_MODE_NO_SYNC;
+		slot->status = CRM_SLOT_STATUS_NO_REQ;
+
+		/* Reset all pd table slot */
+		while (tbl != NULL) {
+			CAM_DBG(CAM_CRM, "pd: %d: idx %d state %d",
+				tbl->pd, idx, tbl->slot[idx].state);
+			tbl->slot[idx].req_ready_map = 0;
+			tbl->slot[idx].state = CRM_REQ_STATE_EMPTY;
+			tbl = tbl->next;
+		}
+	}
+
+	in_q->wr_idx = 0;
+	in_q->rd_idx = 0;
+}
+
 /**
  * __cam_req_mgr_reset_req_slot()
  *
@@ -1966,15 +2010,7 @@ int cam_req_mgr_process_flush_req(void *priv, void *data)
 		link->last_flush_id = flush_info->req_id;
 		CAM_INFO(CAM_CRM, "Last request id to flush is %lld",
 			flush_info->req_id);
-		for (i = 0; i < in_q->num_slots; i++) {
-			slot = &in_q->slot[i];
-			slot->req_id = -1;
-			slot->sync_mode = CAM_REQ_MGR_SYNC_MODE_NO_SYNC;
-			slot->skip_idx = 1;
-			slot->status = CRM_SLOT_STATUS_NO_REQ;
-		}
-		in_q->wr_idx = 0;
-		in_q->rd_idx = 0;
+		__cam_req_mgr_flush_req_slot(link);
 	} else if (flush_info->flush_type ==
 		CAM_REQ_MGR_FLUSH_TYPE_CANCEL_REQ) {
 		idx = __cam_req_mgr_find_slot_for_req(in_q, flush_info->req_id);

drivers/cam_req_mgr/cam_req_mgr_dev.c

@@ -197,10 +197,53 @@ static struct v4l2_file_operations g_cam_fops = {
 #endif
 };
 
+static void cam_v4l2_event_queue_notify_error(const struct v4l2_event *old,
+	struct v4l2_event *new)
+{
+	struct cam_req_mgr_message *ev_header;
+
+	ev_header = CAM_REQ_MGR_GET_PAYLOAD_PTR((*old),
+		struct cam_req_mgr_message);
+	switch (old->id) {
+	case V4L_EVENT_CAM_REQ_MGR_SOF:
+		CAM_ERR(CAM_CRM, "Failed to notify SOF event");
+		CAM_ERR(CAM_CRM, "Sess %X FrameId %lld ReqId %lld link %X",
+			ev_header->session_hdl,
+			ev_header->u.frame_msg.frame_id,
+			ev_header->u.frame_msg.request_id,
+			ev_header->u.frame_msg.link_hdl);
+		break;
+	case V4L_EVENT_CAM_REQ_MGR_ERROR:
+		CAM_ERR(CAM_CRM, "Failed to notify ERROR");
+		CAM_ERR(CAM_CRM, "Sess %X ReqId %d Link %X Type %d",
+			ev_header->u.err_msg.error_type,
+			ev_header->u.err_msg.request_id,
+			ev_header->u.err_msg.link_hdl,
+			ev_header->u.err_msg.error_type);
+		break;
+	case V4L_EVENT_CAM_REQ_MGR_SOF_BOOT_TS:
+		CAM_ERR(CAM_CRM, "Failed to notify BOOT_TS event");
+		CAM_ERR(CAM_CRM, "Sess %X FrameId %lld ReqId %lld link %X",
+			ev_header->session_hdl,
+			ev_header->u.frame_msg.frame_id,
+			ev_header->u.frame_msg.request_id,
+			ev_header->u.frame_msg.link_hdl);
+		break;
+	default:
+		CAM_ERR(CAM_CRM, "Failed to notify crm event id %d",
+			old->id);
+	}
+}
+
+static struct v4l2_subscribed_event_ops g_cam_v4l2_ops = {
+	.merge = cam_v4l2_event_queue_notify_error,
+};
+
 static int cam_subscribe_event(struct v4l2_fh *fh,
 	const struct v4l2_event_subscription *sub)
 {
-	return v4l2_event_subscribe(fh, sub, CAM_REQ_MGR_EVENT_MAX, NULL);
+	return v4l2_event_subscribe(fh, sub, CAM_REQ_MGR_EVENT_MAX,
+		&g_cam_v4l2_ops);
 }
 
 static int cam_unsubscribe_event(struct v4l2_fh *fh,

drivers/cam_req_mgr/cam_req_mgr_util.c

@@ -45,7 +45,7 @@ int cam_req_mgr_util_init(void)
 	hdl_tbl = hdl_tbl_local;
 	spin_unlock_bh(&hdl_tbl_lock);
 
-	bitmap_size = BITS_TO_LONGS(CAM_REQ_MGR_MAX_HANDLES) * sizeof(long);
+	bitmap_size = BITS_TO_LONGS(CAM_REQ_MGR_MAX_HANDLES_V2) * sizeof(long);
 	hdl_tbl->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
 	if (!hdl_tbl->bitmap) {
 		rc = -ENOMEM;
@@ -92,7 +92,7 @@ int cam_req_mgr_util_free_hdls(void)
 		return -EINVAL;
 	}
 
-	for (i = 0; i < CAM_REQ_MGR_MAX_HANDLES; i++) {
+	for (i = 0; i < CAM_REQ_MGR_MAX_HANDLES_V2; i++) {
 		if (hdl_tbl->hdl[i].state == HDL_ACTIVE) {
 			CAM_WARN(CAM_CRM, "Dev handle = %x session_handle = %x",
 				hdl_tbl->hdl[i].hdl_value,
@@ -101,7 +101,7 @@ int cam_req_mgr_util_free_hdls(void)
 			clear_bit(i, hdl_tbl->bitmap);
 		}
 	}
-	bitmap_zero(hdl_tbl->bitmap, CAM_REQ_MGR_MAX_HANDLES);
+	bitmap_zero(hdl_tbl->bitmap, CAM_REQ_MGR_MAX_HANDLES_V2);
 	spin_unlock_bh(&hdl_tbl_lock);
 
 	return 0;
@@ -113,7 +113,7 @@ static int32_t cam_get_free_handle_index(void)
 
 	idx = find_first_zero_bit(hdl_tbl->bitmap, hdl_tbl->bits);
 
-	if (idx >= CAM_REQ_MGR_MAX_HANDLES || idx < 0)
+	if (idx >= CAM_REQ_MGR_MAX_HANDLES_V2 || idx < 0)
 		return -ENOSR;
 
 	set_bit(idx, hdl_tbl->bitmap);
@@ -201,7 +201,7 @@ void *cam_get_device_priv(int32_t dev_hdl)
 	}
 
 	idx = CAM_REQ_MGR_GET_HDL_IDX(dev_hdl);
-	if (idx >= CAM_REQ_MGR_MAX_HANDLES) {
+	if (idx >= CAM_REQ_MGR_MAX_HANDLES_V2) {
 		CAM_ERR_RATE_LIMIT(CAM_CRM, "Invalid idx");
 		goto device_priv_fail;
 	}
@@ -245,7 +245,7 @@ void *cam_get_device_ops(int32_t dev_hdl)
 	}
 
 	idx = CAM_REQ_MGR_GET_HDL_IDX(dev_hdl);
-	if (idx >= CAM_REQ_MGR_MAX_HANDLES) {
+	if (idx >= CAM_REQ_MGR_MAX_HANDLES_V2) {
 		CAM_ERR(CAM_CRM, "Invalid idx");
 		goto device_ops_fail;
 	}
@@ -288,7 +288,7 @@ static int cam_destroy_hdl(int32_t dev_hdl, int dev_hdl_type)
 	}
 
 	idx = CAM_REQ_MGR_GET_HDL_IDX(dev_hdl);
-	if (idx >= CAM_REQ_MGR_MAX_HANDLES) {
+	if (idx >= CAM_REQ_MGR_MAX_HANDLES_V2) {
 		CAM_ERR(CAM_CRM, "Invalid idx %d", idx);
 		goto destroy_hdl_fail;
 	}

drivers/cam_req_mgr/cam_req_mgr_util.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  */
 
 #ifndef _CAM_REQ_MGR_UTIL_API_H_
@@ -54,7 +54,7 @@ struct handle {
  * @bits: size of bit map in bits
  */
 struct cam_req_mgr_util_hdl_tbl {
-	struct handle hdl[CAM_REQ_MGR_MAX_HANDLES];
+	struct handle hdl[CAM_REQ_MGR_MAX_HANDLES_V2];
 	void *bitmap;
 	size_t bits;
 };

drivers/cam_sensor_module/cam_csiphy/cam_csiphy_core.c

@@ -375,6 +375,7 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev)
 	uint16_t     lane_mask = 0, i = 0, cfg_size = 0, temp = 0;
 	uint8_t      lane_cnt, lane_pos = 0;
 	uint16_t     settle_cnt = 0;
+	uint64_t     intermediate_var;
 	void __iomem *csiphybase;
 	struct csiphy_reg_t *csiphy_common_reg = NULL;
 	struct csiphy_reg_t (*reg_array)[MAX_SETTINGS_PER_LANE];
@@ -484,12 +485,16 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev)
 			continue;
 		}
 
-		settle_cnt = (csiphy_dev->csiphy_info.settle_time / 200000000);
+		intermediate_var = csiphy_dev->csiphy_info.settle_time;
+		do_div(intermediate_var, 200000000);
+		settle_cnt = intermediate_var;
 		if (csiphy_dev->csiphy_info.combo_mode == 1 &&
-			(lane_pos >= 3))
-			settle_cnt =
-			(csiphy_dev->csiphy_info.settle_time_combo_sensor /
-				200000000);
+			(lane_pos >= 3)) {
+			intermediate_var =
+			csiphy_dev->csiphy_info.settle_time_combo_sensor;
+			do_div(intermediate_var, 200000000);
+			settle_cnt = intermediate_var;
+		}
 		for (i = 0; i < cfg_size; i++) {
 			switch (reg_array[lane_pos][i].csiphy_param_type) {
 			case CSIPHY_LANE_ENABLE:

drivers/cam_sensor_module/cam_csiphy/cam_csiphy_soc.c

@@ -269,7 +269,7 @@ int32_t cam_csiphy_parse_dt_info(struct platform_device *pdev,
 		csiphy_dev->hw_version = CSIPHY_VERSION_V12;
 		csiphy_dev->clk_lane = 0;
 		csiphy_dev->ctrl_reg->data_rates_settings_table =
-			&data_rate_delta_table;
+			&data_rate_delta_table_1_2;
 	} else if (of_device_is_compatible(soc_info->dev->of_node,
 		"qcom,csiphy-v1.2.1")) {
 		csiphy_dev->ctrl_reg->csiphy_2ph_reg = csiphy_2ph_v1_2_1_reg;
@@ -308,7 +308,8 @@ int32_t cam_csiphy_parse_dt_info(struct platform_device *pdev,
 		csiphy_dev->is_divisor_32_comp = false;
 		csiphy_dev->hw_version = CSIPHY_VERSION_V12;
 		csiphy_dev->clk_lane = 0;
-		csiphy_dev->ctrl_reg->data_rates_settings_table = NULL;
+		csiphy_dev->ctrl_reg->data_rates_settings_table =
+			&data_rate_delta_table_1_2;
 	} else if (of_device_is_compatible(soc_info->dev->of_node,
 		"qcom,csiphy-v2.0")) {
 		csiphy_dev->ctrl_reg->csiphy_2ph_reg = csiphy_2ph_v2_0_reg;

drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_2_hwreg.h

@@ -376,17 +376,14 @@ csiphy_reg_t csiphy_3ph_v1_2_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = {
 	},
 };
 
-struct data_rate_settings_t data_rate_delta_table = {
+struct data_rate_settings_t data_rate_delta_table_1_2 = {
 	.num_data_rate_settings = 3,
 	.data_rate_settings = {
 		{
 			/* (2.5 * 10**3 * 2.28) rounded value*/
 			.bandwidth = 5700000000,
-			.data_rate_reg_array_size = 9,
+			.data_rate_reg_array_size = 6,
 			.csiphy_data_rate_regs = {
-				{0x9B4, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
-				{0xAB4, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
-				{0xBB4, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
 				{0x144, 0x22, 0x00, CSIPHY_DEFAULT_PARAMS},
 				{0x344, 0x22, 0x00, CSIPHY_DEFAULT_PARAMS},
 				{0x544, 0x22, 0x00, CSIPHY_DEFAULT_PARAMS},
@@ -398,11 +395,8 @@ struct data_rate_settings_t data_rate_delta_table = {
 		{
 			/* (3.5 * 10**3 * 2.28) rounded value */
 			.bandwidth = 7980000000,
-			.data_rate_reg_array_size = 18,
+			.data_rate_reg_array_size = 15,
 			.csiphy_data_rate_regs = {
-				{0x9B4, 0x03, 0x00, CSIPHY_DEFAULT_PARAMS},
-				{0xAB4, 0x03, 0x00, CSIPHY_DEFAULT_PARAMS},
-				{0xBB4, 0x03, 0x00, CSIPHY_DEFAULT_PARAMS},
 				{0x144, 0xB2, 0x00, CSIPHY_DEFAULT_PARAMS},
 				{0x344, 0xB2, 0x00, CSIPHY_DEFAULT_PARAMS},
 				{0x544, 0xB2, 0x00, CSIPHY_DEFAULT_PARAMS},
@@ -418,17 +412,13 @@ struct data_rate_settings_t data_rate_delta_table = {
 				{0x10C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
 				{0x30C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
 				{0x50C, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
-
 			},
 		},
 		{
 			/* (4.5 * 10**3 * 2.28) rounded value */
 			.bandwidth = 10260000000,
-			.data_rate_reg_array_size = 18,
+			.data_rate_reg_array_size = 15,
 			.csiphy_data_rate_regs = {
-				{0x9B4, 0x03, 0x00, CSIPHY_DEFAULT_PARAMS},
-				{0xAB4, 0x03, 0x00, CSIPHY_DEFAULT_PARAMS},
-				{0xBB4, 0x03, 0x00, CSIPHY_DEFAULT_PARAMS},
 				{0x144, 0xB2, 0x00, CSIPHY_DEFAULT_PARAMS},
 				{0x344, 0xB2, 0x00, CSIPHY_DEFAULT_PARAMS},
 				{0x544, 0xB2, 0x00, CSIPHY_DEFAULT_PARAMS},

drivers/cam_smmu/cam_smmu_api.c

@@ -3546,7 +3546,7 @@ static int cam_populate_smmu_context_banks(struct device *dev,
 	}
 
 	dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
-	dma_set_seg_boundary(dev, DMA_BIT_MASK(64));
+	dma_set_seg_boundary(dev, (unsigned long)DMA_BIT_MASK(64));
 
 end:
 	/* increment count to next bank */

drivers/cam_sync/cam_sync.c

@@ -847,10 +847,25 @@ static int cam_sync_close(struct file *filep)
 	return rc;
 }
 
+static void cam_sync_event_queue_notify_error(const struct v4l2_event *old,
+	struct v4l2_event *new)
+{
+	struct cam_sync_ev_header *ev_header;
+
+	ev_header = CAM_SYNC_GET_HEADER_PTR((*old));
+	CAM_ERR(CAM_CRM, "Failed to notify event id %d fence %d statue %d",
+		old->id, ev_header->sync_obj, ev_header->status);
+}
+
+static struct v4l2_subscribed_event_ops cam_sync_v4l2_ops = {
+	.merge = cam_sync_event_queue_notify_error,
+};
+
 int cam_sync_subscribe_event(struct v4l2_fh *fh,
 		const struct v4l2_event_subscription *sub)
 {
-	return v4l2_event_subscribe(fh, sub, CAM_SYNC_MAX_V4L2_EVENTS, NULL);
+	return v4l2_event_subscribe(fh, sub, CAM_SYNC_MAX_V4L2_EVENTS,
+		&cam_sync_v4l2_ops);
 }
 
 int cam_sync_unsubscribe_event(struct v4l2_fh *fh,