msm: camera: cdm: Correct the CDM iommu handle
Correct the CDM iommu handler by changing the false pid and mid values written in the cdm header file. Also, adding a support to read the pid and mid from the dtsi file, since there is already support for the PID values available in the dtsi. CRs-fixed: 2982542 Change-Id: I319a32fdcba44a6a96b79e4e67b0a2cc0e01bc4c Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
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@@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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/*
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* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
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* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
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*/
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*/
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#ifndef _CAM_CDM_H_
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#ifndef _CAM_CDM_H_
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@@ -132,14 +132,6 @@
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CAM_CDM_IRQ_STATUS_ERROR_OVER_FLOW_MASK | \
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CAM_CDM_IRQ_STATUS_ERROR_OVER_FLOW_MASK | \
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CAM_CDM_IRQ_STATUS_ERROR_AHB_BUS_MASK)
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CAM_CDM_IRQ_STATUS_ERROR_AHB_BUS_MASK)
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struct cam_cdm_pid_mid_data {
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int cdm_pid;
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int cdm_mid;
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int ope_cdm_pid;
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int ope_cdm_mid;
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};
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/* Structure to store hw version info */
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/* Structure to store hw version info */
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struct cam_version_reg {
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struct cam_version_reg {
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uint32_t hw_version;
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uint32_t hw_version;
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@@ -383,7 +375,6 @@ struct cam_cdm_common_regs {
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const struct cam_cdm_icl_regs *icl_reg;
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const struct cam_cdm_icl_regs *icl_reg;
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uint32_t spare;
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uint32_t spare;
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uint32_t priority_group_bit_offset;
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uint32_t priority_group_bit_offset;
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struct cam_cdm_pid_mid_data *cdm_pid_mid_info;
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};
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};
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/**
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/**
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@@ -570,6 +561,8 @@ struct cam_cdm_private_dt_data {
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uint8_t priority_group;
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uint8_t priority_group;
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uint32_t fifo_depth[CAM_CDM_BL_FIFO_MAX];
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uint32_t fifo_depth[CAM_CDM_BL_FIFO_MAX];
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uint32_t dt_num_supported_clients;
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uint32_t dt_num_supported_clients;
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uint32_t pid;
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uint32_t mid;
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const char *dt_cdm_client_name[CAM_PER_CDM_MAX_REGISTERED_CLIENTS];
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const char *dt_cdm_client_name[CAM_PER_CDM_MAX_REGISTERED_CLIENTS];
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};
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};
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@@ -737,6 +737,10 @@ bool cam_hw_cdm_bl_write(
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{
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{
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struct cam_cdm *cdm_core = (struct cam_cdm *)cdm_hw->core_info;
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struct cam_cdm *cdm_core = (struct cam_cdm *)cdm_hw->core_info;
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CAM_DBG(CAM_CDM, "%s%d Base: 0x%x, Len: %u, Tag: %u, set_arb: %u, fifo_idx: %u",
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cdm_hw->soc_info.label_name, cdm_hw->soc_info.index,
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src, len, tag, set_arb, fifo_idx);
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if (cam_cdm_write_hw_reg(cdm_hw,
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if (cam_cdm_write_hw_reg(cdm_hw,
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cdm_core->offsets->bl_fifo_reg[fifo_idx]->bl_fifo_base,
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cdm_core->offsets->bl_fifo_reg[fifo_idx]->bl_fifo_base,
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src)) {
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src)) {
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@@ -1487,25 +1491,24 @@ static void cam_hw_cdm_iommu_fault_handler(struct cam_smmu_pf_info *pf_info)
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{
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{
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struct cam_hw_info *cdm_hw = NULL;
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struct cam_hw_info *cdm_hw = NULL;
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struct cam_cdm *core = NULL;
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struct cam_cdm *core = NULL;
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struct cam_cdm_pid_mid_data *pid_mid_info = NULL;
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struct cam_cdm_private_dt_data *pvt_data;
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int i;
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int i;
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if (!pf_info) {
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CAM_ERR(CAM_CDM, "pf_info is null");
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return;
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}
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if (pf_info->token) {
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if (pf_info->token) {
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cdm_hw = (struct cam_hw_info *)pf_info->token;
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cdm_hw = (struct cam_hw_info *)pf_info->token;
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core = (struct cam_cdm *)cdm_hw->core_info;
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core = (struct cam_cdm *)cdm_hw->core_info;
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pid_mid_info = core->offsets->cmn_reg->cdm_pid_mid_info;
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pvt_data = (struct cam_cdm_private_dt_data *) cdm_hw->soc_info.soc_private;
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CAM_ERR_RATE_LIMIT(CAM_CDM, "Page fault iova addr %pK\n",
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CAM_ERR_RATE_LIMIT(CAM_CDM, "Page fault iova addr %pK\n",
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(void *)pf_info->iova);
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(void *)pf_info->iova);
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if (pid_mid_info) {
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/* Check if the PID and MID are valid, if not handle the pf */
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/*
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if ((pvt_data->pid >= 0) && (pvt_data->mid >= 0)) {
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* If its CDM or OPE CDM then only handle the pf for CDM
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if (((pf_info->pid == pvt_data->pid) && (pf_info->mid == pvt_data->mid)))
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* else return.
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*/
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if (((pf_info->pid == pid_mid_info->cdm_pid) &&
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(pf_info->mid == pid_mid_info->cdm_mid)) ||
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((pf_info->pid == pid_mid_info->ope_cdm_pid) &&
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(pf_info->mid == pid_mid_info->ope_cdm_mid)))
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goto handle_cdm_pf;
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goto handle_cdm_pf;
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else
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else
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return;
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return;
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@@ -1,17 +1,10 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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/*
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* Copyright (c) 2020, The Linux Foundation. All rights reserved.
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* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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*/
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*/
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#include "cam_cdm.h"
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#include "cam_cdm.h"
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struct cam_cdm_pid_mid_data cdm_hw_2_1_pid_mid_data = {
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.cdm_pid = 2,
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.cdm_mid = 0,
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.ope_cdm_pid = 0,
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.ope_cdm_mid = 2,
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};
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struct cam_cdm_bl_pending_req_reg_params cdm_hw_2_1_bl_pending_req0 = {
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struct cam_cdm_bl_pending_req_reg_params cdm_hw_2_1_bl_pending_req0 = {
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.rb_offset = 0x6c,
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.rb_offset = 0x6c,
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.rb_mask = 0x1ff,
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.rb_mask = 0x1ff,
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@@ -233,7 +226,6 @@ static struct cam_cdm_common_regs cdm_hw_2_1_cmn_reg_offset = {
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.icl_reg = &cdm_2_1_icl,
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.icl_reg = &cdm_2_1_icl,
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.spare = 0x3fc,
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.spare = 0x3fc,
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.priority_group_bit_offset = 20,
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.priority_group_bit_offset = 20,
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.cdm_pid_mid_info = &cdm_hw_2_1_pid_mid_data,
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};
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};
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static struct cam_cdm_common_reg_data cdm_hw_2_1_cmn_reg_data = {
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static struct cam_cdm_common_reg_data cdm_hw_2_1_cmn_reg_data = {
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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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/*
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* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
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* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
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*/
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*/
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#include <linux/delay.h>
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#include <linux/delay.h>
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@@ -115,8 +115,15 @@ int cam_cdm_soc_load_dt_private(struct platform_device *pdev,
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}
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}
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cdm_pvt_data->is_single_ctx_cdm =
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cdm_pvt_data->is_single_ctx_cdm =
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of_property_read_bool(pdev->dev.of_node,
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of_property_read_bool(pdev->dev.of_node, "single-context-cdm");
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"single-context-cdm");
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rc = of_property_read_u32(pdev->dev.of_node, "cam_hw_pid", &cdm_pvt_data->pid);
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if (rc)
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cdm_pvt_data->pid = -1;
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rc = of_property_read_u32(pdev->dev.of_node, "cam-hw-mid", &cdm_pvt_data->mid);
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if (rc)
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cdm_pvt_data->mid = -1;
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rc = of_property_read_u8(pdev->dev.of_node, "cdm-priority-group",
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rc = of_property_read_u8(pdev->dev.of_node, "cdm-priority-group",
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&cdm_pvt_data->priority_group);
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&cdm_pvt_data->priority_group);
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